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AM4378: u-boot-spl : No ethernet found with Network boot.

Part Number: AM4378

I am working on custom board based on am437x gp EVM. I am doing a network boot to flash the emmc.

RBL is able to download u-boot-spl. But u-boot spl unable to detect ethernet. (No ethernet found)

I added some print statements and found that this function uclass_first_device_check()  in net/eth-uclass.c fails.

<debug_uart>
U-Boot SPL 2020.01-g999 (Feb 27 2024 - 10:06:30 +0000)
WDT:   Not found!
Trying to boot from eth device
Loading Environment from FAT... OK
No ethernet found. net/eth-uclass.c,eth_initialize, 412
<=== No Ethernet devices found ===>
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

How to debug further? How to add debug print statements in drivers/core/uclass.c.

  • Hi,

    To enable debug if depends on the file in u-boot. Some files are setup to use printf, other files use a debug macro that is enabled on a per file basis. I have not done this in awhile so this is a suggestion, try adding this line at the top of the drivers/core/uclass.c file:

    #define DEBUG

    This should enable the debug macro that you see in the file.

    The no ethernet found is coming from code in an area outside of what TI supports in u-boot. How are developing or porting the code? Did you start with the TI defconfig for example?

    Best Regards,

    Schuyler

  • Added #define DEBUG  in drivers/core/uclass.c file.But this not help.

    Added some printf. uclass_find_first_device() is returning NULL, Not calling probe function.

    <debug_uart>
    U-Boot SPL 2020.01-g999 (Feb 27 2024 - 10:06:30 +0000)
    WDT:   Not found!
    Trying to boot from eth device
    Loading Environment from FAT... OK
    No ethernet found. drivers/core/uclass.c,uclass_first_device_check, 618
    devp==NULL uclass_find_first_device
    No ethernet found. net/eth-uclass.c,eth_initialize, 412
    <=== No Ethernet devices found ===>
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ##

    Currently This u-boot was ported for custom board based TI u-boot porting guide and EMMC boot was working(MLO,u-boot.img).

  • Hi,

    I will review the porting guide to come up with additional suggestions. This will take a day or two.

    Best Regards,

    Schuyler

  • Any Update on this? 

    I will try on am437x GP EVM and see what is the console output.

  • Hi,

    After reviewing with the development team they are pointing out that there could be a missing commit in the version of u-boot that you are using. 

    Please apply this commit 

    To enable the config:
    CONFIG_SPL_ETH_SUPPORT=y
    in configs/am43xx_evm_defconfig

    Best Regards,

    Schuyler

  • This flag was already enable for the defconfig created for custom board.

  • Hi,

    Would you be able to attach the device tree you are using?  We are checking to see if the ethernet was disabled. Could you also please share any changes to made to the source and also let us know which specific sdk version is used. 

    Best Regards,

    Schuyler

  • ---
     arch/arm/dts/am437x-fsp-u-boot.dtsi |  60 +++
     arch/arm/dts/am437x-fsp.dts         | 729 ++++++++++++++++++++++++++++++++++++
     2 files changed, 789 insertions(+)
     create mode 100644 arch/arm/dts/am437x-fsp-u-boot.dtsi
     create mode 100644 arch/arm/dts/am437x-fsp.dts
    
    diff --git a/arch/arm/dts/am437x-fsp-u-boot.dtsi b/arch/arm/dts/am437x-fsp-u-boot.dtsi
    new file mode 100644
    index 0000000..ab6d171
    --- /dev/null
    +++ b/arch/arm/dts/am437x-fsp-u-boot.dtsi
    @@ -0,0 +1,60 @@
    +/*
    + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
    + *
    + * This program is free software; you can redistribute it and/or modify
    + * it under the terms of the GNU General Public License version 2 as
    + * published by the Free Software Foundation.
    + * Based on "dra7.dtsi"
    + */
    +
    +#include "am4372-u-boot.dtsi"
    +
    +/{
    +	ocp {
    +		u-boot,dm-spl;
    +	};
    +};
    +
    +&uart0 {
    +	u-boot,dm-spl;
    +};
    +
    +&mmc2 {
    +	u-boot,dm-spl;
    +};
    +
    +&mmc1 {
    +	u-boot,dm-spl;
    +};
    +
    +&davinci_mdio {
    +	u-boot,dm-spl;
    +};
    +
    +&cpsw_emac0 {
    +	u-boot,dm-spl;
    +};
    +
    +&cpsw_emac1 {
    +	u-boot,dm-spl;
    +};
    +
    +&phy_sel {
    +	u-boot,dm-spl;
    +};
    +
    +&i2c0 {
    +	u-boot,dm-spl;
    +};
    +
    +&l4_wkup {
    +	u-boot,dm-spl;
    +};
    +
    +&scm {
    +	u-boot,dm-spl;
    +};
    +
    +&scm_conf {
    +	u-boot,dm-spl;
    +};
    diff --git a/arch/arm/dts/am437x-fsp.dts b/arch/arm/dts/am437x-fsp.dts
    new file mode 100644
    index 0000000..916b92c
    --- /dev/null
    +++ b/arch/arm/dts/am437x-fsp.dts
    @@ -0,0 +1,729 @@
    +/*
    + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
    + *
    + * This program is free software; you can redistribute it and/or modify
    + * it under the terms of the GNU General Public License version 2 as
    + * published by the Free Software Foundation.
    + */
    +
    +/* AM437x GP EVM */
    +
    +/dts-v1/;
    +
    +#include "am4372.dtsi"
    +#include "am4372-u-boot.dtsi"
    +#include <dt-bindings/pinctrl/am43xx.h>
    +#include <dt-bindings/pwm/pwm.h>
    +#include <dt-bindings/gpio/gpio.h>
    +#include <dt-bindings/input/input.h>
    +
    +/ {
    +	model = "Carrier FSP";
    +	compatible = "ti,am437x-fsp","ti,am4372","ti,am43";
    +
    +	aliases {
    +		display0 = &lcd0;
    +		serial1=&uart1;
    +	};
    +
    +	chosen {
    +		stdout-path = &uart0;
    +		tick-timer = &timer2;
    +	};
    +
    +
    +	backlight {
    +		compatible = "pwm-backlight";
    +		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
    +		brightness-levels = <0 51 53 56 62 75 101 152 255>;
    +		default-brightness-level = <8>;
    +	};
    +
    +	lcd0: display {
    +		compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
    +		label = "lcd";
    +
    +		pinctrl-names = "default";
    +		pinctrl-0 = <&lcd_pins>;
    +
    +
    +
    +		panel-timing {
    +			clock-frequency = <9000000>;
    +			hactive = <480>;
    +			vactive = <272>;
    +			hfront-porch = <2>;
    +			hback-porch = <2>;
    +			hsync-len = <41>;
    +			vfront-porch = <2>;
    +			vback-porch = <2>;
    +			vsync-len = <10>;
    +			hsync-active = <0>;
    +			vsync-active = <0>;
    +			de-active = <1>;
    +			pixelclk-active = <1>;
    +		};
    +
    +		port {
    +			lcd_in: endpoint {
    +				remote-endpoint = <&dpi_out>;
    +			};
    +		};
    +
    +	};
    +
    +};
    +
    +
    +&am43xx_pinmux {
    +
    +
    +	i2c0_pins: i2c0_pins {
    +		pinctrl-single,pins = <
    +			0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
    +			0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
    +		>;
    +	};
    +
    +	i2c1_pins: i2c1_pins {
    +		pinctrl-single,pins = <
    +			0x20c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3)  /* cam0_data1.i2c1_scl */
    +			0x208 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3)  /* cam0_data0.i2c1_sda  */
    +		>;
    +	};
    +
    +	i2c2_pins: i2c2_pins {
    +		pinctrl-single,pins = <
    +			0x154 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d0.i2c2_scl */
    +			0x150 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_sclk.i2c2_sda  */
    +		>;
    +	};
    +
    +	mmc2_pins: pinmux_mmc2_pins {
    +		pinctrl-single,pins = <
    +			0x080 (PIN_INPUT | MUX_MODE2) /* (B9) gpmc_csn1.mmc1_clk */
    +			0x084 (PIN_INPUT | MUX_MODE2) /* (F10) gpmc_csn2.mmc1_cmd */
    +			0x020 (PIN_INPUT | MUX_MODE2) /* (B10) gpmc_ad8.mmc1_dat0 */
    +			0x024 (PIN_INPUT | MUX_MODE2) /* (A10) gpmc_ad9.mmc1_dat1 */
    +			0x028 (PIN_INPUT | MUX_MODE2) /* (F11) gpmc_ad10.mmc1_dat2 */
    +			0x02c (PIN_INPUT | MUX_MODE2) /* (D11) gpmc_ad11.mmc1_dat3 */
    +			0x030 (PIN_INPUT | MUX_MODE2) /* (E11) gpmc_ad12.mmc1_dat4 */
    +			0x034 (PIN_INPUT | MUX_MODE2) /* (C11) gpmc_ad13.mmc1_dat5 */
    +			0x038 (PIN_INPUT | MUX_MODE2) /* (B11) gpmc_ad14.mmc1_dat6 */
    +			0x03c (PIN_INPUT | MUX_MODE2) /* (A11) gpmc_ad15.mmc1_dat7 */
    +		>;
    +	};
    +
    +	dcan0_default: dcan0_default_pins {
    +		pinctrl-single,pins = <
    +			0x17c (PIN_INPUT_PULLUP | MUX_MODE2)		/* (L22) uart1_rtsn.dcan0_rx */
    +			0x178 (PIN_OUTPUT  | MUX_MODE2)			/* (K22) uart1_ctsn.dcan0_tx */
    +		>;
    +	};
    +
    +	dcan1_default: dcan1_default_pins {
    +		pinctrl-single,pins = <
    +			0x184 (PIN_INPUT_PULLUP | MUX_MODE2)		/* (L21) uart1_txd.dcan1_rx */
    +			0x180 (PIN_OUTPUT | MUX_MODE2)			/* (K21) uart1_rxd.dcan1_tx */
    +		>;
    +	};
    +
    +	ecap0_pins: backlight_pins {
    +		pinctrl-single,pins = <
    +			0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
    +		>;
    +	};
    +
    +#if 0
    +	spi2_pins: pinmux_spi2_pins {
    +		pinctrl-single,pins = <
    +			0x1dc (PIN_OUTPUT | MUX_MODE4) /* (AE21) cam1_pclk.spi2_sclk */
    +			0x1d0 (PIN_OUTPUT | MUX_MODE4) /* (AD24) cam1_data8.spi2_d0 */
    +			0x1e4 (PIN_OUTPUT | MUX_MODE4) /* (AB25) cam1_wen.spi2_d1 */
    +			0x1d4 (PIN_OUTPUT | MUX_MODE4) /* (AD25) cam1_hd.spi2_cs0 */
    +			>;
    +		};
    +#endif
    +
    +	edt_ft5306_ts_pins: edt_ft5306_ts_pins {
    +		pinctrl-single,pins = <
    +			0x74 (PIN_INPUT | MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
    +			0x78 (PIN_OUTPUT | MUX_MODE7)	/* gpmc_be1n.gpio1_28 */
    +		>;
    +	};
    +
    +
    +
    +	cpsw_default: cpsw_default {
    +		pinctrl-single,pins = <
    +			/* Slave 1 */
    +			0x110 (PIN_INPUT | MUX_MODE0)  /* (B13) mii1_rx_er.gmii1_rxer */
    +			0x114 (PIN_OUTPUT | MUX_MODE0) /* (A13) mii1_tx_en.gmii1_txen */
    +			0x118 (PIN_INPUT | MUX_MODE0)  /* (A15) mii1_rx_dv.gmii1_rxdv */
    +			0x12c (PIN_INPUT | MUX_MODE0)  /* (D14) mii1_tx_clk.gmii1_txclk */
    +			0x130 (PIN_INPUT | MUX_MODE0)  /* (D13) mii1_rx_clk.gmii1_rxclk */
    +			0x128 (PIN_OUTPUT | MUX_MODE0) /* (B15) mii1_txd0.gmii1_txd0 */
    +			0x124 (PIN_OUTPUT | MUX_MODE0) /* (A14) mii1_txd1.gmii1_txd1 */
    +			0x120 (PIN_OUTPUT | MUX_MODE0) /* (C13) mii1_txd2.gmii1_txd2 */
    +			0x11c (PIN_OUTPUT | MUX_MODE0) /* (C16) mii1_txd3.gmii1_txd3 */
    +			0x140 (PIN_INPUT | MUX_MODE0)  /* (F17) mii1_rxd0.gmii1_rxd0 */
    +			0x13c (PIN_INPUT | MUX_MODE0)  /* (B16) mii1_rxd1.gmii1_rxd1 */
    +			0x138 (PIN_INPUT | MUX_MODE0)  /* (E16) mii1_rxd2.gmii1_rxd2 */
    +			0x134 (PIN_INPUT | MUX_MODE0)  /* (C14) mii1_rxd3.gmii1_rxd3 */
    +
    +			/* Slave 2 */
    +			0x058 (PIN_INPUT | MUX_MODE1)  /* (E8) gpmc_a6.pr1_mii_mt1_clk */
    +			0x054 (PIN_OUTPUT | MUX_MODE1) /* (E7) gpmc_a5.pr1_mii1_txd0 */
    +			0x050 (PIN_OUTPUT | MUX_MODE1) /* (D7) gpmc_a4.pr1_mii1_txd1 */
    +			0x04c (PIN_OUTPUT | MUX_MODE1) /* (A4) gpmc_a3.pr1_mii1_txd2 */
    +			0x048 (PIN_OUTPUT | MUX_MODE1) /* (C6) gpmc_a2.pr1_mii1_txd3 */
    +			0x06c (PIN_INPUT | MUX_MODE1)  /* (D8) gpmc_a11.pr1_mii1_rxd0 */
    +			0x068 (PIN_INPUT | MUX_MODE1)  /* (G8) gpmc_a10.pr1_mii1_rxd1 */
    +			0x064 (PIN_INPUT | MUX_MODE1)  /* (B4) gpmc_a9.pr1_mii1_rxd2 */
    +			0x060 (PIN_INPUT | MUX_MODE1)  /* (F7) gpmc_a8.pr1_mii1_rxd3 */
    +			0x040 (PIN_OUTPUT | MUX_MODE1) /* (C3) gpmc_a0.pr1_mii1_txen */
    +			0x05c (PIN_INPUT | MUX_MODE1)  /* (F6) gpmc_a7.pr1_mii_mr1_clk */
    +			0x044 (PIN_INPUT | MUX_MODE1)  /* (C5) gpmc_a1.pr1_mii1_rxdv */
    +			0x074 (PIN_INPUT | MUX_MODE1)  /* (B3) gpmc_wpn.pr1_mii1_rxer */
    +		>;
    +	};
    +
    +	cpsw_sleep: cpsw_sleep {
    +		pinctrl-single,pins = <
    +			/* Slave 1 reset value */
    +			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +                        0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +
    +
    +			/* Slave 2 reset value */
    +			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +                        0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +		>;
    +	};
    +
    +	davinci_mdio_default: davinci_mdio_default {
    +		pinctrl-single,pins = <
    +			/* MDIO */
    +			0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
    +			0x14c (PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
    +		>;
    +	};
    +
    +	davinci_mdio_sleep: davinci_mdio_sleep {
    +		pinctrl-single,pins = <
    +			/* MDIO reset value */
    +			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    +		>;
    +	};
    +
    +	dss_pins: dss_pins {
    +		pinctrl-single,pins = <
    +			0x0e0 (PIN_OUTPUT | MUX_MODE0) /* (B23) dss_vsync.dss_vsync */
    +			0x0e4 (PIN_OUTPUT | MUX_MODE0) /* (A23) dss_hsync.dss_hsync */
    +			0x0e8 (PIN_OUTPUT | MUX_MODE0) /* (A22) dss_pclk.dss_pclk */
    +			0x0ec (PIN_OUTPUT | MUX_MODE0) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
    +			0x0a0 (PIN_OUTPUT | MUX_MODE0) /* (B22) dss_data0.dss_data0 */
    +			0x0a4 (PIN_OUTPUT | MUX_MODE0) /* (A21) dss_data1.dss_data1 */
    +			0x0a8 (PIN_OUTPUT | MUX_MODE0) /* (B21) dss_data2.dss_data2 */
    +			0x0ac (PIN_OUTPUT | MUX_MODE0) /* (C21) dss_data3.dss_data3 */
    +			0x0b0 (PIN_OUTPUT | MUX_MODE0) /* (A20) dss_data4.dss_data4 */
    +			0x0b4 (PIN_OUTPUT | MUX_MODE0) /* (B20) dss_data5.dss_data5 */
    +			0x0b8 (PIN_OUTPUT | MUX_MODE0) /* (C20) dss_data6.dss_data6 */
    +			0x0bc (PIN_OUTPUT | MUX_MODE0) /* (E19) dss_data7.dss_data7 */
    +			0x0c0 (PIN_OUTPUT | MUX_MODE0) /* (A19) dss_data8.dss_data8 */
    +			0x0c4 (PIN_OUTPUT | MUX_MODE0) /* (B19) dss_data9.dss_data9 */
    +			0x0c8 (PIN_OUTPUT | MUX_MODE0) /* (A18) dss_data10.dss_data10 */
    +			0x0cc (PIN_OUTPUT | MUX_MODE0) /* (B18) dss_data11.dss_data11 */
    +			0x0d0 (PIN_OUTPUT | MUX_MODE0) /* (C19) dss_data12.dss_data12 */
    +			0x0d4 (PIN_OUTPUT | MUX_MODE0) /* (D19) dss_data13.dss_data13 */
    +			0x0d8 (PIN_OUTPUT | MUX_MODE0) /* (C17) dss_data14.dss_data14 */
    +			0x0dc (PIN_OUTPUT | MUX_MODE0) /* (D17) dss_data15.dss_data15 */
    +			0x1cc (PIN_OUTPUT | MUX_MODE2) /* (AC24) cam1_data9.dss_data16 */
    +			0x1c8 (PIN_OUTPUT | MUX_MODE2) /* (AA19) cam0_data9.dss_data17 */
    +			0x1c4 (PIN_OUTPUT | MUX_MODE2) /* (AB19) cam0_data8.dss_data18 */
    +			0x1c0 (PIN_OUTPUT | MUX_MODE2) /* (AC20) cam0_pclk.dss_data19 */
    +			0x1bc (PIN_OUTPUT | MUX_MODE2) /* (AD17) cam0_wen.dss_data20 */
    +			0x1b8 (PIN_OUTPUT | MUX_MODE2) /* (AC18) cam0_field.dss_data21 */
    +			0x1b4 (PIN_OUTPUT | MUX_MODE2) /* (AD18) cam0_vd.dss_data22 */
    +			0x1b0 (PIN_OUTPUT | MUX_MODE2) /* (AE17) cam0_hd.dss_data23 */
    +
    +		>;
    +	};
    +
    +	gpio0_pins: gpio0_pins {
    +		pinctrl-single,pins = <
    +			0x108 (PIN_INPUT | MUX_MODE7)  /* (D16) mii1_col.gpio0[0] */
    +			0x158 (PIN_OUTPUT | MUX_MODE7) /* (T21) spi0_d1.gpio0[4] */
    +			0x15c (PIN_OUTPUT | MUX_MODE7) /* (T20) spi0_cs0.gpio0[5] */
    +			0x160 (PIN_OUTPUT | MUX_MODE7) /* (R25) spi0_cs1.gpio0[6] */
    +			0x2c0 (PIN_INPUT | MUX_MODE7)  /* (g21) USB0DRVBUS.gpio0[18] */
    +			0x264 (PIN_OUTPUT | MUX_MODE7) /* (P22) spi2_d0.gpio0[20] */
    +			0x268 (PIN_OUTPUT | MUX_MODE7) /* (P20) spi2_d1.gpio0[21] */
    +			0x260 (PIN_OUTPUT | MUX_MODE7) /* (N20) spi2_sclk.gpio0[22] */
    +			0x26c (PIN_OUTPUT | MUX_MODE7) /* (T23) spi2_cs0.gpio0[23] */
    +			0x278 (PIN_INPUT | MUX_MODE7)  /* (H20) clkreq.gpio0[24] */
    +			0x2c4 (PIN_OUTPUT | MUX_MODE7) /* (F25) USB1_DRVVBUS.gpio0[25] */
    +			0x144 (PIN_OUTPUT | MUX_MODE7) /* (A16) rmii1_ref_clk.gpio0[29] */
    +		
    +		>;
    +	};
    +
    +	gpio1_pins: gpio1_pins {
    +		pinctrl-single,pins = <
    +			0x000 (PIN_OUTPUT | MUX_MODE7) /* (B5) gpmc_ad0.gpio1[0] */
    +			0x004 (PIN_OUTPUT | MUX_MODE7) /* (A5) gpmc_ad1.gpio1[1] */
    +			0x008 (PIN_OUTPUT | MUX_MODE7) /* (B6) gpmc_ad2.gpio1[2] */
    +			0x00c (PIN_INPUT | MUX_MODE7)  /* (A6) gpmc_ad3.gpio1[3] */
    +			0x010 (PIN_OUTPUT | MUX_MODE7) /* (B7) gpmc_ad4.gpio1[4] */
    +			0x014 (PIN_OUTPUT | MUX_MODE7) /* (A7) gpmc_ad5.gpio1[5] */
    +			0x018 (PIN_OUTPUT | MUX_MODE7) /* (C8) gpmc_ad6.gpio1[6] */
    +			0x01c (PIN_OUTPUT | MUX_MODE7) /* (B8) gpmc_ad7.gpio1[7] */
    +			0x168 (PIN_INPUT | MUX_MODE7)  /* (L25) uart0_ctsn.gpio1[8] */
    +			0x16c (PIN_INPUT | MUX_MODE7)  /* (J25) uart0_rtsn.gpio1[9] */
    +			0x078 (PIN_OUTPUT | MUX_MODE7) /* (A3) gpmc_be1n.gpio1[28] */
    +			0x07c (PIN_OUTPUT | MUX_MODE7) /* (A8) gpmc_csn0.gpio1[29] */
    +		>;
    +	};
    +
    +	gpio2_pins: gpio2_pins {
    +		pinctrl-single,pins = <
    +			0x088 (PIN_INPUT | MUX_MODE7)  /* (B12) gpmc_csn3.gpio2[0] */
    +			0x08c (PIN_INPUT | MUX_MODE7)  /* (A12) gpmc_clk.gpio2[1] */
    +			0x098 (PIN_OUTPUT | MUX_MODE7) /* (D10) gpmc_wen.gpio2[4] */
    +			0x09c (PIN_INPUT | MUX_MODE7)  /* (C10) gpmc_be0n_cle.gpio2[5] */
    +			0x0f0 (PIN_OUTPUT | MUX_MODE7) /* (B1) mmc0_dat3.gpio2[26] */
    +			0x0f4 (PIN_OUTPUT | MUX_MODE7) /* (B2) mmc0_dat2.gpio2[27] */
    +			0x0f8 (PIN_OUTPUT | MUX_MODE7) /* (C2) mmc0_dat1.gpio2[28] */
    +			0x0fc (PIN_OUTPUT | MUX_MODE7) /* (C1) mmc0_dat0.gpio2[29] */
    +			0x100 (PIN_OUTPUT | MUX_MODE7) /* (D1) mmc0_clk.gpio2[30] */
    +			0x104 (PIN_OUTPUT | MUX_MODE7) /* (D2) mmc0_cmd.gpio2[31] */
    +		
    +		>;
    +	};
    +
    +	gpio3_pins: gpio3_pins {
    +		pinctrl-single,pins = <
    +			0x10c (PIN_OUTPUT | MUX_MODE7) /* (B14) mii1_crs.gpio3[1] */
    +			0x190 (PIN_INPUT | MUX_MODE7) /* (N24) mcasp0_aclkx.gpio3[14] */
    +			0x1ac (PIN_INPUT | MUX_MODE7) /* (L24) mcasp0_ahclkx.gpio3[21] */
    +			0x198 (PIN_INPUT | MUX_MODE7) /* (H23) mcasp0_axr0.gpio3[16] */
    +			0x1a8 (PIN_INPUT | MUX_MODE7) /* (K25) mcasp0_axr1.gpio3[20] */
    +			0x1a4 (PIN_INPUT | MUX_MODE7) /* (K23) mcasp0_fsr.gpio3[19] */
    +			0x194 (PIN_INPUT | MUX_MODE7) /* (N22) mcasp0_fsx.gpio3[15] */
    +			0x19c (PIN_INPUT | MUX_MODE7) /* (M24) mcasp0_ahclkr.gpio3[17] */
    +			0x1a0 (PIN_INPUT | MUX_MODE7) /* (L23) mcasp0_ahclkr.gpio3[18] */
    +		>;
    +	};
    +
    +	gpio4_pins: gpio4_pins {
    +		pinctrl-single,pins = <
    +			0x1d8 (PIN_OUTPUT | MUX_MODE7) /* (AC23) cam1_vd.gpio4[10] */
    +			0x1e0 (PIN_INPUT | MUX_MODE7)  /* (AC25) cam1_field.gpio4[12] */
    +			0x1ec (PIN_INPUT | MUX_MODE7) /* (AC21) cam1_data1.gpio4[15] */
    +			0x1e8 (PIN_INPUT | MUX_MODE7) /* (AB20) cam1_data0.gpio4[14] */
    +			0x1f0 (PIN_OUTPUT | MUX_MODE7) /* (AD21) cam1_data2.gpio4[16] */
    +			0x1f4 (PIN_OUTPUT | MUX_MODE7) /* (AE22) cam1_data3.gpio4[17] */
    +			0x200 (PIN_OUTPUT | MUX_MODE7) /* (AD23) cam1_data6.gpio4[20] */
    +			0x210 (PIN_OUTPUT | MUX_MODE7) /* (Y18) cam0_data2.gpio4[24] */
    +			0x214 (PIN_OUTPUT | MUX_MODE7) /* (AA18) cam0_data3.gpio4[25] */
    +			0x218 (PIN_INPUT | MUX_MODE7) /* (AE19) cam0_data4.gpio4[26] */
    +			0x21c (PIN_OUTPUT | MUX_MODE7) /* (AD19) cam0_data5.gpio4[27] */
    +			0x220 (PIN_OUTPUT | MUX_MODE7) /* (AE20) cam0_data6.gpio4[28] */
    +			0x224 (PIN_OUTPUT | MUX_MODE7) /* (AD20) cam0_data7.gpio4[29] */
    +		>;
    +	};
    +
    +
    +	gpio5_pins: gpio5_pins {
    +		pinctrl-single,pins = <
    +			0x230 (PIN_OUTPUT | MUX_MODE7) /* (H22) uart3_ctsn.gpio5[0] */
    +			0x234 (PIN_OUTPUT | MUX_MODE7) /* (K24) uart3_rtsn.gpio5[1] */
    +			0x228 (PIN_INPUT | MUX_MODE7) /* (H25) uart3_rxd.gpio5[2] */
    +			0x22c (PIN_INPUT | MUX_MODE7) /* (H25) uart3_txd.gpio5[3] */
    +			0x250 (PIN_OUTPUT | MUX_MODE7) /* (P25) spi4_sclk.gpio5[4] */
    +			0x254 (PIN_INPUT | MUX_MODE7) /* (R24) spi4_d0.gpio5[5] */
    +			0x258 (PIN_INPUT | MUX_MODE7) /* (P24) spi4_d1.gpio5[6] */
    +			0x25c (PIN_INPUT | MUX_MODE7) /* (N25) spi4_cs0.gpio5[7] */
    +			0x238 (PIN_INPUT | MUX_MODE7) /* (D25) gpio5_8.gpio5[8] */
    +			0x23c (PIN_INPUT | MUX_MODE7) /* (F24) gpio5_9.gpio5[9] */
    +			0x240 (PIN_OUTPUT | MUX_MODE7) /* (G20) gpio5_10.gpio5[10] */
    +			0x244 (PIN_OUTPUT | MUX_MODE7) /* (F23) gpio5_11.gpio5[11] */
    +			0x248 (PIN_OUTPUT | MUX_MODE7) /* (E25) gpio5_12.gpio5[12] */
    +			0x24c (PIN_OUTPUT | MUX_MODE7) /* (E24) gpio5_13.gpio5[13] */
    +			0x270 (PIN_OUTPUT | MUX_MODE7) /* (A2) gpmc_wait0.gpio5[30] */
    +			
    +		>;
    +	};
    +
    +	uart0_pins: uart0_pins {
    +		pinctrl-single,pins = <
    +			0x170 (PIN_INPUT | MUX_MODE0) /* (K25) uart0_rxd.uart0_rxd */
    +			0x174 (PIN_OUTPUT | MUX_MODE0) /* (J24) uart0_txd.uart0_txd */
    +		>;
    +	};
    +
    +	uart2_pins: myuart2_pins {
    +		pinctrl-single,pins = <
    +			0x1f8 (PIN_INPUT | MUX_MODE2) /* (AD22) cam1_data4.uart2_rxd */
    +			0x1fc (PIN_OUTPUT | MUX_MODE2) /* (AE23) cam1_data5.uart2_txd */
    +			//0x204 (PIN_OUTPUT | MUX_MODE2) /* (AE24) cam1_data7.uart2_rtsn */
    +		>;
    +	};
    +
    +
    +	lcd_pins: lcd_pins {
    +		pinctrl-single,pins = <
    +			0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
    +		>;
    +	};
    +
    +	usb2_pins: usb2_pins {
    +		pinctrl-single,pins = <
    +			0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
    +		>;
    +	};
    +
    +	timer4_pins_default: timer4_pins_default {
    +		pinctrl-single,pins = <
    +		0x090 (PIN_OUTPUT | MUX_MODE2 ) /* TIMER4 -> timer4 -> A9 */
    +		>;
    +	};
    +
    +	timer7_pins_default: timer7_pins_default {
    +		pinctrl-single,pins = <
    +		0x094 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* TIMER7 -> timer7 -> E10 */
    +		>;
    +	};
    +};
    +
    +&i2c0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&i2c0_pins>;
    +	clock-frequency = <400000>;
    +
    +	tps@24 {
    +		compatible = "ti,tps65218";
    +		reg = <0x24>;
    +		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
    +		interrupt-controller;
    +		#interrupt-cells = <2>;
    +
    +		dcdc1: regulator-dcdc1 {
    +			compatible = "ti,tps65218-dcdc1";
    +			/* VDD_CORE limits min of OPP50 and max of OPP100 */
    +			regulator-name = "vdd_core";
    +			regulator-min-microvolt = <912000>;
    +			regulator-max-microvolt = <1144000>;
    +			regulator-boot-on;
    +			regulator-always-on;
    +		};
    +
    +		dcdc2: regulator-dcdc2 {
    +			compatible = "ti,tps65218-dcdc2";
    +			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
    +			regulator-name = "vdd_mpu";
    +			regulator-min-microvolt = <912000>;
    +			regulator-max-microvolt = <1378000>;
    +			regulator-boot-on;
    +			regulator-always-on;
    +		};
    +
    +		dcdc3: regulator-dcdc3 {
    +			compatible = "ti,tps65218-dcdc3";
    +			regulator-name = "vdds_ddr";
    +			regulator-min-microvolt = <1500000>;
    +			regulator-max-microvolt = <1500000>;
    +			regulator-boot-on;
    +			regulator-always-on;
    +		};
    +
    +		dcdc4: regulator-dcdc4 {
    +			compatible = "ti,tps65218-dcdc4";
    +			regulator-name = "v3_3d";
    +			regulator-min-microvolt = <3300000>;
    +			regulator-max-microvolt = <3300000>;
    +			regulator-boot-on;
    +			regulator-always-on;
    +		};
    +
    +		ldo1: regulator-ldo1 {
    +			compatible = "ti,tps65218-ldo1";
    +			regulator-name = "v1_8d";
    +			regulator-min-microvolt = <1800000>;
    +			regulator-max-microvolt = <1800000>;
    +			regulator-boot-on;
    +			regulator-always-on;
    +		};
    +
    +		power-button {
    +			compatible = "ti,tps65218-pwrbutton";
    +			status = "okay";
    +			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
    +		};
    +	};
    +};
    +
    +&i2c1 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&i2c1_pins>;
    +	clock-frequency = <400000>;
    +
    +	edt-ft5306@38 {
    +		status = "okay";
    +		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
    +		pinctrl-names = "default";
    +		pinctrl-0 = <&edt_ft5306_ts_pins>;
    +
    +		reg = <0x38>;
    +		interrupt-parent = <&gpio0>;
    +		interrupts = <31 0>;
    +
    +		reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
    +
    +		touchscreen-size-x = <480>;
    +		touchscreen-size-y = <272>;
    +	};
    +
    +};
    +
    +&i2c2 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&i2c2_pins>;
    +	clock-frequency = <400000>;
    +};
    +
    +
    +&uart2 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&uart2_pins>;
    +};
    +
    +&uart0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&uart0_pins>;
    +};
    +
    +&tscadc {
    +	status = "okay";
    +
    +	adc {
    +		ti,adc-channels = <0 1 2 3 4 5 6 7>;
    +	};
    +};
    +
    +#if 0
    +&spi2 {
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&spi2_pins>;
    +	status = "okay";
    +};
    +#endif
    +
    +&dcan0 {
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&dcan0_default>;
    +	status = "okay";
    +};
    +
    +&dcan1 {
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&dcan1_default>;
    +	status = "okay";
    +};
    +
    +
    +&timer4 {
    +status = "okay";
    +pinctrl-names = "default";
    +pinctrl-0 = <&timer4_pins_default>;
    +};
    +
    +&timer7 {
    +status = "okay";
    +pinctrl-names = "default";
    +pinctrl-0 = <&timer7_pins_default>;
    +};
    +
    +
    +&epwmss0 {
    +	status = "okay";
    +};
    +
    +&ecap0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&ecap0_pins>;
    +};
    +
    +&gpio0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio0_pins>;
    +	gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
    +
    +};
    +
    +&gpio3 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio3_pins>;
    +};
    +
    +&gpio1 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio1_pins>;
    +};
    +
    +&gpio2 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio2_pins>;
    +};
    +
    +&gpio4 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio4_pins>;
    +};
    +
    +&gpio5 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&gpio5_pins>;
    +};
    +
    +&mmc1 {
    +
    +	status = "okay";
    +      };
    +
    +&mmc2 {
    +	vmmc-supply = <&dcdc4>;
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&mmc2_pins>;
    +	ti,non-removable;
    +	bus-width = <8>;
    +	status = "okay";
    +	max-frequency=<48000000>;
    +};
    +
    +&usb2_phy1 {
    +	status = "okay";
    +};
    +
    +&usb1 {
    +	dr_mode = "otg";
    +	status = "okay";
    +	pinctrl-names = "default";
    +};
    +
    +&usb2_phy2 {
    +	status = "okay";
    +};
    +
    +&usb2 {
    +	dr_mode = "host";
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&usb2_pins>;
    +};
    +
    +
    +
    +&mac {
    +	pinctrl-names = "default", "sleep";
    +	pinctrl-0 = <&cpsw_default>;
    +	pinctrl-1 = <&cpsw_sleep>;
    +	dual_emac = <1>;
    +	status = "okay";
    +};
    +
    +&davinci_mdio {
    +	pinctrl-names = "default", "sleep";
    +	pinctrl-0 = <&davinci_mdio_default>;
    +	pinctrl-1 = <&davinci_mdio_sleep>;
    +	status = "okay";
    +
    +    ethphy0: ethernet-phy@4 {
    +        reg = <4>;
    +    };
    +
    +    ethphy1: ethernet-phy@2 {
    +        reg = <2>;
    +    };
    +};
    +
    +&cpsw_emac0 {
    +    phy-handle = <&ethphy0>;
    +    phy-mode = "mii";
    +    dual_emac_res_vlan = <1>;
    +};
    +
    + 
    +
    +&cpsw_emac1 {
    +    phy-handle = <&ethphy1>;
    +    phy-mode = "mii";
    +    dual_emac_res_vlan = <2>;
    +};
    +
    +&elm {
    +	status = "okay";
    +};
    +
    +
    +
    +&dss {
    +	status = "okay";
    +
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&dss_pins>;
    +
    +	port {
    +		dpi_out: endpoint@0 {
    +			remote-endpoint = <&lcd_in>;
    +			data-lines = <24>;
    +		};
    +	};
    +};
    +
    +&rtc {
    +	status = "okay";
    +};
    +
    +&wdt {
    +	status = "okay";
    +};
    +
    +&cpu {
    +	cpu0-supply = <&dcdc2>;
    +};
    -- 
    2.7.4
    
    

    Hi Schuyler,

    please find the patch file that creates dts for the u-boot ported on am437x based custom board.

    Regards,

    Siva.