hi, is there any condition or pre-requisite do we need to config ddr clocks and resets.
eg: ddr should be idle, system should not be dile, in nop operation.
Thanks.
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hi, is there any condition or pre-requisite do we need to config ddr clocks and resets.
eg: ddr should be idle, system should not be dile, in nop operation.
Thanks.
Greetings Jun,
I'm not quite sure what you're asking for, please see the JEDEC specification on DDR for voltage ramp and device initialization, this will detail all the requirements for clocks, reset, power supplies, and all other signals.
If you're looking for software examples of configuring DDR on the SoC, please see the MCU+SDK or Linux SDK. For example, the MCU+SDK has a detailed driver page about their DDR S/W: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/09_01_00_41/exports/docs/api_guide_am64x/DRIVERS_DDR_PAGE.html
Sincerely,
Lucas