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FPGA RTL code for 6678 EVM

Prateek Bansal
Expert 4510 points

This is re-post of my quesiton on  http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/123301.aspx thread as that thread is closed.

The customer looked at the FPGA RTL code files that Advantech made available but could not find the information they are looking for. It is not in the EVM Technical Reference Manual either. Here is what they would like to know -

a)  what commands the FPGA sends to the UCD9222 via the PMBus_CNTL pin during power up, and under what conditions.

b) any other interaction over the other PMBus pins as part of the power-on sequence

Section 5.3 of Technical Reference Manual does not cover all the details as E2E forum post http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/131297/471863.aspx#471863 suggests that another pin PMBUS_CNTL pin need to be part of Power on Sequence that was not clear from TRM.

Is it possible to get above information?

Thanks,

Prateek