This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SK-AM64B: RS485 over UART on SK-AM64B

Part Number: SK-AM64B

Dear team,

I am evaluating the RS485 over UART5 module on R5 core of starter kit. As of now  i have imported UART example from MCU+SDL v9.1.00.41 and one more UART peripheral is added (ie. UART5) for RS485.

In TRM it is mentioned that to select a RS-485 mode, we need to set the UART_MDR3[4] DIR_EN bit field to 0x1 but if i check in low level driver files  I am  not getting any specific APIs to change the UART_MDR3 mem registers of UART.

How should we configure the UART for RS485 to work.

Thanks

Shraddha

  • Hello Shraddha,

    Thanks for your question.

    I am going to start looking into this actively in about few hours.

    Regards,

    Vaibhav

  • Hello Shraddha,

    I am actively looking into this.

    So I am assuming your end goal is to make use of full duplex communication via RS 485?

    Please expect responses from my end in about a day.

    Regards,

    Vaibhav

  • Hello Vaibhav,

    We will make use of half duplex communication via RS485. Any update on this topic??

    Regards

    Shraddha

  • Hello Shraddha,

    Yes I went through your concern.

    I am just wondering that if you need to write to a register then a basic low level CSL API would suffice.

    I am attaching a API here with its description.

    This should be able to write a desired value to a specific register.

    Let me know if this helps.

    Looking forward to your response.

    Regards,

    Vaibhav

  • Hello Vaibhav,

    I have modified the DIR_EN bit of UART_MDR3 register to 1. Also before UART TX, i made RTS pin to high & before receiving RTS pin is made low. There is no proper output on terminal.

    Any configuration am i doing wrong??

    Regards

    shraddha

  • Hi Shraddha,

    could you please describe your test setup? As TRM explains we need an external RS-485 transceiver for AM64 to run in RS-485 mode. As far as I know this is not part of the Starterkit EVM.

    What is the RS-485 device you are using for your tests? And how do you generate the data and process it on AM64 side?

    Regards, Frank

  • Hello

    I am using external RS-485 transreceiver( this board has been tested for RS485 communication)

    Below is the HW pin connection 

    RS-485 transreceiver               AM64B (UART 5)

    TxD----------------------------------> UART5_TXD(MCAN1_TX/C17)

    RxD---------------------------------->UART5_RXD(MCAN1_RX/D17)

    ResetEn ----------------------------> UART5_RTSn(GPMC0_WEn/T21)

    On AM64side, i have used UART 5 on R5 core, configuration i have kept same as uart_echo_callback example with interrupt & callback mode. Only the following changes i have done

    1. DIR_EN bit of UART_MDR3 register is set to 1.

    2. UART5_RTSn pin I have configured as GPIO output pin, manually contolled it befor Tx/Rx (before UART TX, i made RTS pin to high & UART Rx, RTS pin is made low.)

    Should I have to enable Hardware Flow Control inorder to enable UART5_RTSn pin or set it as GPIO output pin & control it manually??

    Regards,

    Shraddha

  • Hi Shraddha,

    couple of points...

    1) as the TRM indicates RTS signal will be generated by HW if you set DIR_EN bit. So no need to control RTS manually on AM64 side.

    2) There is also a polarity config for RTS (see TRM table 12-610, DIR_POL). This needs to be aligned with your RS-485 transceiver card direction signal.

    3) Here I would assume UART5_RTS is connected to some direction signal as in TRM drawing. Why do you connect this to ResetEn signal? Do you have schematics of your RS-485 card?

    4) I assume UART echo example is not perfect for RS-485. On RS-485 you can not send and receive at same (only half-duplex comms). So the direction for the communication has to be controlled by some higher level protocol or you may get bus contention.

    Keep in mind that our UART driver and examples are designed and tested with full duplex UART in mind. We have not tested that with RS-485 mode. I assume due to the missing transceiver on the EVMs. Still it should work if you make sure that both sides are in sync on who can send at any time. And the HW is connected correctly.

    Regards, Frank

  • 12.1.5.4.8.2 RS-485 Mode
    12.1.5.4.8.2.1 RS-485 External Transceiver Direction Control
    The UART_MDR3[4] DIR_EN bit enables hardware control over an external transceiver to support RS-485. The
    direction signal comes across the DIR port. The direction polarity is controlled by the UART_MDR3[3] DIR_POL
    bit. The direction is determined by the hardware monitoring the TX FIFO and the TX shift register. When both
    are empty the transceiver is set to RX. There is a guard band delay counter of 3 bit clock cycles after the TX
    shift register is going empty to allow time for the stop bit to transition through the transceiver before a direction
    change to receive might be applied.

    This is how RS-485 mode works. Also keep the timing in mind (fig 12-271)

  • Hello

    Can you share an example project for RS485 communication over UART.

    Regards,

    Shraddha

  • Hello

    Please correct me if I misunderstood anything. 

    1. As per TRM, for RS485 to work, we just need to set DIR_EN bit. So RTS signal will be handlled by HW. No need to enable Hardware Flow Control?.

    2. DIR_POL bit i have set it to 1 as per RS-485 transreciver card direction. 

    3. Its my typo error in previous replies, its not ResetEn pin, its Receiver Input Enable pin of RS485 transreceiver(Active low) which I have connected to UART5_RTS.

    4. For Full duplex/half duplex mode , any configuration changes required to be done? In UART echo example, as far as i understand we are not sending & receiving at same time. We send some string & wait for write completetion & then reads 8 char. In this code the changes I made is to set RTS pin to High before UART_write & RTS pin to Low before UART_read.

    Wrt guard band delay counter of 3 bit clock cycles after the TX shift register, I will again check from my end by putting some delay.

    If possible please provide some example project.

    Regards,

    Shraddha

  • Hello Shraddha,

    I am going to work on this and ask the dev team for the support we provide on RS485.

    Please expect responses by tomorrow.

    Regards,

    Vaibhav

  • Hello Shraddha,

    I am checking with the dev team on the support we provide with respect to RS485.

    Please give me sometime to respond back on this.

    Regards,

    Vaibhav

  • Hello Shraddha,

    As per my discussion with the developers, I got to know that RS-485 is currently supported for Linux on A53 only.

    Is this something you would be inclined to know more on? If yes, please let me know.

    Looking forward to your response.

    Regards,

    Vaibhav

  • Hello Vaibhav,

    We are looking for RS485 that works without Linux R5 core, Let me know if it is supported.

    Can you also share the sample code for RS485 for Linux on A53 core.

    Regards,

    Shraddha

  • Hi Shraddha,

    We are looking for RS485 that works without Linux R5 core, Let me know if it is supported.

    As Vaibhav mentioned above, MCU+ SDK doesn't support RS485.

    Can you also share the sample code for RS485 for Linux on A53 core.

    As you may already know about Linux, each function in kernel is implemented across multiple frameworks or files, so it is not straight forward to reference it for non-Linux implementation. But anyway, if you just want to see how this DIR_EN bit is set, here is the kernel code does this:

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/tty/serial/8250/8250_omap.c?h=08.06.00.007#n869