Hello,
In the past weeks, I've had great success in porting our custom, no-Os application to Ti tms320dm365.
- we have working system controller, psc, interrupts and timers.
- the gcc toolchain compiles everything gracefully and is correctly deployed to DDR via jag.
Even though, we need to implement the codec engine to benefit from the davinci multimedia accelerators. I have successfully added the jpeg decoder package (obtained via the windows installer):
- added the (non-Linux) code from the test app
- linked the jpeddec and imx libraries
- added needed include files from the xdais and fc packages
- added custom vicpsync implementation over our interrupt system
Jpeddec decoder compiles and runs nicely until the activate call:
- alg_create, init allocations and control (getbufinfo, setparams) runs ok.
When the activate call is done, however, it hangs after using some initialized pointer (zero) and write on low address space. As there is no more external references, I presume that there is a missing piece to the codec engine which should provide buffer initialization.
I thought that there would be no need for anything more as there are no real dsps in the dm365, only hardware which should be directly accessible for the main arm9 task. But now I'm not sure if there is need for a bios/link or other mechanism for HW setup. As no unresolved references arise from eg codec, that mechanism must perform the buffer initilization according to the hardware before the actual codec is invoked or, at least, be ready for some request when the buffer need to be initialized before (or in the begginning) of the activate call.
Do you know what this mechanism consist of or the system modules needed?
I'm pretty sure that no HW is invoked from the Jpeg decoder now, as it bangs the the first word of memory before as a a result of the null pointer not initialized before (in alg_create() or the control calls).
Even though, I have:
- enabled all dma controllers and both coprocessors in the PSC
- disabled the data cache
- we are not using virtual addresses
Please, if you can explain the inner workings or refer to a Ti document to be able to run the codec engine on minimum Os resources.
Thank you very much!
NOTE: I have helped the reading correcting the line returns in the post text, as the plain text editor seem not to work for me.