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EDMA over EMIFA Interface

Other Parts Discussed in Thread: OMAP-L138

Hi,

Processor: OMAP-L138

In our custom hardware we have connected CPLD via EMIFA  bus. CPLD team has implemented some registers inside it.

I have to setup an EDMA transfer to read 125KB data from one of the register in CPLD.

The register addresses that ate mapped inside CPLD is given below table

 Register Description Width in Bits Physical Address
Character LCD Register Addr Space 8 0x6001 0100
8 0x6001 0200
8 0x6001 0300
8 0x6001 0400
A/D Data 0 16 0x6001 0000
A/D Data 1 16 0x6001 0002
Video DAC Data 16 0x6001 0500
Video DAC Command 16 0x6001 0600
Analog DAC Data 16 0x6001 0700
Analog DAC Command 16 0x6001 0800
Digitizer Control 14 0x6001 0900
Montage Switch 0 1 0x6001 0A00
Montage Switch 1 1 0x6001 0B00
Video Control 3 0x6001 0C00
Video RTC BCD Update 8 0x6001 0D00
Impedance Switch Data 16 0x6001 0E00
Analog Board Control 1 0x6001 0F00

I am trying to read from A/D Data:0 register which is addressed at 0x600010000.

Just before the EDMA transfer starts some of the EDMA parameter values are

Opt=0x8011c800 SrcAddr=0x60010000 ACnt=0x4 BCNT=0x7d00 DestAddr=0xc181a000 SrcBidx=0x0 DstBIdx=0x4 LinkAddr=0xffff BCntReload=0x0 SrcCIdx=0x0 DestCIdx=0x0 CCnt=0x1

We are calling EDMA3_DRV_enableTransfer API (WinCE Specific) to start EDMA transfer.

Also the GPIO Bank-4 Interrupt being used as External Trigger event to transfer data from CPLD to Processor.

What I had observed is initially EDMA starts and it is able to transfer 125KB of data. I had verified for data integrity and it is observed that the data is correct.

Once the first transfer completes I am calling  EDMA3_DRV_setPaRAM API again to start the next EDMA transfer.

But after this I don't see any data being transferred to processor. (EMA_OE doesn't toggles after first 125KB of data transfers successfully).

Please let me know if I am missing, configuring anything in EDMA registers.

Thank You & Regards,

GSR