Hi,
I've received the following inquiry from my customer. Could you answer their question ?
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Please tell me the conditions under which the register area of DDR_PHY (0x2994000 to 0x2995638) can be accessed.
If you access the DDR_PHY register area with the Lauterbach ICE at the following two timings, a bus error may or may not occur.
1. After booting from SDBOOT and executing SBL_SciClientInit() in the main() function
2. Execute until Board_DDRChangeFreqAck(void) of board_ddr.c
We confirmed on the custom board that the DDR_PHY register area may or may not cause a bus error depending on the Boot Mode Pins selection.
If MCU_BOOTMODE POST Config is 2bit OFF, the DDR_PHY register area cannot be accessed during above 1. When I set POST Config to 2bitON, I was able to access the DDR_PHY register area at timing ①.
However, with POST Config set to 2bitON, during above 2., R0 cannot access the DDR_PHY register area, and R1 can access the DDR_PHY register area. I would like to know the conditions as this is an obstacle to analyzing DDR initialization.
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Thanks and regards,
Hideaki
