Hi,
I am getting the following error when trying to build the example. (Section 2.1.4 in the guide)
gCacheConfig C:\ti\mcu_plus_sdk_am64x_09_01_00_41/source/kernel/nortos/lib/nortos.am64x.r5f.ti-arm-clang.debug.lib<CacheP_armv7r.obj>
Thank you,
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Hi,
I am getting the following error when trying to build the example. (Section 2.1.4 in the guide)
gCacheConfig C:\ti\mcu_plus_sdk_am64x_09_01_00_41/source/kernel/nortos/lib/nortos.am64x.r5f.ti-arm-clang.debug.lib<CacheP_armv7r.obj>
Thank you,
Hi Prashant,
Just FYI. It does mention getting the latest SDK in the document.
I had already installed the latest SDK and I did not see any mention of the incompatibility.
Thanks,
Hi Christopher,
Sorry for the inconvenience and thank you for the reporting the inconsistency. I will have the team notified about this.
About the incompatibility of OTP Keywriter v9.0 with MCU+ SDK v9.1, it's not a strict one. It's just that something changed in MCU+ SDK v9.1 which results in build failure of the OTP Keywriter v9.0
You can do the following changes in the OTP Keywriter v9.0 to use it with MCU+ SDK v9.1
diff --git a/sbl_keywriter/am64x-evm/r5fss0-0_nortos/board.c b/sbl_keywriter/am64x-evm/r5fss0-0_nortos/board.c index 55e0cd5..274c5c0 100644 --- a/sbl_keywriter/am64x-evm/r5fss0-0_nortos/board.c +++ b/sbl_keywriter/am64x-evm/r5fss0-0_nortos/board.c @@ -33,6 +33,8 @@ #include <board/ioexp/ioexp_tca6424.h> #include <kernel/dpl/CacheP.h> +const CacheP_Config gCacheConfig = {}; + /* TP52 VPP CORE on AM64X EVM */ #define EFUSE_VPP_PIN (15U) #define EFUSE_VPP_PIN_LED (16U) // test LED
Regards,
Prashant