J784S4XEVM: J784S4

Hello Narendra,

Which CPU in the TDA4 are you trying to profile (A72, R5, M4, C7x)?   CPU load and DMIPS are not the same thing.  DMIPS is something very specific, it is the time to process some smallish instruction only (no peripheral interaction, all likely in cache) loop as compared to a circa 1970 VAX processor.   This form of DMIPS likely has very little predictive power or meaningful correlation to a modern HLOS application running on an A72 or C7x.  For the Cortex-M maybe its a little more useful.  Sometimes people do use the concept of an application specific processing loop time to create a <myapplication>MIPS measurement.  For that to be useful you need to understand what your simplified application instruction and data loop timing might be then compare vs. what you get when profiling your application.  Only you can say what your MyAppMIPS should be.  You can then profile to see how to get to that value.  When you talk about load, a poorly implemented bit of code can be spinning non-productively which results in 100% load (no idle), however  that inefficient code's 100%  will steal processing power from your target MyAppMIPS.