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TMDS64EVM: IPC build Issue

Part Number: TMDS64EVM
Other Parts Discussed in Thread: SYSCONFIG

Hello TI,

I was imported the ipc_notify project from the MCU+SDK into CCS .

after that i try to build the project but it is showing the error as mentioned in below screenshot

how to fix this and can you share the documentation for ipc (Mcu+Sdk)

How to implement the IPC between Main domain and MCU domain

Thanks

  • Hello Raj,

    Thanks for reaching out to Texas Instruments E2E support forum.

    Can you please tell which version of MCU+SDK are you using?

    Regards,

    Tushar

  • hello tushar,

    i am using AM64x MCU+ SDK  09.01.00

    thank you

  • Hello Raj,

    The above issue is coming because the example.syscfg file for cores(other than r5fss0-0) does not define the USER_SHM_MEM, LOG_SHM_MEM, and RTOS_NORTOS_IPC_SHM_MEM section of the memory.

    This issue is coming because of the introduction of memory configurator tool which generates linker.cmd file based on the parameters configured.

    This is happening because r5fss0-0 is adding these regions and marking them as shared with those other cores. There's a dependency here as we can see where the only independent core in this case is r5fss0-0 and rest others depend on this.

    To build the example for individual core, please add the above mentioned section in the example.syscfg file of the project.

    Please find below changes.

    USER_SHM_MEM:

    LOG_SHM_MEM:

    RTOS_NORTOS_IPC_SHM_MEM:

    Note : Now when you build system project, there will be conflict coming from the independent core sharing these regions and your current core under test as both have the same regions added twice. Then we will have to remove those from the dependent ones.

    Hope the above information helps.

    Regards,

    Tushar

  • hello tushar,

    Currently i am trying to run ipc rpmesg in M4 core example which i have imported from the mcu+sdk-09.01.00 version.

    when i try to build project it is showing error as mentioned in below screenshot can you help out.

  • Hello Raj,

    when i try to build project it is showing error as mentioned in below screenshot can you help out.

    The above issue is coming because IPC examples now cannot be build for individual cores. They should be built as a system project.

    It's because data from all Sysconfig core contexts are used while generating code. 

    For more info please refer https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1324828/faq-mcu-sdk-build-error-expected-expression-rpmsgparams-vringtxtaseaddr 

    Regards,

    Tushar

  • Hello Tushar,

    as per the previous replay i build the ipc examples as a system project .i can able to see in my linux system terminal

    " Boot multi-core image: /home/user/ti/mcu_plus_sdk_am64x_09_01_00_41/examples/drivers/ipc/ipc_rpmsg_echo_linux/am64x-evm/system_freertos/ipc_rpmsg_echo_linux_system.release.appimage.hs_fs Done !!! " as a result .

    i have some doubts as mentioned below,
    1. after build the system project ,how to import that into ccs ,i tried with a regular way File->import->project->Browse. and after importing i try to flash the code into one of the core i can't able to find the binary(.out) of the project and debug folder was empty in project explorer do i need to build again ?how can i open and flsah the cores through ccs?

    2.in other case i am trying to implement the ipc(rpmsg) between r5-0_0  and m4 core so i have   enabled the ipc notify+rmnsg for m4 and r50_0 ,remaining all are disabled in example.sysconfig  and i try to compile the project and i am getting the error mentioned below

    " recipe for target 'syscfg/ti_drivers_config.o' failed
    syscfg/ti_drivers_config.c:203:88: error: expected expression
    rpmsgParams.vringTxBaseAddr[CSL_CORE_ID_M4FSS0_0] = (uintptr_t)(&gIpcSharedMem[]);
    ^
    1 error generated."

    how can i build this project and flash into the r5 and m4 core ?

    3. i am trying to run the ipc_echo_notify example code for two cores i build  it and flash the code into r5 and m4 but it is not printing  any print statements on the terminal or console but core are running ?is this the correct way to flash echo_notify binaries INTO cores?

    4.To achieve the ipc with examples ,can we flash the same example (rpmsg)in the two cores or one core loaded with a ipc_echo_notify and other with a ipc_rpmsg ?

    5.how to add the resource table in a project to flash/boot the remote cores in Linux ?

    thankyou,

    Raj Kumar

  • Hello Raj,

    Thank for your reply.

    1. after build the system project ,how to import that into ccs ,i tried with a regular way File->import->project->Browse. and after importing i try to flash the code into one of the core i can't able to find the binary(.out) of the project and debug folder was empty in project explorer do i need to build again ?how can i open and flsah the cores through ccs?

    After importing the system project into CCS, it will automatically import the projects for individual cores specified in the system.xml file. Please build the system project example and it will build the project for all individual cores. The binaries can be found in the Debug/Release folder of each project that is build during system project build steps.

    2.in other case i am trying to implement the ipc(rpmsg) between r5-0_0  and m4 core so i have   enabled the ipc notify+rmnsg for m4 and r50_0 ,remaining all are disabled in example.sysconfig  and i try to compile the project and i am getting the error mentioned below

    " recipe for target 'syscfg/ti_drivers_config.o' failed
    syscfg/ti_drivers_config.c:203:88: error: expected expression
    rpmsgParams.vringTxBaseAddr[CSL_CORE_ID_M4FSS0_0] = (uintptr_t)(&gIpcSharedMem[]);
    ^
    1 error generated."

    how can i build this project and flash into the r5 and m4 core ?

    The following FAQ  provides the explanation to build the IPC example for a single R5F core. If you want to enable IPC between R5F0 and M4F core only, then please disable the IPC between other cores in the example.syscfg file of both M4F and R5F project as shown in below picture.

    i am trying to run the ipc_echo_notify example code for two cores i build  it and flash the code into r5 and m4 but it is not printing  any print statements on the terminal or console but core are running ?is this the correct way to flash echo_notify binaries INTO cores?

    Can you please pause the cores and check where the program is getting stucked?

    4.To achieve the ipc with examples ,can we flash the same example (rpmsg)in the two cores or one core loaded with a ipc_echo_notify and other with a ipc_rpmsg ?

    Sorry, I didn't understand the question completely. Do you want one core(say M4F) to do IPC notify and the other core (say R5F) to do IPC RPMSG. Is this understanding correct?

    5.how to add the resource table in a project to flash/boot the remote cores in Linux ?

    Please refer MCU+SDK update linker file section for more details.

    Regards,

    Tushar

  • Hello Tushar,

    Thnakyou for your support !

    i am running M4 and R5-0_0 core with ipc_nottify_echo .And it is printing as mentioned below


    [IPC NOTIFY ECHO] Message exchange started by main core !!!
    ASSERT: 0.3491s: ../ipc_notify_echo.c:ipc_notify_echo_main_core_start:166: status==SystemP_SUCCESS failed !!!

    I disable the all ipc except m4 and r5-0_0(ipc_notify both) in example.sysconfig.

    why it is fail in between

  • Hello Raj,

    [IPC NOTIFY ECHO] Message exchange started by main core !!!
    ASSERT: 0.3491s: ../ipc_notify_echo.c:ipc_notify_echo_main_core_start:166: status==SystemP_SUCCESS failed !!!

    Can you please confirm have you also updated the gRemoteCoreId[] array in the ipc_notify_echo.c file?

    If not, please update the list of remote cores in ipc_notify_echo.c file.

    Please refer below code changes.

    uint32_t gRemoteCoreId[] = {
        CSL_CORE_ID_M4FSS0_0,
        CSL_CORE_ID_MAX /* this value indicates the end of the array */
    };

    After making the above changes the example should work fine.

    Please let me know if the above solution works.

    Regards,

    Tushar

  • Hello Tushar,

    Yes,It is working and thankyou for your support

    Regards,

    Raj Kumar.

  • Hello Raj,

    Yes,It is working and thankyou for your support

    Thanks for the confirmation. Happy to help Slight smile

    Regards,

    Tushar

  • Hello Tushar,

    Sorry for my confusion,

    When i run ipc_notify_echo between R5 and M4 core ,M4 core not running properly.

    The status of M4 core in DEBUG window is showing like running ,But it is not printing anything(i try to print a string in a very 1st line of main.c)

    Even the output in  the terminal is as mentioned below


    [IPC NOTIFY ECHO] Message exchange started by main core R5 !!!
    [IPC NOTIFY ECHO] All echoed messages received by main core from 1 remote cores !!!
    [IPC NOTIFY ECHO] Messages sent to each core = 1000000
    [IPC NOTIFY ECHO] Number of remote cores = 1
    All tests have passed!!

    i tried like,i modify the gRemotecoreId array in M4 also even it is not working and disable all the ipc of cores except M4 and R5(as a Ipc_Notify) in example.sysconfig.

    With ipc_rpmsg_echo also same problem ,How can i make it work?

    and one more thing ,

    can we able to modify the example code for the send and receive the msgs between the cores.

  • Hello Raj,

    Can you please check that the UART logs are enabled in the example.syscfg?

    Please refer image below.

    Regards,

    Tushar

  • Hello Tushar ,

    as we can't build ipc_rpmsg_echo example for individual core i followed below link and build it as a system project

     https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1324828/faq-mcu-sdk-build-error-expected-expression-rpmsgparams-vringtxtaseaddr

    After that, i required some changes in the example code so i imported  the project into into ccs after all changes has been made i try to build in ccs again it is showing error.So try to build as a system project but,whatever the i have done in the  ccs,didn't reflected on the example which is available in mcu+sdk .

    My ccs working directory is /home/user/Workdir_V2 (when i am importing prjoects from mcu+sdk ,copying to this Workdir_V2 directory ) .

    How do i compile the ipc with ccs or how can i build the modified code which is available in  /home/user/Workdir_V2 

    thankyou

  • Hello Raj,

    as we can't build ipc_rpmsg_echo example for individual core i followed below link and build it as a system project

     https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1324828/faq-mcu-sdk-build-error-expected-expression-rpmsgparams-vringtxtaseaddr

    After that, i required some changes in the example code so i imported  the project into into ccs after all changes has been made i try to build in ccs again it is showing error.So try to build as a system project but,whatever the i have done in the  ccs,didn't reflected on the example which is available in mcu+sdk .

    We already build IPC notify example without issues as discussed in this thread. Same steps needs to be followed for IPC RPMSG example also. 

    All you need is to keep the IPC RPMSG enabled for those cores which are being used, disable IPC for rest all cores.

    How do i compile the ipc with ccs or how can i build the modified code which is available in  /home/user/Workdir_V2 

    Please follow the similar steps as we did for IPC notify example.

    Regards,

    Tushar

  • Hello Tushar,

    I am trying to implement the ipc_rpmsg between m4 and r5-0_0 core. I disable all ipc_rpmsg_notify+echo except r5_0-0 and m4 in example.sysconfig.

    After that i try to build in ccs it is throwing an error,as per my understanding we have to build as a system project ,But i need some modifications in the code where it should continuously send the messages together and i was modify the code using ccs ,this modifications are reflected on Workspace(CCS Default directory) 

    1. how do i build the ipc project (for only two cores) ?

    2.Is there any other way to implement the ipc between M4 and R5-0_0?

  • Hello Raj,

    Can you please confirm, have you tried the above suggestions for building IPC example?

    Can you please share the error logs?

    If you are getting a different error than one which is asked in this thread, Can you please create a new thread?

    This thread may become confusing because at earlier replies you were able to build IPC example with some modification. Please refer https://e2e.ti.com/.../5102512 

    Thanks & Regards,

    Tushar

    •  Hello tushar,

    Thank you for your quick response.

    yes, i tried to build  the ipc as a system project and it can generates the a.out bin files also.But the thing is after i modify the example.sysconfig file for M4 and R5-00 cores , i try to build in a  ccs itself it is showing the error as mentioned below

    subdir_rules.mk:37: recipe for target 'syscfg/ti_drivers_config.o' failed
    syscfg/ti_drivers_config.c:156:88: error: expected expression
    rpmsgParams.vringTxBaseAddr[CSL_CORE_ID_R5FSS0_0] = (uintptr_t)(&gIpcSharedMem[]);
    ^
    1 error generated.
    gmake: *** [syscfg/ti_drivers_config.o] Error 1

    How do i solve this error, where disable the all ipc except the m4 and r5-00 core?

  • Hello Raj,

    Thanks for your reply.

    Can you please share the example.syscfg file for both the R5F0-0 and M4F core?

    What modification have you done?

    Are you able to build the example without any modification?

    Regards,

    Tushar

  • I can't able to build the example without modification also.But,i build as  a system project with make -s -C command and flash all the cores it is working fine.

    But i required IPC between M4 and R5-0_0 cores so i modified example.sysconfig file , i disable all ipc+rpmsg except those two cores.

    And i commented other cpu cores inside the gRemoteCoreId [] array

    1.Since it is a ipc example ,we have to build as a system project and i have made some changes with ccs so, how can i build it as a system project in ccs?

  • Hello Raj,

    1.Since it is a ipc example ,we have to build as a system project and i have made some changes with ccs so, how can i build it as a system project in ccs?

    To build the IPC RPMSG echo example for R5F0-0 and M4F0-0 core, please follow below steps.

    •  Import the ipc_rpmsg_echo example as a system project.
    • After importing the project open the system.xml file of the system project.
    • Remove the project for all the cores which are not being used. Please refer below screenshot.

    • Disable all the IPC in example.syscfg for the cores which are not using IPC. (i.e. cores other than M4F0-0 and R5F0-0)

    • Remove the not used CPU cores from the gRemoteCoreId [] array and save all the changes.
    • Build the system project.

    After following the above steps, You will be able to see the binaries are getting generated for core specific projects. 

    Please let us know if the above solution works.

    Thanks & Regards,

    Tushar

  • Hello Tushar,

    I modified the rpmsg_echo_linux example as a ipc between M4 and R50_0 it is working fine.

    But i have some doubts,

    1. How can i access the gpio's in A53,when the system was booted from sd card and i am using debian preemt_rt?
    2. is there any drivers in the linux to access the peripherals like gpio,ipc,sdl etc.
    3. How do i establish the inter process communication in linux?
    4. Right now i am using the linux example code which is there in Mcu+sdk ,how can i print the data in linux?

             5.I want to develop my entire application in Linux only ,where it will use the IPC,GPIO,SDL so how can i utilize the drivers and write a code in linux?

    thanks,

    Raj.

  • Hello Raj,

    I modified the rpmsg_echo_linux example as a ipc between M4 and R50_0 it is working fine.

    Thanks for the confirmation.

    Can you please create separate threads for each question as it covers different topics?

    Please create new threads for each query so that we can assign it to right experts.

    Regards,

    Tushar