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SK-TDA4VM: BOOT by eMMC Flash

Part Number: SK-TDA4VM
Other Parts Discussed in Thread: TDA4VM

Hi, Champ

we are developing board based on SK-TDA4VM, MMC connection is planned to change as follows for custom use.

MMCSD0 : eMMC flash (MTFC8GAMALBH-AAT) for BOOT/NOS. 
MMCSD1 :  micro SD card for storage such as image data
MMCSD2 : E key data lane

Is resource of MMCSDx allocation for eMMC / mSD / E key supported simultaneously?
Specially is it possible to boot TDA4VM by eMMC flash?

Could you let us know how to set SW/HW to boot via eMMC Flash  in SK-TDA4VM.?

I wonder if we can set eMMC Boot by setting [SW1] which is already located on the board. .

  • Hi Jaecheon 

    Is resource of MMCSDx allocation for eMMC / mSD / E key supported simultaneously?
    Specially is it possible to boot TDA4VM by eMMC flash?

    yes it is possible if you see the schematic of TDA4VM(j721e) we are using mmc0 instance for emmc and mmc1 instance for sd ,for E key which interface you want to use SDIO or UART?

    Could you let us know how to set SW/HW to boot via eMMC Flash  in SK-TDA4VM.?

    on sk-tda4vm we dont have the emmc flash connected to the host controller so we cant use the emmc boot mode.

    Regards
    Diwakar

  • SDIO or UART?

    MMC2 for SDIO
    UART9 for E key has been migrated to UART8.

    we dont have the emmc flash connected to the host controller so we cant use the emmc boot mode.

    Could you let us know how to set SW/HW to boot via eMMC Flash  in TDA4VM88 ?

    Which HW strap pin or SW setting would work for eMMC boot mode ? I couldn't find the information. 
     

  • The details on setting processor bootmode is in TRM document, Section 4.3 Boot Mode Pins.  Details include how to set primary and backup boot devices.  Please review and let us know if you have additional questions.

  • Thanks. I have checked the document.

    So, I changed CPLD code like this from SK-TDA4VM.
    In this way I think I don't have to modify schematics for adding eMMC & its boot mode.
    If I am wrong, it would be glad to add comment for it. 



    Since DIP Switch setting [3:1] =b'111 BOOT_xSPI_SFDP is not being used in user manual of SK-TDA4VM, I used b'111 as eMMC. 
    Changed value from  7'h69 to 7'h11 in CPLD code.

     

    localparam BOOT_SD        = 7'h9;   // boot value = {mcu_bootmode[5:3], sys_bootmode[6:4],sys_bootmode[0]}

    localparam BOOT_NB        = 7'h73;             // sys bootmode[3:1] is using dummy logic

    localparam BOOT_USB0      = 7'h21;            // To be updated once final implementation is confirmed

    localparam BOOT_USB1      = 7'h29;

    localparam BOOT_xSPI_1S   = 7'h61;           

    localparam BOOT_UART      = 7'h70;          

    localparam BOOT_PCIE      = 7'h53;

    localparam BOOT_xSPI_SFDP = 7'h69; -> 7'h11

    DIP Switch [3:1] (SW1)

    localparam

    boot value

    000

    BOOT_SD

    7'h9

    001

    BOOT_NB

    7'h73

    010

    BOOT_USB0

    7'h21

    011

    BOOT_USB1

    7'h29

    100

    BOOT_xSPI_1S

    7'h61

    101

    BOOT_UART

    7'h70

    110

    BOOT_PCIE

    7'h53

    111

    BOOT_xSPI_SFDP

    7'h69

  • And another question about CPLD in SK-TDA4VM. 
    I see there is no clock input for CPLD. 

    So this CPLD doesn't have any latch triggering for its input signals, right?

  • CPLD implementation is passive logic - so no clock and no latching.  The processor does the latching of the BOOTMODE values at the time of de-assertion of power-on reset.