AM62A7: BT656 Support

Hello,

We do support BT656 in the HW and there is not limitations on the SW. The TRM is referring to VP1_CONFIG register (address 3020 A000) and setting bit 20.

Regards,
Krunal

Hello,

How to set register?

devmem2 or iowrite32?

Regards,

Kim

Hi Kim,

Yes, devmem2 <address> <value>.

Regards,
Krunal

Hi Krunal

I set 0x00100004 at address 3200A000 using devmem2, but 24 bits of DATA are still being output. As far as I know, 8 bits should be output. Did I do something wrong?

Regards,

Kim

Hi Kim,

At the moment, you have nothing connect to the output of DPI side? You are just manually programming the DSS register and probing the data lines? I am just trying to understand your setup so I can guide you further. 

Regards,
Krunal

HI, Krunal

We use sk-am62a-lp board On the SK board, I am using it with HDMI connected to the DPI side.

In that state, after boot changing the register value with devmem2 and I measured the VOUT_DATA PIN on the SiI9022 chip with an oscilloscope and confirmed that the 24-bit waveform was still being output.

Is the way I checked wrong?
If it is a mistake, is there a way to check whether the format is applied properly after changing the register?

Regards,

Kim

Hi,

I am checking internally and I will get back to you by end of the day.

Regards,
Krunal

Hi,

I checked internally and wanted to share the following:

1. If you are using our EVM for BT656 testing, you would need to modify the HW connections. For example, refer to data mapping in: Figure 12-518. DISPC VP Data Mapping for BT.656 Mode

2. The SII9022A only supports input format of RGB so you would need to customize the driver to add support for YUV. The driver is not maintained by TI so you would need to check for support with community.

3. Since our EVM does not support BT656, we need to add support for it in the TIDSS driver. At the moment, support is not included since we do not have local support for it in our EVM. 

in terms of your experiment, there is a bug in the TRM and the address of the VP1 register is incorrect. It should be 0x3020B000 instead of 0x3020A000. Also, the config register is shadow register so you need to set GO BIT in control register (0x3020B004 bit 5) as well.

Regards,
Krunal

hi

We wanted to use BT656 in a custom board we would make later and wanted to test it on EVM first.

We won't be using the sll9022a chip, so item 2 is fine, but I think there's a problem with item 3.

Is there a guide I can refer to for working with the BT656 code on a custom board?

Lastly, what symptoms do I get when I set the 3020b000 register?

For example, there is no HDMI output?

Regards,

Kim

1. No we do not have any programming guide for BT656.

2. I am not sure I understand the question but VP1 connects to DPI output and the register for that is 0x3020B000.

Regards,
Krunal

What I mean is, is there a way to check whether bt656 comes out after setting 3020b004 bit5 and 3020b000 bit 20?

Is it correct that data comes out only from 2-9 bits after setting?

Or hdmi is not coming out?

We have not tested BT656 on our platforms and you cannot use SII9022A(HDMI converter) as a reference because the driver does not support BT656. For all we know it could be requesting DSS to output in RGB mode since that's all it supports. In general, if you have BT656 mode selected, all the relevant data would be on bit[2-9] and bit[12-19]. The other data lines are not outputting anything meaningful.  

Regards,
Krunal

Thank you for your support.

I'm Kim TaeJung's coworker.

Our custom board is being made and will available soon. It doesn't have SII9022A and outputs as BT.656.

Before verifying it in our custom board, we want to do it in EVK first.

You're right. SII9022A doesn't support BT656.

So we tried to verify it with signal such as data line, sync line after setting a register value you mentioned.

According to our test, even though changing a register value, we could observe all signal such as Data 0 ~ 23, Vsync, Hsync. And it didn't seem to have any effect on SII9022A.

We think it means that output formats doesn't change from DPI to BT656.

Our test's procedure was as below.

- EVK boot up -> Change the register value to apply BT6565 -> Observe the signal

Please let us know if we've misunderstood anything.

Thanks.

BRs,

Dongwoo

Hi,

Based on my internal discussions with SW dev team, few things to consider:

1. Input buffer: There is a CSC conversion for YUV to RGB in the videpipeline. If you are inputting YUV formats, you will need to program the coefficints for the CSC converter.

2. Overlay manager: It expects RGB and then there is a CSC conversion from RGB to YUV for Video Port(output). You also need to program the coefficient for the CSC converter. 

3. Enable BT mode and verify the signal. I understand that other lines are toggling but is the data present on lines VOUT0-D2-VOUT0-D9 VOUT0-D12-VOUT0-D1 accurate?

Regards,
Krunal

Hi,

I was internally talking with my HW IP colleague and he mentioned it should be as simple as setting the BT bit in the VP config register. Also, what test are you running while data is toggling? Because the internal colorbar test will output and toggle all the RGB bits (no support for BT) and kmstest will also output in RGB24 format.

Regards,
Krunal

Hi Krunal,

Thank you for your kindly support. 

You mentioned 2 things.

One is S/W part and other is H/W part.

Do you mean we need to apply all of them?

Or do we just need to apply the H/W part?

If we also need to apply S/W part, is there any reference documents for it?

Additionally, there was a mistake in our testing. We confirmed that the mode was changed to BT656 after setting the register you mentioned(0x3020B000),

BRs,

Dongwoo.

Additionally, there was a mistake in our testing. We confirmed that the mode was changed to BT656 after setting the register you mentioned(0x3020B000),

[KB] Just to confirm, you are now seeing BT656 on your output?

If we also need to apply S/W part, is there any reference documents for it?

At the moment, we do not have any documents but you can port the devmem configs to the tidss driver.

Regards,
Krunal

Hi,

Please see my answer for your question.

Just to confirm, you are now seeing BT656 on your output?

-> Yes. We thought the format was changed to BT656 because we could only observe the signal for D0 ~ D9.

I am not sure that we have to apply the below.

2. Overlay manager: It expects RGB and then there is a CSC conversion from RGB to YUV for Video Port(output). You also need to program the coefficient for the CSC converter. 

Can you confirm if we have to do it or not?

Thanks.

BRs.

Dongwoo.

Yes. We thought the format was changed to BT656 because we could only observe the signal for D0 ~ D9.

[KB] What did you change, just the one bit for BT656 and the go bit? Also, what test did you run?

2. Overlay manager: It expects RGB and then there is a CSC conversion from RGB to YUV for Video Port(output). You also need to program the coefficient for the CSC converter. 

[KB] Let's review the data flow. First, it depends on your input format: YUV or RGB. If it's RGB, the data will be passed to the overlay manager and if your input data is YUV, it will get converted to RGB through a CSC converter. Overlay manager expects data in RGB mode, so conversion needs to happen only for YUV input. Next, overlay manager will pass data to Video Port and Video Port will stream the data in either RGB or BT656 mode. Since you are selecting BT656 mode, you will need to program the CSC to convert RGB to YUV. By default, this does not happen in our driver since we output in RGB mode.

Regards,
Krunal

Hi,

Please see my answer.

- [KB] What did you change, just the one bit for BT656 and the go bit? Also, what test did you run?

-> We are using Vision SDK. When the board was booted, we could see the below image. After setting register, the displayed image was changed as below. And the signal was only observed for D0 ~ D9 as I mentioned before.

- Since you are selecting BT656 mode, you will need to program the CSC to convert RGB to YUV. By default, this does not happen in our driver since we output in RGB mode.

-> Does this mean the  the driver needs to be modified in addition to the H/W register settings? And is there no reference document to do it?

Thanks.

BRs

Dongwoo

Hi,

Krunal is out of office this week. Please expect delayed response.

Hi,

Okay, I'll check further and then contact you again.

Regards,

Kim