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TMDS64EVM: About changing interrupt priority

Part Number: TMDS64EVM


Hello TI support team.

Please tell me about CR5's DMTIMER interrupt.
Set the interrupt priority of DMTIMER0 to 1.
Is it possible to change the interrupt priority to 3 and back to 1 in the DMTIMER0 interrupt handler?
I would like to divide the priority by processing within the interrupt handler as shown below.

void CR5_DMTIMER0_interruptHandler(void *args)
{
	// priority=1 (Interrupts with priority=2 can not be generated.)
	f1(); // f1 is executed

	// here, change to priority=3. 
	set_priority(3);

	f3(); // f3 is executed, but interrupts with priority=2 can be generated.
	
	// reset priority = 1
	set_priority(1);
}

Best regards,
Kiyomasa Imaizumi.

  • Hello Kiyomasa Imaizumi,

    This step is not recommended.

    Actually, priority setting should be configured based on your system analysis.

    Let's say you have many interrupts for different peripherals. In that case, you need to define which is the priority needed to give for each peripheral.

    Once have done this analysis, we will initialize all the priority settings during peripheral initializations and when the Application is running we never touch the priority of particular peripheral which creates any impact on your system.

    Really I don't understand why you are trying to do the above priority change ?

    Regards,
    S.Anil.
  • Hello Swargam Anil

    Thank you for your reply.


    I'll explain to you why I want it this way.

    CR5 receives interrupts from PRU at 20kHz.This should be priority 1.
    Also, CR5 receives an interrupt at 4kHz from CA53. This is given priority 2.
    When I checked the operation, 20khz and 4khz are not synchronized.

    When I check the oscilloscope using the 4khz interrupt as a trigger,
    the 20khz interrupt moves within the 4khz interrupt and overlaps as below.

    There are processes within the 4khz interrupt that I don't want to delay periodically.
    However, since the 20kHz interrupt moves and comes in, the 4kHz interrupt processing is delayed.
    In order to eliminate this, I wanted to change the interrupt priority so that 20khz interrupts do not occur within 4khz interrupts.

    Is there something wrong with the system design?
    I wish the 20khz interrupt from Pru didn't move relative to the 4khz interrupt.

    Best regards,
    Kiyomasa Imaizumi.

  • Hello Kiyomasa Imaizumi,

    In your above experiments there are 3 interrupts on R5F and those interrupts coming from R5F, A53 and PRU.

    And all 3 interrupts are triggered at the same time at some point, in this case, the 4KHz interrupt is delayed due to the other interrupt process.

    Now, in your system, the Timer interrupt (4Kz) should have the highest priority if all interrupts are triggered at the same time.

    So, try to give the highest priority of 4KHz time and give lowest priority for PRU and other interruptions.

    In this case, if all interrps are triggered at the same time, your 4Khz interrupt will be executed first.

    This analysis you need to do for the entire application and not recommend to change priority settings of IRQ in run time again.

    It will impact on your entire system.

    0 is highest priority and 15 is Lowest Priority .

    Regards,

    S.Anil.