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DDR HS Bypass caps

I'm working on a TI814x design.

Looking at p286 of the revB DM814x datasheet.  It says 40 capacitors are required for high speed (HS) decoupling of the DDR +1.8V supply.  I'm finding it hard to see how you put 40 0402 caps underneath the quadrant on the DM814x that has the DDR interface.  Do you have an example PCB layout that shows this?.

Also, the total capacitance required is quoted as 2.4uF.  This means each cap should be 0.06uF.  Normally we would use 0.1uF.  Is this correct?.

 

I'd be interested on how these numbers were derived.  Simulations?.

thanks

Steve

  • Hi Steve,

    We are also working on a DM814x design and we are also wondering how to fulfill the datasheet requirements on high-speed decoupling of the DDR EMIF.

    - How did you implement the decoupling?

    - Did you succeed using 0402 capacitors?

    - Did you come close to the specified number of capacitors within the specified area around the supply balls?

    Thanks, Hans