PROCESSOR-SDK-AM64X: LockStep Error Processing

Overall related to safety on AM6442 the best starting point is the safety manual available via registering at the product page, copied here for convenience:

Functional safety advanced documentation is available for AM64x. Request now

Christopher Holland said:

"Lock-Step Error-Processing"

Do you mean hardware CPU lock step operation or something higher level in SW? see for example:

https://community.arm.com/arm-research/b/articles/posts/error-correlation-prediction-for-lockstep-processors-in-safety-critical-systems 

https://community.arm.com/arm-community-blogs/b/embedded-blog/posts/flexible-approach-to-adding-functional-safety-to-a-cpu 

Software architecture with one core running channel A and another channel B and checking each other is beyond the SW offering from TI.

Christopher Holland said:

When both RT processors are running in "Lock-Step", my job is to implement code to perform error processing.

What processors or CPUs are you referring to? On AM6442 there is two Cortex A53's and 4 R5's. A53 in general does not support hardware lock-step. The R5 cores can in some devices support such as https://www.ti.com/product/AM2634 support CPU lock step. But AM6442 R5 core do not support CPU lock step.

Christopher Holland said:

Then, there would be a way to "Inject a fault" to test the failure.

Accross the TI portfolio in many devices we provide a safety diagnostics library https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/09_01_00_41/exports/docs/api_guide_am64x/SDL_PAGE.html that includes fault injection. For R5 implementations like https://www.ti.com/product/AM2634 with CPU lockstep there are further fault injection mechnaisms.

  Pekka