Hello All,
DM8168 I2C peripheral clock frequency (f(SCL)) generation does not seem to follow the equations given in the sprugx8 1July2011 Technical Reference Manual.
Given:
tHIGH = (SCLH + 5) * ICLK time period
tLOW = (SCLL + 7) * ICLK time period
Given: f(sysclk6)=123.4MHZ
f(iclk)=f(sysclk6)/(PSC+1)
f(iclk)=123.4MHZ/5=24.7MHz
PSC=4
Let: f(scl)=400KHz
SCLH=[(1/400KHz)(1/2)(24.7MHz)]-5=25.88=>26=0x1A
SCLL=[(1/400KHz)(1/2)(24.7MHz)]-7=23.88=>24=0x18
f(scl)=f(iclk)/[(SCLH+5)+(SCLL+7)]
f(scl)=24.7MHz/(26+5+24+7)=24.7MHz/62=398KHz
However, actual measured f(scl) frequency equals 154.9KHz.
Can you explain the cause of discrepancy between the calculated versus measured f(scl) frequency?
Best Regards,
Jeff
