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AM6442: Sharing MAIN GPIO interrupt between r5f and a53

Part Number: AM6442
Other Parts Discussed in Thread: TMDS64EVM, SYSCONFIG

Hi,

is it possible to share the gpio interrupt of the main gpio interface? 

I've seen the documentation:

AM64x MCU+ SDK: GPIO Input Interrupt

And also the forum entry:

[FAQ] AM64X: How to Run MCU+ SDK GPIO_INPUT_INTERRUPT example for R5FSS0-0 with Linux running on A53 - Processors forum - Processors - TI E2E support forums

It is somehow possible the share the interrupt between A53 (linux) and R5F?

BR
Artur

  • Hello Artur,

    Thanks for reaching out to Texas Instruments E2E support forum.

    is it possible to share the gpio interrupt of the main gpio interface? 

    Unfortunately, It is not possible to configure a GPIO bank interrupt to be routed to more than one core at a time. Please refer AM64x MCU+ SDK: GPIO Input Interrupt.

    Please refer to the below screenshot.

    Regards,

    Tushar

  • And what are the routings for?

    should this be enough?

    &main_gpio_intr {
       status = „reserved“;
    };


  • Hello Artur,

    A similar query has already been solved in another thread.

    Please try the step suggested here

    Please let us know if the above information helps.

    Regards,

    Tushar

  • Hallo Tushar,

    the thread about interrupt routing does not write anything about the devicetree. 

    Should it be enough for me to change the router no. 0 to the r5f core in the Resource Management file?

    And what about resouce sharing?

    Regards,

    Artur

  • Hello Artur,

    Thanks for your reply.

    Should it be enough for me to change the router no. 0 to the r5f core in the Resource Management file?

    And what about resouce sharing?

    Please do the device tree changes as mentioned in the MCU+SDK's documentation page.

    After doing the changes build the k3-am642-evm.dtb file from the modified k3-am642-evm.dts file. Also follow the steps mentioned in the FAQ shared above for interrupt routing.

    After changing the rm-cfg file, rebuild the u-boot.

    After building U-boot, Replace the tiboot3.bin file in the SD card with the newly created tiboot3.bin file.

    Also replace the original k3-am642-evm.dtb with the newly created k3-am642-evm.dtb file. 

    After doing the above mentioned changes you should be able to route GPIO interrupts to R5F core while Linux is running on A53 core.

    Please let us know if the above solution works.

    Thanks & Regards,

    Tushar

  • Hi,

    when I add this to my device tree:

    &main_gpio_intr {
       status = "reserved";
    };

    I can't use gpios in linux at all.

    We are trying to get an interrupt from peripheral gpio 1:



    Therefore a thought I had to reserve the main_gpio_intr in the device tree.

    Should it be enough to reserve the mcu_gpio_intr in the device tree and set the correct routing in the resource management file?

    Regards,

    Artur

  • Hello Artur,

    I see you are trying to get an interrupt from GPIO1, on that note, based on your above response looks like you are on TMDS64EVM. 

    I would like to know if the GPIO line you would be interested in is highlighted in one of the green section marked in the Attachment 1 below.

    NOTE: I am asking this because in SysConfig attachment you sent above, the GPIO pin is configured to SoC_I2C1.


    Attachment 1

    Looking forward to your response.

    Regards,

    Vaibhav

  • Hi,

    no, we are using our custom board. We do not use the i2c1.

    The gpio-pin is not used used in linux:

    &main_gpio1 {	
    	gpio-line-names = "", "", "", "", "", /* 0 */
    		"", "", "", "", "", 
    		"", "", "", "", "", /* 10 */
    		"", "", "nLATCH", "", "DO_EN",
    		"", "", "", "", "", /* 20 */
    		"", "", "LED_rd_LP1_CAN", "", "",
    		"", "", "", "", "", /* 30 */
    		"", "", "LED_gn_LP1_CAN", "", "",
    		"", "", "", "", "", /* 40 */
    		"", "", "", "", "",
    		"", "", "", "", "", /* 50 */
    		"", "", "", "", "",
    		"", "", "", "", "", /* 60 */
    		"", "", "", "", "",
    		"", "", "", "", "", /* 70 */
    		"", "", "", "", "",
    		"", "", "", "", "", /* 80 */
    		"", "";
    };

  • Hello Artur,

    Thanks for sharing the above details.

    I am routing your query to one of our team member who is more familiar with Linux development.

    Please expect a response in a day or two.

    Regards,

    Tushar

  • Hi Artur,


    &main_gpio_intr {
       status = "reserved";
    };

    I can't use gpios in linux at all.

    Yes, by doing this, Linux will block you from accessing all Main Domain GPIOs.

    You should only need to reserve the MCU GPIOs to make sure no other core is accessing them.

    Thanks,
    Anshu

  • Hi Anshu,

    Ok. So I just have to do the interrupt routing correctly in Resource Management?

    We have already tried many things but so far without success.
    What should the resource management look like if we want to set an interrupt from the GPIO1_66 in the R5F?

    Our current interrupt routing is this:

    /* Main GPIO Interrupt Router */
    		{
    			.start_resource = 0,
    			.num_resource = 12,
    			.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
    					RESASG_SUBTYPE_IR_OUTPUT),
    			.host_id = HOST_ID_A53_2,
    		},
    		{
    			.start_resource = 0,
    			.num_resource = 12,
    			.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
    					RESASG_SUBTYPE_IR_OUTPUT),
    			.host_id = HOST_ID_MAIN_0_R5_1,
    		},
    		{
    			.start_resource = 12,
    			.num_resource = 2,
    			.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
    					RESASG_SUBTYPE_IR_OUTPUT),
    			.host_id = HOST_ID_MAIN_1_R5_1,
    		},
    		{
    			.start_resource = 14,
    			.num_resource = 2,
    			.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
    					RESASG_SUBTYPE_IR_OUTPUT),
    			.host_id = HOST_ID_MAIN_1_R5_3,
    		},

    But it does not work.

    Regards,

    Artur

  • Hi Artur,

    I will look into this and get back to you.

    Thanks,

    Anshu

  • Any news on this?

    Regards,

    Artur

  • Hi Artur,

    I haven't had a chance to look at this due to a high priority customer escalation. I'll send it back to the MCU+ team to see if they can comment.

    Thank you for your patience,

    Anshu

  • Hi Anshu,

    I got it already working. 

    But unfortunally it it not possible to configure the interrupts via sysconfig, because sysconfig only allows to select router 7 as max. But I needed to use 8 or 9, therefore I had to implement the generated code for myself.

    Why isn't it possible to select router 0-15 in sysconfig?

    Regards

    Artur

  • Hello Artur,

    I got it already working. 

    Thanks for the confirmation.

    But unfortunally it it not possible to configure the interrupts via sysconfig, because sysconfig only allows to select router 7 as max. But I needed to use 8 or 9, therefore I had to implement the generated code for myself.

    The Sysconfig tool will not show the option to select routers from 8 to 15. This is because the sysconfig tool is taking the device router id from k3BoardConfig.json file which only defines router from 0 to 7 for r5fss0-0 core in AM64x SOC.

    If you want to use router 8 or router 9, you will need to update the k3BoardConfig.json file to define the router id you want to use. The k3BoardConfig.json file is located at ${MCU+SDK}\source\drivers\.meta\gpio\soc. 

    After updating the K3BoardConfig.json file you will be able to see the option to select specific router id defined.

    Please let us know if this information helps.

    Regards,

    Tushar