TMS320DM8168: Supporting VIN[0] 24-bit and VIN[1] 16-bit simultaneously

Rohith Ravi

Part Number: TMS320DM8168

Hi,

We are looking for supporting two video Capture inputs simultaneously - VIN[0] as 24-bit and VIN[1] as 16-bit. As per the datasheet support is available for the same.

But on checking the IOMUXing of these interfaces, we found that some of the pins are conflicting with each other. Kindly let us know how we can overcome this situation and make use of two video capture input - 24-bit and 16-bit independently. The conflicting signals are given below.

Pin Number	VIN[0] 24-bit functionality	VIN[1] 18-bit functionality
AT5	VIN[0]A_D[16]	VIN[1]A_HSYNC
AL5	VIN[0]A_D[17]	VIN[1]A_VSYNC
AK5	VIN[0]A_D[18]	VIN[1]A_FLD
AK4	VIN[0]A_D[19]	VIN[1]A_DE

Thanks & Regards,
Rohith M Ravi

over 1 year ago

0 Charles Tsai over 1 year ago

TI__Guru**** 191486 points

Hi,

First of all, sorry, we no longer provide direct technical support on forum for this product. Having said that, what I read from the datasheet is as follows. You should be able to get for example a 24-bit input and another 16-bit input on Video Input 0 Terminal (VIN[0]). In another word, shouldn't you be looking at VIN[0]B_HSYNC instead of VIN[1]A_HSYNC?

• Two (one 16-bit, 24-bit and one 16-bit) independently configurable external video input capture ports (up to 165 MHz).

– 16-bit and 24-bit HD digital video input or dual clock independent 8-bit SD inputs on each capture port.

• VIN[0] can accept single-channel 16-bit, 24-bit (YCbCr and RGB) video or dual-channel 8-bit (YCbCr) video.

• VIN[1] can accept single-channel 16-bit (YCbCr) video or dual-channel 8-bit (YCbCr) video

As recommended on the product folder and in FAQ , please feel free to reach out the 3rd parties listed in them for additional support. You may search the E2E forum for archived posts of previous discussions which may help address your questions. Sorry for lack of guidance.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/813421/faq-davinci-digital-media-devices-support-guidance-dm335-dm355-dm365-dm368-dm369-dm3725-dm3730-dm383-dm385-dm388-dm505-dm640-dm642-dm643-dm6431-dm6433-dm6435-dm6437-dm6441-dm6443-dm6446-dm6467-dm6467t-dm647-dm648-etc

0 Rohith Ravi over 1 year ago in reply to Charles Tsai

Prodigy 160 points

Hi Charles,

As per my understanding, VIN[0] can accept either 16-bit, 24-bit (YCbCr and RGB) video or dual-channel 8-bit (YCbCr) video, which means it can accept either single 24bit or 16bit input or dual 8bit. So From VIN[0] alone we cannot have support for two channels of 24bit and 16bit.

As I mentioned earlier, so when checking for 24bit on VIN[0] and 16bit on VIN[1] some pins are getting conflict which limits the usage of both together independently.

Thanks & regards,
Rohith M Ravi

0 Charles Tsai over 1 year ago in reply to Rohith Ravi

TI__Guru**** 191486 points

Hi,

Per datasheet, it is my understanding. It says it can support (one 16-bit or 24-bit) and another 16-bit channel. In anycase, please consult with the listed party partners in the FAQ.

0 Rohith Ravi over 1 year ago in reply to Charles Tsai

Prodigy 160 points

Hi Charles,

We tried contacting the contacts provided in the FAQ but didn't receive any response for the same. Kindly let us know if any other contact is available for checking this query.

Thanks & Regards,
Rohith M Ravi

0 Charles Tsai over 1 year ago in reply to Rohith Ravi

TI__Guru**** 191486 points

Hi Rohith,

Reading the HDVPSS chapter of the TRM https://www.ti.com/lit/pdf/sprugx8, it seems to suggest that if you use one VIP for 24-bit then the other VIP can only be 16-bit or two 8-bit. From your initial post question, you seemingly want to use one VIP for 24-bit and another for 18-bit as shown in your table. Is that a typo? I suppose that due to the pinmuxing limitation, if you are going to use VIP 0 for 24-bit RGB then you can only use VIP 1 for 16-bit with Embedded Sync and not Discrete Sync.

0 Rohith Ravi over 1 year ago in reply to Charles Tsai

Prodigy 160 points

Hi Charles,

Sorry for the confusion. As you mentioned, the 18bit is a typo and the requirement is VIN[0] 24bit and VIN[1] 16bit.
As per your explanation, what I understand is that VIN[1] can be used to support 16bit but it will be without the discrete sync and the embedded sync function needs to be used. That means when using the VIN[1] 16bit along with VIN[0] 24bit, the 16bit VIN[1] will not have the HSYNC, VSYNC, FLD and DE signals.
Please let me know if my understanding is correct.

Thanks & Regards,
Rohith M Ravi

0 Charles Tsai over 1 year ago in reply to Rohith Ravi

TI__Guru**** 191486 points

Rohith Ravi said:
That means when using the VIN[1] 16bit along with VIN[0] 24bit, the 16bit VIN[1] will not have the HSYNC, VSYNC, FLD and DE signals.

Hi Rohith,

Yes, that is also my understanding based on the various comments from the datasheet and TRM.

0 Rohith Ravi over 1 year ago in reply to Charles Tsai

Prodigy 160 points

Hi Charles,

Thanks for the update. We would also like to know if the Camera feature with embedded sync and discrete sync are already tested by TI and if the source code for the same is available.

Thanks & Regards,
Rohith M Ravi

0 Charles Tsai over 1 year ago in reply to Rohith Ravi

TI__Guru**** 191486 points

Hi Rohith,

All available software examples will be part of the SDK and libraries.

Processors

Processors forum

TMS320DM8168: Supporting VIN[0] 24-bit and VIN[1] 16-bit simultaneously