Other Parts Discussed in Thread: OMAPL138
Hi
Iam experiencing some serious data capture problem in OMAPl138 upp.. Please find some of the observations
Currently we are devolping a data acquistion product using OMAPL138 and FPGA. ADC's are connected to the FPGA, FPGA samples the data and send to the OMAP using uPP interface. Iam running linux in ARM in OMAPl138. FPGA code devolper have given some changing test pattern which runs continuously. the test pattern is In 1st buffer he gives 0x0000 - 0x01ff, 2nd pass will be 0x200 - 0x3ff, 3rd pass will be 0x400 - 0x5ff.. so on..
For the sampling rate of 200Khz inside FPGA,FPGA gives every 2.5ms GPIO interrupt for 3K x 16[6Kb] data. Inside the GPIO handler, i will set the uPP DMA d0 -D2 registers, capture the entire data of size 3K x 16.. Iam using 6 lines, with each line having count of 0x400..Iam using pend bit to check DMA completion. For this case my data gets corrupted. On viewing LA, we found small low to high pulse of 10us in wait signal. FPGA code devolper uses wait signal(low) as reference before start pumping data through uPP.. In further debugging if i add some small delay , i found this glitch disappeared.. but after few milliseconds the same data corruption appears in the LA.. The data corruption is first few bytes are wrong in incremental pattern..
For the sampling rate of 2Khz inside FPGA, FPGA gives every 70ms GPIO interrupt for 3K x 16[6Kb] data.. Iam using the same approach as above, but i get rarely data corruption..
Settings for the uPP DMA will be
uPPD0 - Some DDR memory
uppD1 - 0x00060400
uPPD2 -> 0X00000400
Kindly suggest me is this problem due to pend bit polling? Currently iam entirely running the code in kernel space alone...
Regards
Vijayabharathi C
