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DM355 DDR2 Configuration Procedure



Hi,

We are currently in mass production of a consumer product based on the DM355. I am having a problem where about 1% of my production units do not boot properly. We have found that the issue is temperature dependent, and I have narrowed it down to the DDR2 configuration procedure.

We are using our own bootloader (both ubl and abl.)

The DDR2 configuration procedure I am using is found in section 2.14.2 of the DDR2 Memory Controller Reference Guide. I follow this procedure almost exactly, minus step 5 in which the PSC performs a syncreset and enable on the DDR2 controller. The reason I left this out is because TI's UBL/dm355Init.c comments this code out. In fact, there are enough differences between the procedure in the Reference Guide and dm355Init.c that I am wondering if there is another procedure out there? Why the significant differences? Is anyone familiar with this code?

Thanks,

JPM

 

  • Hello JPM,

    I too have been looking at this DDR initialization sequence (i.e. SYNCRESET, ENABLE)  to try to understand why even though it was clearly described in TI's DM355 datasheet (document sprueh7d DDR2 memory controller, page 37) but yet it was not included in the UBL code that I have.  I have determined that this snippet of code was indeed the cause of the small percentage of reset failures in our DM355-based product.  Our failures BTW don't appear to be temperature related.

    My guess is the UBL code we are using is not the latest code.  I have looked at the equivalent code in the latest DM355 TI SDK and found this code snippet in place.  Perhaps your UBL code is also a little older.  

    Regards,

    WM