circuit question about NOR flash in NETRA EIO board

KS Lin

Prodigy 100 points

The schematic of NETRA EIO board page 3, there are 2 GPMC_A15,

why ball L9, and ball J1 of DM8168 connect together ?

If I want to use the NOR flash, which one is correct or better ?

Thanks a lot

over 13 years ago

0 MarcPyne over 13 years ago

TI__Mastermind 25055 points

Hello,

Both of those pins can serve as GPMC_A[15], depending on what pin muxing is chosen (see the GPMC Terminal Functions table in the datasheet.) Which one is best depends on what other muxed functionality you might want to use.

Regards,
Marc

0 KS Lin over 13 years ago in reply to MarcPyne

Prodigy 100 points

Hi Marc,

I would like to know the F/W default setting for GMPC_A[15] in current EZ-SDK ?

is J1 or L9 of DM8168 serves as GMPC_A[15], I would like to follow the F/W default setting for our application.

Thanks

0 MarcPyne over 13 years ago in reply to KS Lin

TI__Mastermind 25055 points

Hi KS,

Are you booting from NOR?

Regards,
Marc

0 MarcPyne over 13 years ago in reply to KS Lin

TI__Mastermind 25055 points

KS,

The pin settings are in this file: arch/arm/cpu/arm_cortexa8/ti81xx/lowlevel_init.S inside nor_gpmc_init().

The pin mux for both pins (L9 & J1) are set to 1 (i.e. GPMC_A15) but only if CONFIG_NOR_BOOT is set/define.\

Regards,
Marc

0 KS Lin over 13 years ago in reply to MarcPyne

Prodigy 100 points

Hi Marc,

Thanks for your reply.

The NOR flash is an optional for our application.

KS Lin

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circuit question about NOR flash in NETRA EIO board