TMS320C6657: interrupt response time of TMS320C6657

Chen Zhiming

Prodigy 45 points

Part Number: TMS320C6657

Hi, I am using C665x DSP to develop a data communication software.

The development environment is as follows:

1. Device: TMS320C6657, run clock = 800MHz;

2.CCS V5.5;

3.No real-time OS is used;

4. Only One GPIO Interrupt is used, and the interrupt signal is generated externally, period = 6.4uS;

5. Software is running in internal ram;

I measured the time from GPIO Interrupt Signal to enter Interrupt Service routine, it changes greatly,

and the maximum time is about 2.0uS(1600 cycles).

Is there a method to shorten this time?

over 1 year ago

0 Shankari G over 1 year ago

TI__Mastermind 25535 points

Chen,

Few methods here:-

1. Any possibility of software optimization in your code?.

2. How about running the core at 850 MHz? C6657 is capable of running at 850 MHz.

3. Review your measuring methods. For example, inherit some other measuring methods like reading TSCL/H registers, calculating the time, compare and verify with that of GPIO.

Regards

Shankari G

0 Chen Zhiming over 1 year ago in reply to Shankari G

Prodigy 45 points

Thanks for your reply.

1. Optimization is used, Level=3;

2. Let the Core running at 850 MHz is possible, but the interrupt latency is too big which is more than 1600 cycles,

so, the difference is small even if the core is running at 850MHz.

3. The GPIO interrupt signal is generated externally, so i think is difficult to use the TSCL/H registers to measure the

interrupt latency.

and i just want to make it clear, the time i want to shorten is the time from GPIO Interrupt active to interrupt service routine, not

the time of service routine itself.

Regards

0 Shankari G over 1 year ago in reply to Chen Zhiming

TI__Mastermind 25535 points

Chen,

Please post me the code. Let me try to replicate the interrupt trigger and the service routine and check in my environment and board.

Regards

Shankari G

0 Shankari G over 1 year ago in reply to Shankari G

TI__Mastermind 25535 points

Chen,

Please check the FAQ below and the doc enclosed about "configuring interrupts".

It may help you to some extent in comparing your code...

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1309303/faq-tms320c6678-how-to-configure-interrupts-and-test-on-keystone-i-devices---c6678

Regards

Shankari G

0 Chen Zhiming over 1 year ago in reply to Shankari G

Prodigy 45 points

Thanks, I will check it.

Regards

Chen

0 Chen Zhiming over 1 year ago in reply to Shankari G

Prodigy 45 points

Here is the simple code extract from my application software.

Int16 DaaIntTask;
/************************************************************/
// GPIO13/14: Interrupt signal generated externally
/************************************************************/
void GPIO_Config(void)
{
/* Unlock the chip registers */
CSL_BootCfgUnlockKicker();

/* Set pin as GPIO mode */
*((uint32_t *)PIN_CONTROL_0) |= ((1 << GPIO_3) |
(1 << GPIO_13)|
(1 << GPIO_14));

/* Lock the chip registers */
CSL_BootCfgLockKicker();

/* Set GPIO as output mode */
gpio_set_direction(GPIO_3, GPIO_OUT);

gpio_set_direction(GPIO_13, GPIO_IN);
gpio_set_direction(GPIO_14, GPIO_IN);
}

/************************************************************/
//
/************************************************************/
void GPIO13_InterruptHandler (void *arg)
{
// GPIO_O_LED3_ON();
gpio_set_output(GPIO_3);

// DaaRx_Isr(); // Interrupt service routine
DaaIntTask++;

// ISR Code

/* Clear the event ID. */
CSL_intcEventClear((CSL_IntcEventId)arg);

// GPIO_O_LED3_OFF();
gpio_clear_output(GPIO_3);
}

/************************************************************/
//
/************************************************************/
void SetGPIO_ISR(void)
{
// uint32_t uint32_value;
// CSL_IntcContext context;
CSL_IntcEventHandlerRecord EventRecord;
// CSL_IntcEventHandlerRecord EventHandler[1];
CSL_IntcParam vectId;
CSL_IntcHandle gpioIntcHandle;
CSL_IntcObj gpioIntcObj;
// CSL_IntcGlobalEnableState state;

int error = 0;
// unlock KICK
// KICK0 = KICK0_UNLOCK;
// KICK1 = KICK1_UNLOCK;

// Config GPIO02 as input
// GhGpio = CSL_GPIO_open (0); // Opens GPIO Instance 0
// CSL_GPIO_setPinDirInput (GhGpio, 2); //set GPIO_2 to be input

//. Enable GPIO global interrupt ( BINTEN)
//GPIO user guide needs to be updated for BINTEN register that bit 0 is for Bank 0 (GPIO pins 15:0)
//and bit 1 is for Bank 1 (GPIO pins 31-16).
// GhGpio->BINTEN = 0x01;
gpio_enable_global_interrupt();

// Enable GPIO02 rising edge interrupt
// CSL_GPIO_setFallingEdgeDetect(GhGpio, 2);
gpio_set_risingedge_interrupt(GPIO_13);
// gpio_set_risingedge_interrupt(GPIO_14);

#if 0
/* INTC module initialization */
context.eventhandlerRecord = EventHandler;
context.numEvtEntries = 1;
if (CSL_intcInit(&context) != CSL_SOK)
error++;

/* Enable NMIs */
if (CSL_intcGlobalNmiEnable() != CSL_SOK)
error++;

/* Enable global interrupts */
if (CSL_intcGlobalEnable(&state) != CSL_SOK)
error++;
#endif

/* Open INTC */
vectId = CSL_INTC_VECTID_5;
gpioIntcHandle = CSL_intcOpen(&gpioIntcObj, CSL_GEM_GPINT13, &vectId, NULL); //CSL_GEM_GPINTN
if (gpioIntcHandle == NULL)
error++;

/* Bind ISR to Interrupt */
EventRecord.handler = (CSL_IntcEventHandler)&GPIO13_InterruptHandler;
EventRecord.arg = gpioIntcHandle;
CSL_intcPlugEventHandler(gpioIntcHandle, &EventRecord);

/* Event Enable */
CSL_intcHwControl(gpioIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);

while(error!=0) {};
}

/************************************************************/
//
/************************************************************/
Int32 intc_init (void) // The functions initializes the INTC module.
{
// CSL_IntcGlobalEnableState state;

/* INTC module initialization */
context.eventhandlerRecord = EventHandler;
context.numEvtEntries = 10;
if (CSL_intcInit(&context) != CSL_SOK)
return -1;

/* Enable NMIs */
if (CSL_intcGlobalNmiEnable() != CSL_SOK)
return -1;

/* Enable global interrupts */
//if (CSL_intcGlobalEnable(&state) != CSL_SOK)
// return -1;

/* INTC has been initialized successfully. */
return 0;
}

/************************************************************/
//
/************************************************************/
void Int_Enable()
{
CSL_IntcGlobalEnableState state;

CSL_intcGlobalEnable(&state);
}

/************************************************************/
//
/************************************************************/
int main(void) {

//Cache_MSMC_initial(0, 0x20000, 21, 0x00C000);
Cache_MSMC_initial(0, MSMCSRAM_ADDR_ALIAS>>12, DSPXMC_SEGSZ_1MB, MSMCSRAM_ADDR>>12);

SysClkCtr_Init();

DaaIntTask = 0;

/* Initialize CPU clock speed */
GPIO_Config();

if (intc_init() < 0) {
// printf ("Error: Initialization of the INTC module failed\n");
return 0;
}

/* Initialize GPIO CSL module */
SetGPIO_ISR();

/* enable all L1 cache */
CACHE_setL1PSize(CACHE_L1_32KCACHE);
CACHE_setL1DSize(CACHE_L1_32KCACHE);

// CACHE_setL2Size(CACHE_1024KCACHE);

/* Stall CPU while memory system is busy */
_mfence();
_mfence();

/* start processing */
// gpio_set_output(UPPSTART_Bit);

Int_Enable();

while(1) {
if ( DaaIntTask ) {
DaaIntTask--;
}

// MainProcess();
}
// return 0;
}

Interrupt signal is inputted into GPIO13, and I measured the time from rising edge of GPIO13 to the rising edge of GPIO3 .

Regards

Chen

0 Chen Zhiming over 1 year ago in reply to Chen Zhiming

Prodigy 45 points

and the Main Process will do with lots of functions including IFFT/FFT and so on.

0 Shankari G over 1 year ago in reply to Chen Zhiming

TI__Mastermind 25535 points

Chen,

Let me try to measure the GPIO interrupt latency.

By the way we have benchmark details for using the DSP lib functions like FFT etc..

https://www.ti.com/lit/an/sprac13/sprac13.pdf

Regards

Shankari G

0 Chen Zhiming over 1 year ago in reply to Shankari G

Prodigy 45 points

Thank you very much.

0 Shankari G over 1 year ago in reply to Chen Zhiming

TI__Mastermind 25535 points

Chen,

Please allow me some time.

I am still experimenting on the same.

Between, there are few local holidays.

Expect a response earliest by coming friday.

Regards

Shankari G

0 Shankari G over 1 year ago in reply to Shankari G

TI__Mastermind 25535 points

Chen,

yes, I have experimented the GPIO interrupt and GPIO-interrupt latency....

Measured the clock cycles between the GPIO interrupt occurrence to the GPIO ISR ( Interrupt service routine).

For me, it takes, 210 CPU cycles.

Total no of CPU cycles = cycles

DSP core frequency = 1000 MHz ( I ran the DSP at 1000 MHz)

Time = 1 / Freq ( General formula )

= 1 / 1000 MHz ( DSP core frequency )

= 0.001 us ( Micro seconds)

1000000000 cycles = 1 sec

=> 210 cycles = 0.210 Micro seconds.

#include "ti/csl/csl_chip.h"
#include "ti/csl/csl_chipAux.h"
#include "ti/csl/src/intc/csl_intc.h"
#include "ti/csl/csl_gpio.h"
#include "ti/csl/csl_gpioAux.h"

#include <ti/csl/csl_tsc.h> // check the path where the csl_tsc.h is located. Accordingly include the path of the file.

#include <stdio.h>

CSL_IntcContext             intcContext;
CSL_IntcEventHandlerRecord  EventHandler[30];
CSL_IntcObj                 intcObj;
CSL_IntcHandle              hTest;
CSL_IntcGlobalEnableState   state;
CSL_IntcEventHandlerRecord  EventRecord;
CSL_IntcParam               vectId;

CSL_GpioHandle  hGpio;



volatile int a = 0;

extern cregister volatile unsigned int TSCL;
extern cregister volatile unsigned int TSCH;
/*Throughput calculation initialization */

uint64_t volatile StartTime = 0;
uint64_t volatile EndTime = 0;
uint64_t volatile Total_cycle_ticks = 0;

/*Throughput calculation initialization Ends */



uint32_t utilReadTime32 ()
{
    uint32_t low = 0;

    low = TSCL;
    return low;

}

interrupt void intIsr()
{
    a = 1;


}

uint64_t utilReadTime64 ()
{
    uint32_t low = 0;
    uint32_t high = 0;

    low = TSCL;
    high = TSCH;
    return (_itoll(high,low));


}

int main(void)
{
    int pinNum = 0;
    int bankNum = 0;


    TSCH = 0;
    TSCL = 0;
    /* Enable the time stamp counter. */
    CSL_tscEnable();


    /************************************************
     *************** INTC Configuration *************
     ************************************************/

    printf ("Debug: GEM-INTC Configuration...\n");

    /* INTC module initialization */
    intcContext.eventhandlerRecord = EventHandler;
    intcContext.numEvtEntries      = 10;
    if (CSL_intcInit(&intcContext) != CSL_SOK)
    {
        printf("Error: GEM-INTC initialization failed\n");
        return 0;
    }

    /* Enable NMIs */
    if (CSL_intcGlobalNmiEnable() != CSL_SOK)
    {
        printf("Error: GEM-INTC global NMI enable failed\n");
        return 0;
    }

    /* Enable global interrupts */
    if (CSL_intcGlobalEnable(&state) != CSL_SOK)
    {
        printf ("Error: GEM-INTC global enable failed\n");
        return 0;
    }

    /* Open the INTC Module for Vector ID: 4 and Event ID: 90 (GPIO_n in C6678)*/
    vectId = CSL_INTC_VECTID_4;
    hTest = CSL_intcOpen (&intcObj, 90, &vectId , NULL);
    if (hTest == NULL)
    {
        printf("Error: GEM-INTC Open failed\n");
        return 0;
    }

    /* Register an call-back handler which is invoked when the event occurs. */
    EventRecord.handler = &intIsr;
    EventRecord.arg = 0;
    if (CSL_intcPlugEventHandler(hTest,&EventRecord) != CSL_SOK)
    {
        printf("Error: GEM-INTC Plug event handler failed\n");
        return 0;
    }

    /* Enabling the events. */
    if (CSL_intcHwControl(hTest,CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK)
    {
        printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed\n");
        return 0;
    }

    printf ("Debug: GEM-INTC Configuration Completed\n");


    // 1. Init Flag
    a = 0;
    printf("a = %d\n",a);

    // 2. Trigger GPIO_0 in Core0
    pinNum = 0;
    bankNum = 0;

    // Open the CSL GPIO Module 0
    hGpio = CSL_GPIO_open (0);

    // Set GPIO pin number 0 as an output pin
    CSL_GPIO_setPinDirOutput (hGpio, pinNum);
#if 0
    // Set interrupt detection on GPIO pin 0 to rising edge
    CSL_GPIO_setRisingEdgeDetect (hGpio, pinNum);
#else
    // Set interrupt detection on GPIO pin 0 to rising edge
    CSL_GPIO_setFallingEdgeDetect (hGpio, pinNum);
#endif
    // Enable GPIO per bank interrupt for bank zero
    CSL_GPIO_bankInterruptEnable (hGpio, bankNum);
#if 0
    // Toggle GPIO_0 pin to trigger GPIO interrupt
    CSL_GPIO_clearOutputData (hGpio, pinNum);   //GPIO_0=0
    CSL_GPIO_setOutputData (hGpio, pinNum);     //GPIO_0=1
#else
    // Toggle GPIO_0 pin to trigger GPIO interrupt
    CSL_GPIO_setOutputData (hGpio, pinNum);     //GPIO_0=1
    CSL_GPIO_clearOutputData (hGpio, pinNum);   //GPIO_0=0
    StartTime = utilReadTime64();
#endif
    // 3. Wait for entering into ISR
    while(a!=1){}
    EndTime = utilReadTime64();

    printf("a = %d\n",a);
    printf("GPIO interrupt occurs\n");


    Total_cycle_ticks = EndTime - StartTime;
    printf("Started at cpu cycle = %llu cycles \n", StartTime);
    printf("Ended at cpcu cycle = %llu cyclces \n", EndTime);

    printf("Total_cpu_cycle = %llu cycles\n", Total_cycle_ticks);
    return 0;
}

Output Screenshot:-

Regards

Shankari G

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TMS320C6657: interrupt response time of TMS320C6657