Hi, ti exports,
we transformed the same onnx model into ti bin model respectively by 9.1 tidl_model_import.out and 9.2 tidl_model_import.out
why are the bin models verified with different outputs as follows:
9.1 verified output 9.2 verified output
The same source bmp file is used by both import process
Here is my operation instructions for building pc tools
-
construct depenendent libraries according to the document ti-processor-sdk-rtos-j722s-evm-09_02_00_05/c7x-mma-tidl/ti_dl/docs/user_guide_html/md_tidl_build_instruction.html
opencv-4.1.0
protobuf-3.11.3
flatbuffer-1.12.0
3. download tvm
git clone --single-branch -b tidl-j7 github.com/.../tvm cd tvm git submodule init git submodule update --init --recursive
4. set environment variables
export PSDKRA_PATH=/home/ubuntu/dev/sdk/entry_rtos_sdk
export TIDL_INSTALL_PATH=${PSDKRA_PATH}/c7x-mma-tidl
export DSP_TOOLS=$PSDKRA_PATH/ti-cgt-c7000_4.1.0.LTS
export PSDK_INSTALL_PATH=${PSDKRA_PATH}
export TIDL_OPENCV_PATH=$PSDKRA_PATH/../opencv-4.1.0
export TIDL_FLATBUF_PATH=$PSDKRA_PATH/../flatbuffers-1.12.0
export TIDL_PROTOBUF_PATH=$PSDKRA_PATH/../protobuf-3.20.0
export TVM_HOME=${PSDKRA_PATH}/tvm
export GCC_LINUX_ARM_ROOT=${PSDKRA_PATH}/arm-gnu-toolchain-11.3.rel1-x86_64-aarch64-none-linux-gnu
export TISDK_IMAGE=edgeai
5. build pc tools:
ubuntu@ubuntu-ThinkPad-T14-Gen-3:~/dev/sdk/entry_rtos_sdk/sdk_builder$ make tidl_pc_tools
6. Collect the executable files from the outputs of step 5
./bin/PC_dsp_test_dl_algo.out
./bin/tidl_graphVisualiser.out
./bin/tidl_model_import.so
./bin/tidl_model_import.out
./bin/perfsim/ti_cnnperfsim.out
./bin/perfsim/device_config.cfg
7. config the configuration file <tidl_import_nm.txt>,
modelType = 2
numParamBits = 8
inputNetFile = ./model/pruned.onnx
outputNetFile = ./out/lane_net.bin
outputParamsFile = ./out/lane_cfg.bin
#outputFeature16bitNamesList = "788, 792, 796, 806, 813, 817, 821, 831, 838, 842, 846, 856, 860, 861, 865, 866"
#outputFeature16bitNamesList = "767, 771, 775, 779, 786, 790, 794, 798, 805, 809, 813, 817, 824, 828, 835, 839"
outputFeature16bitNamesList = "762，764，765，766，767，786"
inData = image/names.txt
inDataNorm = 1
inMean = 0 0 0
inScale = 0.003921569 0.003921569 0.003921569
quantizationStyle = 3
inDataFormat = 1
inElementType = 0
resizeWidth = 800
resizeHeight = 512
inWidth = 800
inHeight = 512
inNumChannels = 3
postProcType = 2
debugTrace = 1
debugTraceLevel = 2
writeTraceLevel = 3
tidlStatsTool = ./bin/PC_dsp_test_dl_algo.out
graphVizTool = ./bin/tidl_graphVisualiser.out
perfSimTool = ./bin/perfsim/ti_cnnperfsim.out
perfSimConfig = ./bin/perfsim/device_config.cfg
8. Execute import model
ubuntu@ubuntu-ThinkPad-T14-Gen-3:~/dev/9_1_j722s_lane$ ./bin/tidl_model_import.out ./tidl_import_nm.txt
9. Execute outpus like as follows
... ...
****************************************************
** TIDL Model Checker **
****************************************************
INFORMATION: [TIDL_ResizeLayer] Resize_126 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_141 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_158 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_162 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_166 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
****************************************************
** 5 WARNINGS 0 ERRORS **
****************************************************
Thanks！
