Is there any comprehensive documentation for the CPSW3G peripheral?
I am hoping that there is some standalone PDF documents somewhere that describes this hardware block in detail. Even a document for a similar block used in another product that was like 90% similar would be very useful.
The AM6442 TRM (SPRUIM2H) does have a list of registers and bit field definitions within the registers. It also has some general descriptions about how the peripheral works. But there are many registers that are largely undocumented. In those cases, the TRM literally just lists the names of the registers and bitfields but provides no further explanation.
Some examples of such registers would be...
SOME UNDOCUMENTED REGISTERS
SPRUIM2E § 12.2.1.6.5.2 CPSW_INT_EOI_REG Register (Offset = 1010h) [reset = X]
SPRUIM2E § 12.2.1.6.5.3 CPSW_INT_INTR_VECTOR_REG Register (Offset = 1014h) [reset = 0h]
SPRUIM2E § 12.2.1.6.5.4 CPSW_INT_ENABLE_REG_OUT_PULSE_0 Register (Offset = 1100h) [reset = X]
SPRUIM2E § 12.2.1.6.5.5 CPSW_INT_ENABLE_CLR_REG_OUT_PULSE_0 Register (Offset = 1300h) [reset = X]
SPRUIM2E § 12.2.1.6.5.6 CPSW_INT_STATUS_REG_OUT_PULSE_0 Register (Offset = 1500h) [reset = X]
SPRUIM2E § 12.2.1.6.5.7 CPSW_INT_INTR_VECTOR_REG_OUT_PULSE Register (Offset = 1A80h) [reset = 0h]
SPRUIM2E § 12.2.1.6.4.3 CPSW_EM_CONTROL_REG Register (Offset = 00020010h) [reset = X]
SPRUIM2E § 12.2.1.6.4.5 CPSW_PTYPE_REG Register (Offset = 00020018h) [reset = X]
There are many more such registers.
The descriptions don't give enough information to allow a third-party engineer to understand how to use the hardware if they want to write their own code (as opposed to using TI provided code). Reasons for wanting to write their own code may include, but not limited to, information security requirements, safety critical software design requirements, etc.
