TMS320C6655: Using single DDR: 4Gbit (256Mx16bit)

Daniel Hoasov Cohen

Intellectual 320 points

Part Number: TMS320C6655

Hi,

I searched in some Datasheet and its not clearly understood,

If im using TMS320C6655 (no ECC usage) with single DDR: 4Gbit (256Mx16bit)

DSP had 32-bit width and I using only 16-bits, does 16-bit DDR limit the DSP throughput?

My concern is from possible DSP performances limitation which might affect the DSP channels capacity while using 16-bit only.

over 2 years ago

0 Shankari G over 2 years ago

TI__Mastermind 25535 points

Daniel,

DSP performance is the same irrespective of 16/32/64 bus width selection you do; But the "Data transfer-speed" may differ as per the bus width, right ?

However, I believe, In general, you know the difference in performance between the different bus width selection.....

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We made the DDR configuration simpler by creating an Excel sheet with all the parameters and generate the register values accordingly.

Please visit this FAQ to get the spread sheet :- http://www.ti.com/lit/zip/sprabl2

[FAQ] TMS320C6657: How to calculate the "DDR3 Interface – Registers" for Keystone I devices and Test/Debug on Keystone I EVM. - Processors forum - Processors - TI E2E support forums

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In the Excel sheet, You have to change the "Narrow mode" by selecting 16-bit bus width.

It will reflect in the DDR_SDCFG register in the next sheet ---> register value generation sheet

Regards

Shankari G