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PROCESSOR-SDK-AM64X: R5F to PRU Messaging using IPC and Shared Memory

Ryan Meehan
Prodigy 135 points
Part Number: PROCESSOR-SDK-AM64X
Other Parts Discussed in Thread: SYSCONFIG

I'm looking at the examples in the mcu_plus_sdk_am64x_09_01_00_41\examples\pru_io, the ADC projects show the PRU using IPC to send data to the R5F, however I don't see any examples of sending data from the R5F to the PRU. I'm looking for any examples of the R5F PRU_IPC_sendData() call to the PRU, and the PRU using m_pru_ipc_rcv to receive the data (I'm assuming this requires setting up the Enable Interrupt To PRU On Data Send in Sysconfig as well, along with registering some kind of callback on the PRU side when the interrupt from the R5F is received so anything covering that as well would be good. 

As a bonus if there is any info that covers direct reads from shared memory on the PRU side, the empty project only shows the PRU writing to shared memory, that would also be helpful.

Thanks.

  • 0
    TI__Expert 7385 points

    Hi Ryan

    Currently we don't have an example implementing PRU data receive using m_pru_ipc_rcv. If this is something you are trying to achieve I can help you on the way.

    Ryan Meehan said:
    I'm assuming this requires setting up the Enable Interrupt To PRU On Data Send in Sysconfig as well, along with registering some kind of callback on the PRU side when the interrupt from the R5F

    Yes, this is correct. 

    Th flow of the program would be something like as explained below (please refer to the ADC example code to understand the terminology and usage):

    1. On the R5F side, PRU_IPC_sendData writes data in the shared memory and a call to PRUICSS_sendEvent is made inside the function that generates an INTC event.

    2. m_prgm_flow_jump_on_intr macro present in main.asm checks interrupt status on the INTR_BIT of R31 specified in the macro. This indicates PRU to jump to a different code section for execution say a section called 'PRU_read'.

    3. In the PRU_read section the macro m_pru_ipc_rcv is made to read data from the shared memory.

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    TI__Expert 7385 points

    To read directly from shared memory, you can use LBCO or LBBO instruction based on your requirement.

    To understand the syntax and working of the above instructions, please refer to the PRU assembly instruction guide here - www.ti.com/.../spruij2.pdf

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    Prodigy 135 points

    Hi Nitika,

    Thanks for your reply. Just found the PRU_IPC_sendData source, I see it works similar to the PRUICSS_goToSection functionality in the ADC example. So txEventNum needs to be set up in the PRU_IPC_Handle on the R5F side, and correspond to the event/label index used by the m_prgm_flow_jump_on_intr on the PRU side? Is there anything else that needs to be set up?

    I see in the ADC example syscfg the "Enable Interrupt To PRU On Data Send" is not used, can you confirm if that should be checked or not for the PRU_IPC_sendData to be used? If it does need to be enabled, does the INTC Channel and INTC Host Interrupt used matter, or just any combination not in use is ok?

    Thanks,

    Ryan

  • 0 in reply to Ryan Meehan
    Prodigy 135 points

    To elaborate further, if I have the following line in a modified version of the ADC example

    m_prgm_flow_jump_on_intr    PRGM_FLOW_EVENT, PRGM_FLOW_EVENT_BIT, 4, TEMP_REG_1, IDLE, pru_send, reset, pru_read

    How do I get txEventNum set in the PRU_IPC_Attrs structure associated with the gPruIpc0Handle that is set up with the PRU_IPC_open call on the R5, so that when I call PRU_IPC_sendData it will trigger the interrupt and jump to the pru_read label on the PRU?

    Thanks,

    Ryan

  • 0 in reply to Nitika Verma
    Prodigy 135 points
    Nitika Verma said:
    To read directly from shared memory, you can use LBCO or LBBO instruction based on your requirement

    In the empty PRU project I see the PRU sbco command is using the shared memory constant ICSS_SMEM_CONST, where is the equivalent shared memory constant defined that the R5 can use? I assume it's generated somewhere. Thanks.

  • 0 in reply to Ryan Meehan
    TI__Expert 7385 points

    Hi Ryan,

    Ryan Meehan said:
    can you confirm if that should be checked or not for the PRU_IPC_sendData to be used?

    Yes, 'Enable Interrupt To PRU On Data Send' should be enabled in the sysconfig to to send an interrupt to PRU which is handled in the code by m_prgm_flow_jump_on_intr.

    Once enabled, any valid combination not in use can be selected or you can go ahead with the default one that shows up in sysconfig if there is no specific requirement.

    Ryan Meehan said:
    How do I get txEventNum set in the PRU_IPC_Attrs structure

    When you enable 'Enable Interrupt To PRU On Data Send' in sysconfig, txEventNum is configured automatically based on the `INTC Event Signal` selected. You can view the values set in the PRU_IPC_Attrs structure gPruIpcAttrs in the ti_board_config.c file (auto-generated syscfg file).

    Ryan Meehan said:
    where is the equivalent shared memory constant defined that the R5 can use?

    ICSS_SMEM_CONST is the ICSS Shared Memory Base Address, you can use CSL_PRU_ICSSG0/1_RAM_SLV_RAM_BASE (for instance ICSSG0/1 accordingly) defined in cslr_soc_baseaddress.h to get the shared memory base address in R5 application.

    Regards,

    Nitika