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TMDS64EVM: About CPSW RGMII1 PHY I/O settings

Kiyomasa Imaizumi
Intellectual 580 points
Part Number: TMDS64EVM
Other Parts Discussed in Thread: AM6442, SYSCONFIG

Hello TI support team.

I have a question about EVM's Enet Layer 2 CPSW Example.
The SDK is mcu_plus_sdk_am64x_08_06_00_45.

Please tell me about INT/PWDN and RESET_N of CPSW RGMII1-PHY (DP83867).
In EVM, the PHY is connected to AM6442 as shown below.

・INT/PWDN - CPSW_RGMII_INTn - PRG1_RGMII_INTn - PRG1_RGMII_INTn_RC - EXT_INTN(C19 @AM6442)

・RESET_N - CPSW_RGMII1_RESETn - GPIO_CPSW1_RST (IO EXPANDER)

Where are these ports configured in the cpsw source code?
Also where are these ports used in the source code?
It was not in the sysconfig settings from CCS. Please let me know.


Best regards,
Kiyomasa Imaizumi.

  • 0
    TI__Expert 5130 points

    Hi Kiyomasa Imaizumi,

    The INT/PWDN and RESET_N of CPSW RGMII1-PHY are not used in the enet layer2 cpsw example. They are present in their default state and not explicitly configured.

    You can refer to the PHY datasheet in order to get more information about their functionality - https://www.ti.com/lit/gpn/dp83867ir

    For some more information on this:

    1. INT/PWDN - CPSW_RGMII_INTn: If you wish to utilize this, you will have to follow the steps mentioned above to generate Interrupts for different events or to enable power down mode.

    2. RESET_N - CPSW_RGMII1_RESETn: Section 8.5.5.1 Hardware Reset of the datasheet talks about the use of RESET_N.

    To reset the PHY using this, you will have configure the pin to output, set it to low, wait for Reset time period specified in the datasheet and set the pin to high again.

    The function 'EnetBoard_setMacPort2IOExpanderCfg' in ti_board_config.c file (auto-generated file) of the layer2 cpsw example can be used as a reference to set the state of IO expander pins.

    Regards,

    Nitika