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Original question:

TMS320C6678: TMS320C6678: Please consult about the SPI serial transmission speed issue!

TMS320C6678: DSP SPI writes instruction control twice in a row, causing excessive delay in the CS signal. Please seek help to analyze the cause？

XING CUI
Prodigy 161 points
Part Number: TMS320C6678

By using the SPI module of TMS320C6678 to simultaneously control two SPI ICs (5-wire system), there is a significant delay of 492 ns between commands during continuous SPI instruction writing What is the reason for the excessive delay in writing SPI data in the SPI register, as both the SPI_SPIFMT.WDELAY and the SPI_SPIDELAY-C2TDELAY are set to 0?

ch1:cs  ch2:clk  ch3:SIMO CH4:SOMI

  • +1
    TI__Guru 54282 points

    Hello,

    The delay is likely coming from the software driver.  

    Regards,

    Kyle

  • 0 in reply to kcastille
    Prodigy 161 points

    The delay may be caused by software code, and the CS switch in the oscilloscope generates a 310ns delay. In the code, SPI writing data will determine the SPIBUF-TXFULL bit (while (gpSPIirregs ->SPIBUF&CSL_SPIISPIBUF-TXFULL_MASK), and then write data to gpSPIirregs ->SPIDAT1. The received data will determine the SPIFLG-RXINTFLG bit (while (gpSPIirregs ->SPIBUF&(CSL_SPISISIBUF-RXEMPTY-MASK)) Read gpSPI-regs ->SPIBUF again. The test found that the delay was caused by SPIBUF-TXFULL and SPIBUF-RXEMPTY waiting delays. If the judgments are deleted, these judgments cannot guarantee the correctness of SPI's read and write data.