Other Parts Discussed in Thread: AM4372
I need help in setting up GPIO0 and would like an explanation of how the setup is affected by the device tree. Briefly, I'm updating a decade old TI 4376 based commercial application to SDK 7.03 and Linux 5.4 and I want to read an on-off switch attached to GPIO0_3 (pin L24 mcasp0_ahclkx).
My understanding is that GPIO0 hardware configuration requires only the following steps, regardless of whether a kernel driver does them or the user application does them:
- Set the pin mux register CTRL_CONF_MCASP0_AHCLKX for L24 at 0x44E109AC to 0x9 to make it GPIO0_3.
- Set the gpo0 clock control register PRCM_CM_WKUP_GPIO0_CLKCTRL at 0x44DF2B68 to 0x102 to enable the clocks.
- Set the gpio0 control register GPIO_CTRL at 0x44E07130 to 0x2 to enable the module.
- Set to 1 bit 3 of the gpio0 output enable register GPIO_OE at 0x44E07130 to make GPIO0_3 an input.
The application performs all these steps itself, and when the device tree includes the line
AM4372_IOPAD(0x9ac, PIN_INPUT | MUX_MODE9 ) /* (L24) mcasp0_ahclkx.gpio0[3] */
everything works as expected when the switch is toggled.
Now during the modification, the device tree was accidently changed to
AM4372_IOPAD(0x9ac, PIN_OUTPUT | MUX_MODE9 ) /* (L24) mcasp0_ahclkx.gpio0[3] */
which is obviously an error, but it seems to me this error should have been overridden when the application subsequently initialized the GPIO_OE register to make GPIO0_3 an input.
In testing this, I am simply booting to UBoot and flashing either the correct or erroneous device tree binary; UBoot, Linux, the file system, and the hardware are untouched, just the single line in the device tree is different. I printed out the pin mux register and all the gpio0 registers and, except for GPIO_DATAIN, the registers are identical in both cases.
So my questions are: What am I missing in the gpio setup steps above, what is affected by the PIN_INPUT parameter in the device tree besides the GPIO_OE and which driver is making the change (I'm guessing gpio-omap.c but haven't confirmed)?
Thanks.
Here's my register dump for the erroneous device tree. The dump is identical for the correct device tree except for DATAIN as indicated.
GPIO0 Registers
GPIO0 Wakeup Ctl = 0x00000102
L4 Wakeup Ctl = 0x00000002
Output Enable = 0xde3fff2f
Data Out = 0x00400000
Data In = 0x007c0000 correct value is Data In = 0x007c0008
Clr Data Out =0x00400000
Set Data Out =0x00400000
Irq Sts Raw0 = 0x00000000
Irq Sts Raw1 = 0x00000000
Irq Sts 0 = 0x00000000
Irq Sts 1 = 0x00000000
Irq Sts Set0 = 0x00000000
Irq Sts Set1 = 0x00000000
Irq Sts Clr0 = 0x00000000
Irq Sts Clr1 = 0x00000000
Level Detect0 = 0x00000000
Level Detect1 = 0x00000000
Rising Detect = 0x00000000
Falling Detect = 0x00000000
Debounce En = 0x00000000
Debounce Time = 0x00000000
Control Reg = 0x00000002
Reset Status = 0x00000001
Sys Config = 0x0000001d
Revision = 0x50601801
Control Module Pin Mux
9ac 00000009 mcasp0_ahclkx
