TMS320VC5502: Error connecting to the target: (Error -2172 @ 0xD) Unable to communicate with the debug probe. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 8.4.0.00006)

Dear Ming Wei,

Thank you for your assistance. I have conveyed the suggestion regarding the No Boot Mode setting to my hardware supplier, and I will update you with the outcome after our discussion. Thank you once again for your support!

Best regards,

JUN-TING

Dear Ming Wei,

I apologize for the late response as discussing with the equipment supplier took quite some time.

After getting the modified DSP board back, I set the boot mode to 000 (no boot mode), which no longer results in the -2172 error code.

However, a new issue has emerged. When I press debug, it displays "load program error."

If I set the boot mode to other settings, it then shows "Trouble Reading memory Block at 0x802 (error code -1069)" and "(error code -2130)."

May I ask if this indicates a problem with the hardware memory?

Hi Jun-ting,

the "load program error" usually means the memory area your program was loaded to is not accessible. One way to tell whether it is a SOC initialization issue or a program issue is to access the on-chip memory via CCS memory browser. If you can access to all on-chip memory using memory browser, then the issue is with the program. Are you using any off-chip memory in your program? Can you send your linker command file?

I do not have a C5502 board at hand, so I cannot debug this issue on board.

Best regards,

Ming 

Hi Ming Wei,

I tried to check the memory status using the Memory Browser, but as soon as I press debug, a program error pops up and the execution stops, so there is no content shown in the Memory Browser. Additionally, my chip does not have any off-chip memory; it's just a simple board. I will attach the linker command file below. Thank you very much for your help!

Best regards,

Jun-Ting

Hi Ming Wei,

Thank you for your reply. After several days of attempts on my own, I tried modifying the GEL file. By commenting out the initialization functions of two CEs in the c5502.gel file located at C:\ti\ccs1240\ccs\ccs_base\emulation\gel, it now functions correctly as follows:

OnTargetConnect()
{
C5502_Init();

//Init_CE1_SBSRAM_5502CPUBoard();
//Init_CE0_SDRAM_5502CPUBoard();
}

OnReset()
{
//Init_CE1_SBSRAM_5502CPUBoard();
//Init_CE0_SDRAM_5502CPUBoard();
}

Additionally, I used the memory browser to attempt changes at specific memory addresses. Could you advise how I might use the memory browser to test if there are issues with the physical memory?

Lastly, regarding the linker command file you mentioned, I have copied it below in plain text format:

/****************************************************************************/
/* C5502.cmd */
/* Copyright (c) 2010 Texas Instruments Incorporated */
/* Author: Rafael de Souza */
/* */
/* Description: This file is a sample linker command file that can be */
/* used for linking programs built with the C compiler and */
/* running the resulting .out file on a C5502. */
/* Use it as a guideline. You will want to */
/* change the memory layout to match your specific */
/* target system. You may want to change the allocation */
/* scheme according to the size of your program. */
/* */
/****************************************************************************/

MEMORY
{
MMR: o = 0x000000 l = 0x0000c0 /* 192B Memory Mapped Registers */
DARAM0: o = 0x0000C0 l = 0x001F40 /* 8kB Dual Access RAM 0 */
DARAM1: o = 0x002000 l = 0x002000 /* 8kB Dual Access RAM 1 */
DARAM2: o = 0x004000 l = 0x002000 /* 8kB Dual Access RAM 2 */
DARAM3: o = 0x006000 l = 0x002000 /* 8kB Dual Access RAM 3 */
DARAM4: o = 0x008000 l = 0x002000 /* 8kB Dual Access RAM 4 */
DARAM5: o = 0x00A000 l = 0x002000 /* 8kB Dual Access RAM 5 */
DARAM6: o = 0x00C000 l = 0x002000 /* 8kB Dual Access RAM 6 */
DARAM7: o = 0x00E000 l = 0x002000 /* 8kB Dual Access RAM 7 */

CE0: o = 0x010000 l = 0x3F0000 /* 4MB CE0 external memory space */
CE1: o = 0x400000 l = 0x400000 /* 4MB CE1 external memory space */
CE2: o = 0x800000 l = 0x400000 /* 4MB CE2 external memory space */
CE3: o = 0xC00000 l = 0x3F8000 /* 4MB CE3 external memory space */
ROM: o = 0xFF8000 l = 0x007F00 /* 32kB ROM (MPNMC=0) or CE3 (MPNMC=1) */
VECS: o = 0xFFFF00 l = 0x000100 /* reset vector */
}

SECTIONS
{
vectors (NOLOAD) > VECS /* If MPNMC = 1, remove the NOLOAD directive */
.cinit > DARAM0
/* Arbitrary assignment of memory segments to .text section. */
/* Can be expanded or reduced observing limitations of SPRAA46 */
.text >> DARAM1|DARAM2|DARAM3|DARAM4|DARAM5
.stack > DARAM0
.sysstack > DARAM0
.sysmem > DARAM4
.data > DARAM4
.cio > DARAM0
.bss > DARAM5
.const > DARAM0
}

Best regards,

Jun-Ting