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PROCESSOR-SDK-J784S4: PMU counter not working

Part Number: PROCESSOR-SDK-J784S4

Hello,

I'm using PMU counter from sdl_arm_r5_pmu.h. 

In my code I do the follow wing process:

SDL_R5PMU_cfgCntr(SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM, SDL_ARM_R5_PMU_EVENT_TYPE_CYCLE_CNT);
SDL_R5PMU_enableAllCntrs(0);
SDL_R5PMU_resetCycleCnt();
SDL_R5PMU_enableAllCntrs(1);
cycleCnt1 = SDL_R5PMU_readCntr(SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM);
ALGO
cycleCnt2 = SDL_R5PMU_readCntr(SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM);

But value are always 0, can you help me ?

Regards

  • Hi,

    Due to a holiday, half of our team is currently out of the office. Please expect a 1~2 delay in responses.

    Apologies for the delay, and thank you for your patience.

    -Fabiana

  • Hi,

    Sorry for the delayed response. Can you clarify what you mean by values are always 0?

    Regards,

    Josiitaa

  • Hi,

    No problems. by value are always 0 I mean that, in the exemple code i give, if i check in debug mode the value of "cycleCnt1" or "cycleCnt2" it show me "0".

    Regards,

    Jean

  • Hi, 

    Can you try executing the SDL pmu_test_app to see if the same behavior is observed?

    Regards,

    Josiitaa

  • Hi,

    I've run the app and the same behavior is not observed

  • Hi,

    Then there is probably some delta between your code and the SDL code. Could you provide a patch with all the changes you have made so I can try to reproduce?

    Regards,

    Josiitaa

  • Hi,

    Here is the code I used in my main : 

    uint32_t numCntrs, dCacheMissCnt, iCacheMissCnt, branchCnt, cycleCnt;
    int32_t retValue, testResult = SDL_APP_TEST_PASS;
    SDL_PMU_staticRegs pStaticRegs;
    uint32_t cycleCntDiv = 0U, exportEvents = 0U, userEnable = 1U;


    /* Some negative tests for code coverage on PMU */
    SDL_R5PMU_cfg(1, 1, 0);
    retValue = SDL_R5PMU_verifyCfg(1,0);
    if(retValue != SDL_EFAIL)
    {
    printf(" verifyCfg API test failed \n \n");
    testResult = SDL_APP_TEST_FAILED;
    }
    printf("%u\n", testResult);

    SDL_R5PMU_enableCntr (PMU_CNTR_NUM_BRANCH, 0);
    SDL_R5PMU_enableCntr (PMU_CNTR_NUM_ICACHE_MISS, 0);
    SDL_R5PMU_enableCntr (PMU_CNTR_NUM_DCAHCE_MISS, 0);
    SDL_R5PMU_enableAllCntrs (0);
    SDL_R5PMU_readStaticRegisters(&pStaticRegs);
    sdl_pmu_test_init_pmu();
    /* Report number of counters implemented */
    numCntrs = SDL_R5PMU_getNumCntrs();
    printf("Number of PMU counters implemented is: %u\n",numCntrs);
    /* Report number of branch, icache miss and dcache miss */
    dCacheMissCnt = sdl_pmu_test_get_dCache_miss();
    iCacheMissCnt = sdl_pmu_test_get_iCache_miss();
    branchCnt = sdl_pmu_test_get_branch();
    cycleCnt = sdl_pmu_test_get_cycle();

    SDL_R5PMU_cfg(cycleCntDiv, exportEvents, userEnable);
    SDL_R5PMU_readStaticRegisters(&pStaticRegs);

    if(((uint8_t)pStaticRegs.cycleCntDiv == cycleCntDiv) &&
    ((uint8_t)pStaticRegs.exportEvents == exportEvents) &&
    ((uint8_t)pStaticRegs.userEnable == userEnable))
    {
    printf(" readStatic register successful\n\n");

    printf("static config exportsEvents value is: %u\n",pStaticRegs.exportEvents);

    printf("static config cycleCntDiv value is: %u\n",pStaticRegs.cycleCntDiv);
    }
    else{
    printf(" readStaticRegisters failed\n");
    testResult = SDL_APP_TEST_FAILED;
    }
    printf("%u\n", testResult);

    printf("iCacheMissCnt is: %u\n",iCacheMissCnt);
    printf("dCacheMissCnt is: %u\n",dCacheMissCnt);
    printf("branchCnt is: %u\n",branchCnt);
    printf("cycleCnt is: %u\n",cycleCnt);

    printf("Setting all PMU counters to new values: \n");

    /* Set and Read the Counter */
    SDL_R5PMU_setResetCntr(SDL_ARM_R5_PMU_CYCLE_COUNTER_NUM, 0x3000U );
    SDL_R5PMU_setResetCntr(PMU_CNTR_NUM_ICACHE_MISS, 1U );
    SDL_R5PMU_setResetCntr(PMU_CNTR_NUM_DCAHCE_MISS, 1U );
    SDL_R5PMU_setResetCntr(PMU_CNTR_NUM_BRANCH, 1U );

    dCacheMissCnt = sdl_pmu_test_get_dCache_miss();
    iCacheMissCnt = sdl_pmu_test_get_iCache_miss();
    branchCnt = sdl_pmu_test_get_branch();
    cycleCnt = sdl_pmu_test_get_cycle();

    printf("iCacheMissCnt is: %u\n",iCacheMissCnt);
    printf("dCacheMissCnt is: %u\n",dCacheMissCnt);
    printf("branchCnt is: %u\n",branchCnt);
    printf("cycleCnt is: %u\n",cycleCnt);

    And here is the result :

    0
    Number of PMU counters implemented is: 3
    readStatic register successful

    static config exportsEvents value is: 0
    static config cycleCntDiv value is: 0
    0
    iCacheMissCnt is: 9
    dCacheMissCnt is: 8
    branchCnt is: 902
    cycleCnt is: 0
    Setting all PMU counters to new values:
    iCacheMissCnt is: 2
    dCacheMissCnt is: 2
    branchCnt is: 13
    cycleCnt is: 12288

    The value of cycleCnt is not changing

    Regards

  • Hi,

    Thank you for sharing the code. I tried to run the code shared by you and this is the result I see -

    0
    Number of PMU counters implemented is: 3
     readStatic register successful

    static config exportsEvents value is: 0
    static config cycleCntDiv value is: 0
    0
    iCacheMissCnt is: 7
    dCacheMissCnt is: 6
    branchCnt is: 4182081
    cycleCnt is: 43054908
    iCacheMissCnt is: 1
    dCacheMissCnt is: 1
    branchCnt is: 16
    cycleCnt is: 13572

    I am unable to reproduce your issue. Are there any other changes that you have made?

    Regards,

    Josiitaa

  • Hi, sorry for the delay

    So here you got the result I expect to have. But I still don't get it.
    Maybe there is problem in my makefile ?

    Here's a part of my makefile :

    APP_NAME=csl_pmu_test_app
    BUILD_OS_TYPE = baremetal
    SRCDIR=.
    INCDIR=

    SRCDIR += ..../ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/sdl/src/ip/r5/src
    SRCS_ASM_COMMON += sdl_arm_r5_pmu.asm

    INCLUDE_EXTERNAL_INTERFACES=pdk
    COMP_LIST_COMMON += $(PDK_COMMON_BAREMETAL_COMP)

    PACKAGE_SRCS_COMMON =.
    SRCS_COMMON= MCU_1_0_app.c

    EXTERNAL_LNKCMD_FILE_LOCAL = linker.lds
    CFLAGS_LOCAL_COMMON+= -DBARE_METAL

    And all of this is use under this component :

    csl_component.mk

    Present in ti/csl

    Maybe one of these part cause my problem ?

    Regards

  • Here is the code I used in my main : 

    Is this the whole code in your application? Is there any reason you are using CSL instead of SDL?

    Regards,

    Josiitaa

  • Actually yes, the other part of the code is commented.

    I'm trying to use it in CSL beacause later I want to do PMU on CSL app exemple like mcan, spinlock, mailbox...

    Regards

  • Hi,

    I've run the app and the same behavior is not observed

    You can integrate SDL library APIs easily. The reason I am recommending this is because you had mentioned that the SDL example application works without any issues. SDL is a safety certified library as well.

    Regards,

    Josiitaa

  • Okay, I will have a look how to do so, if you got tips I will take it, however I will do without

    Regards

  • Yes, please try the SDL pmu_test_app flow and let me know if you are facing the same issue. I am not able to reproduce this on the TI EVM.

    Regards,

    Josiitaa