[FAQ] AM6442: CLKOUT0 feedback to RMII_REF_CLK always necessary?

I may need to understand which ethernet port will be used with the PHY operating at 100Mbits to answer this question.

I assume the 1Gbit PHY will be connected to one of the RGMII ports since RGMII is required for 1Gbit operation. However, the PHY operating at 100Mbits may be connected to one of the RMII ports, or the other RGMII port and only operated at 100Mbits if the PHY supports RGMII. I have not reviewed the PHY datasheets to understand their capabilities.

I will assume the PHY operating at 100Mbits is connected to one of the RMII ports to begin this discussion.

RMII was initially defined to have an external 50MHz clock source that was routed to both devices (MAC and PHY) and used as the RMII data transfer clock.

The RMII_REF_CLK signal function in AM64x is the 50MHz reference clock input to the MAC and is used for synchronous data transfer to and from the PHY. This input signal function can be assigned to one of two pins via the pin multiplexing logic. However, there are IOSET limitations that need to be considered when selecting the combination pins being used for the respective set of RMII signals.

The CLKOUT0 signal function in AM64x can be configured to operate as a 50MHz or 25MHz clock source. This output signal function can be assigned to one of two pins via the pin multiplexing logic, and has no timing relationship to any other signal. It is simply an optional clock source that can be used to source the 50MHz RMII data transfer clock or the 25MHz clock required by a RMII or RGMII Ethernet PHY. The RMII PHY may provide an option to source the 50MHz data transfer clock. If so, it may not be necessary to use the CLKOUT0 signal function as a RMII data transfer clock, which means it could be used as a 25MHz clock source. The 25MHz option could potentially be used to eliminate a 25MHz clock source required for the Ethernet PHY.

Keep in mind the CLKOUT0 signal function will not be turned on by default. Software must configure the appropriate PADCONFIG register and configure the internal clock multiplexers to select the desired clock function. Therefore, you may need to use a GPIO to control the reset of any device using this clock source, such that the attached device is held in reset until the clock is turned on and valid before releasing the attached device from reset.

Regards,
Paul

The CLKOUT0 signal only needs to be looped back to the RMII_REF_CLK pin if it is being used as a 50MHz data transfer clock for one of the RMII ports.

The CLKOUT0 signal does not need to be connected to the RMII_REF_CLK pin if both PHYs are connected to the AM64x device via RGMII.

I agree the description in the datasheet could easily be misunderstood. The CLKOUT0 description you inserted into the Word file is slightly better, where it says, "When configured to operate as the RMII clock source (50MHz) the signal must be routed back to the RMII_REF_CLK pin for proper operation."

In the use case described above, the customer is not configuring CLKOUT0 as the RMII clock source. So, the comment saying CLKOUT0 must be connected to the RMII_REF_CLK pin doesn't apply.

I will file a ticket against the datasheet to have the description update in a future datasheet release.

They need to be careful with their implementation if CLKOUT0 is configured to operate at 25MHz and source two PHYs. We have already mentioned the first concern. Most PHYs expect a valid clock source before being released from reset. The CLKOUT0 signal function must be configured by software before the PHY is released from reset. The other concern is signal distortion introduced by branching the CLKOUT0 signal into two paths to source both PHYs. This can introduce reflections that produce non-monotonic transitions on the clock signal and the non-monotonic events can cause clock glitches inside the PHY. The PHY state machine may be over clocked and do unpredictable things if this occurs. They should consider inserting a buffer with one input and two outputs to prevent the signal integrity concern created by branching the clock into two paths.

Regards,
Paul

Hello Winnie Puuh, 

Thank you for the note.

Have a good day.

Regards,

Sreenivasa