TDA4VM: How to set DPI display output?

Hi Xin,

Please refer to HDMI output in the vision apps. There is no in-built HDMI in TDA4VM, so it uses external component to get HDMI output and this component requires DPI output in RGB format. 

Regards,

Brijesh

Hi Brijesh,

I want to send BT.656 YUV data through the interface shown below. Which demo of vision_apps can I refer to?

Regards,

Xin

Hi Xin,

We have not really validated BT656 output in vision apps, as it is not supported on the EVM. 

But it is straight forward, you could be able to change the settings in app_dss_defaults to configure DSS for BT656 output. So please refer to this file for changing the output interface.

Regards,

Brijesh

Hi Brijesh,

I didn't find the relevant configuration in the path below. Where exactly is it configured?

psdk_rtos_j7/vision_apps/utils/dss

Regards,

Xin

Hi Brijesh,

I haven't heard from you for a long time. Output YUV video data through DPI, How to configure the output mode to BT.656 in the SDK? Does the output mode of DSS module choose HDMI? Are RGB data and YUV data both output from DPI?

Regards，

Xin

Hi Xin,

In appDctrlVpParamsInit API, the default dvo output format is set to generic discrete sync interface (dvoFormat    = APP_DCTRL_DV_GENERIC_DISCSYNC), So after calling appDctrlVpParamsInit API, please change this variable and set it to APP_DCTRL_DV_BT656_EMBSYNC.

Regards,

Brijesh

hi Xin,

Ues HDMI in this case, but please note that it is not possible to output 1080p at 60fps in BT656 interface. You should change timing information based on your display requirement in appInit API of vision apps. 

Regards,

Brijesh

Hi Brijesh,

What is the maximum resolution and frame rate of the BT656 interface output?

Regards,

Xin

hi Xin,

I dont recollect, can you please refer to TRM for it? 

But 1080p at 60fps for BT656 requires around 300MHz clock, which is not supported. 

Regards,

Brijesh

Hi Brijesh,

Output 30fps is enough. I shouldn't need 60FPS. What do you mean by TRM?Where can I refer?

Regards,

Xin

Hi Xin,

for 30fps, it would require around 150MHz clock. I doubt if this can even be supported.

TRM mean technical reference manual. Please refer to this manual for figuring out clock limit. 

Regards,

Brijesh

Hi Brijesh,

I changed the code in three places: Run the program, and the frame rate is now 17. The image captured by the Capture node is 1080P 30FPS YUV422. The configuration is BT656 mode, 1080P 30FPS, videoIfWidth = 10bit.

GRAPH: capture_dss_Demo (#nodes =   2, #executions =   1598)
 NODE:       CAPTURE1:            CaptureNode: avg =    170 usecs, min/max =     89 /  41821 usecs, #executions =       1598
 NODE:       DISPLAY1:            DisplayNode: avg =  58387 usecs, min/max =     74 / 105801 usecs, #executions =       1598

 PERF:            TOTAL: avg =  58826 usecs, min/max =  57848 /  59894 usecs, #executions =        914

 PERF:            TOTAL:   16.99 FPS

diff --git a/platform/j721e/rtos/common/app_init.c b/platform/j721e/rtos/common/app_init.c
index 8483fa5..0ff9f76 100755
--- a/platform/j721e/rtos/common/app_init.c
+++ b/platform/j721e/rtos/common/app_init.c
@@ -531,7 +531,7 @@ int32_t appInit()
         prm.timings.vFrontPorch  = 4U;
         prm.timings.vBackPorch   = 36U;
         prm.timings.vSyncLen     = 5U;
-        prm.timings.pixelClock   = 148500000ULL;
+        prm.timings.pixelClock   = 74250000ULL;//148500000ULL;
 
         #ifdef ENABLE_DSS_DSI
             prm.display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DSI;

diff --git a/utils/dss/include/app_dctrl.h b/utils/dss/include/app_dctrl.h
index cff99c9..919c5ce 100755
--- a/utils/dss/include/app_dctrl.h
+++ b/utils/dss/include/app_dctrl.h
@@ -764,7 +764,7 @@ static inline void appDctrlVpParamsInit(app_dctrl_vp_params_t *vpParams)
         vpParams->vBackPorch   = 36U;
         vpParams->vSyncLen     = 5U;
         vpParams->pixelClock   = 148500U;
-        vpParams->dvoFormat    = APP_DCTRL_DV_GENERIC_DISCSYNC;
+        vpParams->dvoFormat    = APP_DCTRL_DV_BT656_EMBSYNC;
         vpParams->cscRange     = APP_DSS_CSC_RANGE_FULL;
         vpParams->videoIfWidth = APP_DCTRL_VIFW_12BIT;
         vpParams->actVidPolarity   = APP_DCTRL_POL_HIGH;

diff --git a/utils/dss/src/app_dss_defaults.c b/utils/dss/src/app_dss_defaults.c
index 7a2d610..3d16c6b 100755
--- a/utils/dss/src/app_dss_defaults.c
+++ b/utils/dss/src/app_dss_defaults.c
@@ -114,7 +114,7 @@ int32_t appDssDefaultInit(app_dss_default_prm_t *prm)
         obj->nodeDpiId     = APP_DCTRL_NODE_DPI_DPI0;
         obj->overlayId     = APP_DSS_OVERLAY_ID_2;
         obj->vpId          = APP_DSS_VP_ID_2;
-        obj->videoIfWidth  = APP_DCTRL_VIFW_24BIT;
+        obj->videoIfWidth  = APP_DCTRL_VIFW_10BIT;
     }
     else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
     {

There are a few things to make sure.
1. Is the videoIfWidth for BT656 10bit? I refer to the following documentation:

2.When reducing the resolution to 720P, what are the hFrontPorch, hBackPorch, hSyncLen, vFrontPorch, vBackPorch, vSyncLen sizes set?

3. I didn't find the description of the maximum clock frequency in BT656 mode in the documentation.

Regards,

Xin

Hi Xin,

xiu xin said:

1. Is the videoIfWidth for BT656 10bit? I refer to the following documentation:

Yes, in BT656 output mode, DSS outputs in 10bit interface, but you can use upper 8bits. 

xiu xin said:

2.When reducing the resolution to 720P, what are the hFrontPorch, hBackPorch, hSyncLen, vFrontPorch, vBackPorch, vSyncLen sizes set?

Typically these parameters are different between 1080p and 720p resolution, so please change it accordingly. 

xiu xin said:

3. I didn't find the description of the maximum clock frequency in BT656 mode in the documentation.

If i recollect, it was around 150MHz, but please refer to TRM for exact max frequency support.

Regards,

Brijesh

Hi Brijesh,

I tested it at 17FPS in 1080P mode. Is this the maximum frame rate supported at 1080P?

Regards,

Xin

Hi xin,

xiu xin said:

I tested it at 17FPS in 1080P mode. Is this the maximum frame rate supported at 1080P?

But this could be due to below change. Can you please revert this change and try it out? 

+        prm.timings.pixelClock   = 74250000ULL;//148500000ULL;

For 2200 x 1125 x 30x 2, it would require around 148.5MHz pixel clock.

Regards,

Brijesh

Hi Brijesh,

After I restored the pixel clock, the frame rate reached 30FPS. For the videoIfWidth property, is it ok to configure either 10bit or 8bit?

Regards,

Xin

Hi Xin,

Yes, When we say BT656, it outputs only in 10bits, we can use upper 8bits for connecting to external device.

Regards,

Brijesh

Hi Brijesh,

Does the output BT656 format need to set a specific VP to output?

Hi Xin,

No, all VPs can support BT656 output, but then you need to see if this VP can be connected to vout0 and use it accordingly. 

Regards,

Brijesh

Hi Brijesh,

HDMI mode uses VP =2 by default, is this OK?

int32_t appDssDefaultInit(app_dss_default_prm_t *prm)
{
    int32_t retVal = 0;
    app_dss_init_params_t dssParams;
    app_dss_default_obj_t *obj = &g_app_dss_default_obj;

    appLogPrintf("DSS: Init ... !!!\n");

    memcpy(&obj->initPrm, prm, sizeof(*prm));

    if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
    {
        appLogPrintf("DSS: Display type is eDP !!!\n");
        obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY1;
        obj->nodeVpId      = APP_DCTRL_NODE_VP1;
        obj->nodeDpiId     = APP_DCTRL_NODE_EDP_DPI0;
        obj->overlayId     = APP_DSS_OVERLAY_ID_1;
        obj->vpId          = APP_DSS_VP_ID_1;
        obj->videoIfWidth  = APP_DCTRL_VIFW_36BIT;
    }
    else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI)
    {
        appLogPrintf("DSS: Display type is HDMI !!!\n");
        obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2;
        obj->nodeVpId      = APP_DCTRL_NODE_VP2;
        obj->nodeDpiId     = APP_DCTRL_NODE_DPI_DPI0;
        obj->overlayId     = APP_DSS_OVERLAY_ID_2;
        obj->vpId          = APP_DSS_VP_ID_2;
        obj->videoIfWidth  = APP_DCTRL_VIFW_8BIT;
    }
    else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
    {
        appLogPrintf("DSS: Display type is DSI !!!\n");
        obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY3;
        obj->nodeVpId      = APP_DCTRL_NODE_VP3;
        obj->nodeDpiId     = APP_DCTRL_NODE_DSI_DPI2;
        obj->overlayId     = APP_DSS_OVERLAY_ID_3;
        obj->vpId          = APP_DSS_VP_ID_3;
        obj->videoIfWidth  = APP_DCTRL_VIFW_24BIT;
    }

    if(prm->enableM2m == TRUE)
    {
        appLogPrintf("DSS: M2M Path is enabled !!!\n");
        obj->m2m.enableM2m     = true;
        obj->m2m.nodeOverlayId = APP_DCTRL_NODE_OVERLAY4;
        obj->m2m.overlayId     = APP_DSS_OVERLAY_ID_4;
        obj->m2m.pipeId        = APP_DCTRL_NODE_VIDL2;
        obj->m2m.vpId          = APP_DSS_VP_ID_4;
        obj->m2m.nodeVpId      = APP_DCTRL_NODE_VP4;
    }

Regards,

Xin

Hi Xin,

This is tested code on EVM on TDA4VM, so yes, it is ok.

Regards,

Brijesh

Hi Brijesh,

Set BT656 output mode, in addition to modify dvoFormat, videoIfWidth, timing properties, the SDK in other places also need to set?

Regards,

Xin

Hi Xin,

Pinmux is another thing that you need to take care. Please set the correct mode for the pins that you are using from DSS output. 

Since it is BT656 output mode, you would most likely require 8 or 10 datalines output. 

Regards,

Brijesh

Hi Brijesh,

Is there a case of successful output in BT656 format? Only the clock signal is correct in the data I send now. There seems to be some problems with the data, and the coding chip can't recognize it. The pixel clock of BT656 format needs to be adjusted to twice the pixel clock of the normal calculation in order for the chip to correctly recognize the clock signal.

Regards,

Xin

Hi Xin,

No, as far as I know. Are you seeing correct 27MHz clock? What issue are you seeing with the data? If you set the clock to be double of required clock, what happens with the data rate? 

Regards,

Brijesh

Hi Brijesh,

I configured BT656 1080P 30FPS output using timings parameter below.

static inline void appDctrlVpParamsInit(app_dctrl_vp_params_t *vpParams)
{
    if(NULL != vpParams)
    {
        vpParams->vpId = APP_DSS_VP_ID_1;
        vpParams->standard     = APP_DCTRL_VID_STD_1080P_30;
        vpParams->width        = 1920U;
        vpParams->height       = 1080U;
        vpParams->hFrontPorch  = 88U;
        vpParams->hBackPorch   = 148U;
        vpParams->hSyncLen     = 44U;
        vpParams->vFrontPorch  = 4U;
        vpParams->vBackPorch   = 36U;
        vpParams->vSyncLen     = 5U;
        vpParams->pixelClock   = 148500U;
        vpParams->dvoFormat    = APP_DCTRL_DV_BT656_EMBSYNC;
        vpParams->cscRange     = APP_DSS_CSC_RANGE_FULL;
        vpParams->videoIfWidth = APP_DCTRL_VIFW_12BIT;
        vpParams->actVidPolarity   = APP_DCTRL_POL_HIGH;
        vpParams->pixelClkPolarity = APP_DCTRL_EDGE_POL_RISING;
        vpParams->hsPolarity = APP_DCTRL_POL_HIGH;
        vpParams->vsPolarity = APP_DCTRL_POL_HIGH;
    }
}

        prm.timings.width        = 1920U;
        prm.timings.height       = 1080U;
        prm.timings.hFrontPorch  = 88U;
        prm.timings.hBackPorch   = 148U;
        prm.timings.hSyncLen     = 44U;
        prm.timings.vFrontPorch  = 4U;
        prm.timings.vBackPorch   = 36U;
        prm.timings.vSyncLen     = 5U;
        prm.timings.pixelClock   = 148500000ULL;

    else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI)
    {
        appLogPrintf("DSS: Display type is HDMI !!!\n");
        obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2;
        obj->nodeVpId      = APP_DCTRL_NODE_VP2;
        obj->nodeDpiId     = APP_DCTRL_NODE_DPI_DPI0;
        obj->overlayId     = APP_DSS_OVERLAY_ID_2;
        obj->vpId          = APP_DSS_VP_ID_2;
        obj->videoIfWidth  = APP_DCTRL_VIFW_10BIT;
    }

I used an oscilloscope to measure the 8 data lines corresponding to the output of BT656, and all of them had data. The clock line frequency size of BT656 output is measured, which is corresponding to the Pixel clock size set. But the encoding chip can not output data after receiving these data.Is it possible to use the current configuration of the application layer to output BT656 format, the output data and clock do not correspond to?

I wonder if the current configuration about display in /vision_apps/utils/dss/src/app_dss_defaults.c applies to output BT656 format? Because generally one output RGB pixel corresponds to one clock time, and two clock times correspond to one pixel when output BT656. Does our application and driver layer support setting the output BT656 format? Or is it supported at the driver level but not at the application level? Could you confirm that?

Regards,

Xin

xiu xin said:

Is it possible to use the current configuration of the application layer to output BT656 format, the output data and clock do not correspond to?

Sorry did not get this question, you are getting the data and clock as per above configuration, aren't you seeing clock to be 148.5MHz? 

Are you setting video interface to be BT656 as i suggested earlier? Once it is set to BT656 output interface, DSS will start outputting in this format, You need then just adjust the timing as you require for the output chip. 

We have not tested BT656 output format, but yes, it is as such supported from driver and application level. I mean there is an interface to set the output in BT656 interface. 

Regards,

Brijesh

Hi Brijesh,

What I mean is that after the configuration as you said before, the oscilloscope measurement clock and data line have waveforms. When the pixel clock is set to 148.5MHZ, the oscilloscope measurement clock line frequency is also 148.5MHZ. But I guess the clock and the data may be out of sync because the decoder chip cannot output the data correctly after receiving it. Can you give an example of output 720P or 1080P BT656 format?

Regards,

Xin

Hi Xin,

Well, you can change the timing parameters for 720P display in appInit API and get the output in BT656 format.. 

Not sure what is the requirement for decoder chip, but when we set BT656 output from DSS, data and clock will be in sync.. They can't go out of sync. 

Regards,

Brijesh

Hi Brijesh,

Can you provide a demo that verifies the correct output in BT656 format? I need to refer to how to set it up.

Regards,

Xin

Hi Xin,

It cannot be verified on EVM, so there is no demo in the SDK. 

Regards,

Brijesh

Hi Brijesh,

Can you share a set of configuration for output BT656 format?

Regards,

Xin

Hi Xin,

For BT656 output, you just need to set dvoFormat to BT656 output. (in the API appDctrlVpParamsInit, vpParams->dvoFormat    = APP_DCTRL_DV_BT656_EMBSYNC).

There is no other change required, assuming pnmux is taken care. 

Regards,

Brijesh

Hi Brijesh，

Does the driver not configure the relevant chip pin after setting the output BT656 mode? If the driver does not configure the relevant pin in the setting BT656 mode, Can you send a patch to configure the relevant pin?

Regards,

Xin

Hi Xin,

What do you mean by chip pin? Do you mean pinmux? then no driver does not configure pinmux, it should be taken care in the application/upper layer.

Regards,

Brijesh

Hi Brijesh,

Yes,I mean pinmux.Can you send a patch to configure the pinmux?

Regards,

Xin

Hi Xin,

In vision sdk, when we set the output to HDMI, it already sets the pinmux for vout0, so can you please refer to it?

Regards,

Brijesh

Hi Brijesh，

I see that the default pinmux configuration of vout0 0~23 is output mode, do I need to modify it? Only open 0-9 or 2-9?

Regards,

Xin

Hi Xin,

no, you can keep the same pinmux value.

Regards,

Brijesh

Hi Brijesh，

Where is the timing parameter for sending BT656 configured?

The default path below:

psdk_rtos_j7 / vision_apps/platform/j721e/rtos/common/app_init.c

Can the same timing parameter types used in the path above be applied to the BT656 format?

Regards,

Xin

Hi Xin,

That depends on your receiving device. So please check if the same can be used in your receiving device, if not, you need to get the timing parameters from receiving device and set it in the DSS. 

Regards,

Brijesh

Hi Brijesh，

After modifying the timing parameter, I successfully sent 1080P BT656 format data through the DSS module.

However, a problem was discovered:the timing parameters configured in the code were not exactly the same as those read directly from the associated timing registers. I am now directly to manually modify the register value to figure out. Here's where I changed the code:
psdk_rtos_j7/vision_apps/platform/j721e/rtos/common/app_init.c

Did the driver reconfigure the registers?

Regards,

Xin

Hi Xin,

This is correct place for configuring timing parameter. Driver configures registers based on these provided values. What exactly difference are you using? 

Regards,

Brijesh

Hi Brijesh，

I looked at the code that shows the driver configuring the timing register and found that some of the parameters that the driver needs to configure are not sent by the application layer. As a result, the driver configuration is not exactly configured according to the application layer setting values, only a part of the register bits are the same.

Regards,

Xin

Xin,

Can you provide more information on this? I am not sure which parameter/register driver is configuring with the incorrect value, due to it being not provided by the application. 

Regards,

Brijesh

Hi Brijesh,

The default driver configuration is as follows:

if(TRUE == isCustomTiming)
        {
            hSyncVal = blankCfg->hSyncLen & 0xFFU;
            vSyncVal = (blankCfg->hSyncLen >> 8U) & 0xFU;

            regVal = CSL_REG32_RD(&vpRegs->TIMING_H);
            if(FVID2_SF_INTERLACED == scanFormat)
            {
                CSL_FINS(regVal, DSS_VP1_TIMING_H_HBP, blankCfg->hBackPorch);
                CSL_FINS(regVal, DSS_VP1_TIMING_H_HFP, blankCfg->hFrontPorch);
            }
            CSL_FINS(regVal, DSS_VP1_TIMING_H_HSW, hSyncVal);
            CSL_REG32_WR(&vpRegs->TIMING_H, regVal);

            regVal = CSL_REG32_RD(&vpRegs->TIMING_V);
            CSL_FINS(regVal, DSS_VP1_TIMING_V_VBP, blankCfg->vBackPorch);
            CSL_FINS(regVal, DSS_VP1_TIMING_V_VFP, blankCfg->vFrontPorch);
            CSL_FINS(regVal, DSS_VP1_TIMING_V_VSW, vSyncVal);
            CSL_REG32_WR(&vpRegs->TIMING_V, regVal);
        }
        else
        {
            retVal = CSL_EFAIL;
        }

But after selecting the custom configuration timing mode and BT656 mode. The if(FVID2_SF_INTERLACED == scanFormat) condition does not apply to the module in the driver, and I don't understand why vSyncVal = (blankCfg->hSyncLen >> 8U) & 0xFU;?

I made the following changes so that the application configuration parameters match those in the registers:

// vSyncVal = (blankCfg->hSyncLen >> 8U) & 0xFU;
vSyncVal = blankCfg->vSyncLen & 0xFFU;

regVal = CSL_REG32_RD(&vpRegs->TIMING_H);
// if(FVID2_SF_INTERLACED == scanFormat)
// {
    CSL_FINS(regVal, DSS_VP1_TIMING_H_HBP, blankCfg->hBackPorch);
    CSL_FINS(regVal, DSS_VP1_TIMING_H_HFP, blankCfg->hFrontPorch);
// }

Regards,

Xin

Hi Xin,

The other way is to provide the parameters in a such that the driver configures it correctly. So, can you try it? 

Regards,

Brijesh