Other Parts Discussed in Thread: SN74LVC1G08, AM263P4
1)
The AM263Px Datasheet (SPRSP81A) references signals OSPI0_RESET_OUT0 and OSPI0_RESET_OUT1 without explanation.
2)
AM263P Technical Reference Manual (SPRUJ55) references these signals in Section 1.4.11, and states that RESET_OUT0 is optional.
“Eleven pin interface for single OSPI device: DQS, DQ0, DQ1, DQ2, DQ3, DQ4, DQ5, DQ6, DQ7, CSn0, CLK – Optional pins: RESET_OUT0, ECC_FAIL, LBCLKO – Support for multiple OSPI devices: CSn1, RESET_OUT1”
3)
The document:
AM263P OSPI, QSPI Flash Selection Guide
… in Section 4, “Application Requirement” specifies:
“If the flash memory is larger than 16MB (128Mb), then a flash device package with support for a RESET signal is required to prevent a device warm reset from affecting ROM code execution. – For lower memory density flash devices that support a RESET signal, the recommended practice is connect the RESET signal.”
“Does the flash part support a RESET signal? If at any point of the application 4-byte addressing mode must be used, then a RESET signal is required to prevent booting problems upon reset.”
Questions:
I reviewed the TMDSCNCD263P-AM263Px Sitara Control Card schematic, I see that the OSPI reset is controlled by an output on the I/O Expander, and not connected to any OSPI0_RESET_OUTn signal.
Is TMDSCNCD263P-AM263Px Sitara Control Card a good reference design for a custom PCBA using the same OSPI part (IS25LX256-LHLE) as used on the TMDSCNCD263P?
Is TMDSCNCD263P susceptible to "warm reset from affecting ROM code execution"?
