Part Number: TDA4VM
Hi,
When ECC is enabled on MCU NAVSS UDMA and NAVSS0_UDMASS_ECC_AGGR0, ECC two-bit errors will occur immediately.Can you help me investigate?
Regards,
Xi wancheng
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Part Number: TDA4VM
Hi,
When ECC is enabled on MCU NAVSS UDMA and NAVSS0_UDMASS_ECC_AGGR0, ECC two-bit errors will occur immediately.Can you help me investigate?
Regards,
Xi wancheng
Hi,
Can you please read the below register to determine silicon revision under test:
CTRLMMR_WKUP_JTAGID: 0x43000014
TI looking to rule out errata i2191: J721E DRA829/TDA4VM Processors Silicon Revision 1.1/1.0 (Rev. C) (ti.com)

Regards,
Josiitaa
Hi,
We read the CTRLMMR_WKUP_JTAGID register, its value is 0x1BB6402F, what does this value represent? Does it correspond to SR 1.1 of the errata?
I also did some experiments. First, I turned off the ESM interrupt of MCU domain, and then enabled the ECC of MCU NAVSS UDMA, then clear the ECC error of ramId 80. Finally, I turned on the ESM interrupt of MCU domain, and after execution, ESM reported a ramId 99 interrupt error.
In addition, I reported several ramId 80 errors while manually identifying the SD card.
These are the current situation, please help me to investigate.
Thanks you.
Regared.
Hi,
Could you please share the context of "When ECC is enabled on MCU NAVSS UDMA and NAVSS0_UDMASS_ECC_AGGR0"? Thanks.
Linjun