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AM69: LPDDR4 Design validation

Part Number: AM69
Other Parts Discussed in Thread: AM625

Hello,

I would validate our board design using AM69 and LPDDR4.

There are a lot of configurations under "IOControl A) Processor/DDR Controller IO Configuration" and "IOControl B) DRAM IO Configuration" that may be tuned for the specific board design.

Is there something that can help me understand if the current configuration is correct?

I read the "Training Support" chapter in the reference manual. Is there a tool that extracts the data collected (data eye) and shows it?

Thanks,

kind regards.

Emanuele

  • Hi,

    There are a lot of configurations under "IOControl A) Processor/DDR Controller IO Configuration" and "IOControl B) DRAM IO Configuration" that may be tuned for the specific board design.

    Is there something that can help me understand if the current configuration is correct?

    Typically, simulations using IO models would be performed during the board design process. The IO models used during simulation would distinguish between different drive strength and ODT settings. The same values used for simulation could be used when bringing up your physical board. Do you already have an existing board, or is it actively being designed?

    The following application note should have additional information pertaining to simulations.

    https://www.ti.com/lit/pdf/spracn9 

    Regards,
    Kevin

  • : for TI AM625 there is a virtual eye tool (`DDRSS "Teye" Tool`) that proved to be very useful in tuning the memory controller configuration. Do you have it available for AM69?