DDR3 Placement for Keystone DSP C667x

As long as the DDR3 Design Guidelines are adhered to, yes they can be placed on opposite sides of the PCB.  There will be routing constraints that will need to be adhered to that are specified in the DDR3 Design Guidelines.

Best Regards,

Chad

Thank you Chad Courtney.

Regards,

Khader Shareef.

Khader,

Can you elaborate on what you mean by "mirrored fasion"?  There is a method of cross connecting address lines used on DIMMs that is referred to as mirroring which is not supported on the same rank.  I just wanted to be sure you weren't referring to that. 

Note that while placing memory components on both the top and bottom is possible it's difficult to route while achieving both the length matching for the address/command lines and minimizing the stub lengths.  Be sure to monitor these two parameters carefully during your routing process.

Regards, Bill

Hi Bill,

Thanks for the response. I was not referring to the DDR3 placement on DIMMs. I was actually referring to the placement of discrete DDR3 memory components on top and bottom side of the PCB to save some space.

Should it be fine if the address/command lines are length matched within the group, say from DSP to first DDR3 and then length matched within first DDR3 to the second DDR3 and so?

 Regards, Khader Shareef

Hi Khader,

Have you designed the PCB with this "DDR3 mirror" chips?

I appreciate if you can share with us your feedback?

Thank you!

Hi NK,

I will not be able to help you since we did not go ahead with DDR3 mirroring for the C6678 processor.

-Khader

Hi Khader,

Thank you for your quick reply!

Actually we consider to place C6678 processor on CS of PCB and to place four x16 DDR3 chips on PS of the PCB (due to area constraints).

Did you use this topology?

Thank you,

NK

Hi NK,

We have done the DDR3 placement same as in C6678 EVM.

Regards,

Khader

Hi Khader,

OK..Thank you for your feedback!

Regards,

NK