TDA4VM: TDA4VM CSITX question

Hi,

Yao Zhang said:

1.Is there a technical manual provided for TDA4 CSITX status and fault registers outside of the TRM manual

May I know if you would like to know anything more specific that is missed in the TRM?

Yao Zhang said:

2.Is there a successful mass production case of TDA4 with CSITX direct connection (no Serializer and deserializer on the link), especially the successful mass production case of direct connection 8155

3.At present, the product has been mass-produced, and there are serious issues related to CSITX in the end market. We expect TI to provide a local interface person in China, who will coordinate the 8155 chip technology interface person with OEM, as well as Tire1 of TDA4 and 8155, to solve the problem together and discuss follow-up strategies

Let me check this internally and get back to you

Regards,

Nikhil

hi expert 

1.When an error occurs, we want to know the status of CSITX to assist the receiving end in resolving the resulting error, There are many csitx registers in TRM that do not have detailed meanings, such as CSI_ TX_ IF_ DPHY-STatus: DPHY_ ULPS and DPHY_ STOPSTATE；

Perhaps my description is not accurate enough; Or rather, we use CSITX to communicate with another SOC (no Serializer and deserializer on the link). If I want to monitor the integrity and effectiveness of our sent data, and if there are errors, we want to use some status of our sending end to assist in solving the problem, I should refer to which registers to use

Hi Yao Zhang,

Yao Zhang said:

If I want to monitor the integrity and effectiveness of our sent data, and if there are errors, we want to use some status of our sending end to assist in solving the problem

The integrity and effectiveness are monitored on the receiving end (i.e. csirx). The csitx can only transmit the data. 

Nikhil Dasan said:

2.Is there a successful mass production case of TDA4 with CSITX direct connection (no Serializer and deserializer on the link), especially the successful mass production case of direct connection 8155

Typically the usecase involves a SERDES.

Nikhil Dasan said:

At present, the product has been mass-produced, and there are serious issues related to CSITX in the end market. We expect TI to provide a local interface person in China, who will coordinate the 8155 chip technology interface person with OEM, as well as Tire1 of TDA4 and 8155, to solve the problem together and discuss follow-up strategies

Please check with the Local TI support for the same.

Regards,

Nikhil

1.The error reported by our competitor has been analyzed in detail as CSI frame loss, FIFO queue data is empty. Do we have any relevant processing experience and investigation direction
2.The bits of the registers in the attached figure can indicate the loss of CSI frame header data and the empty FIFO queue data

Hi,

As mentioned above, the errors from the transmitting side can only be identified from the csirx receiver diagnostics, and you can check if it is a FIFO overflow, ecc error or crc error etc. 

Let me check internally again, if there are any error checker for CSITX

Regards,

Nikhil