TDA4VH-Q1: SysConfig Clock Tree for TDA4VH

Hi Jeremy,

jeremy borgman said:

Is there a way to generate the clock tree for TDA4VH using sysconfig?

This feature is not supported for TDA4VH or other TDA platforms. Alternatively, you can refer TDA4VH TRM chapter 5.4 for details.

Thanks.

Okay thanks for the update. I looked through the reference manual yesterday and was unable to answer my specific question which was why I was hoping for this tool.

The specific question I have is, what is the best timer resolution possible when using the TIMERx pins in timer capture mode. I have a 26MHz crystal connection to OSC_1 and a 19.2MHz crystal connectioned to WKUP_OSC0.

What I've looked at to try to figure this out:

Table 5-62 lists some example resolutions based on different input clocks, but does not fully show the math behind going from the external oscillator frequency to resolution. (Also I think there is a typo in the 27MHz example and 42mS should be swapped with 10.67uS).

Then in section 12.9.3.1 it says the clock selection is made from MCU_CTRL_MMR0. However, I've searched the TRM for the register definition and I cannot find a register definition for this.

Table 5-34 Clock mapping shows the possible mux definitions for the MCU_TIMER_x pins, and. one of those is MCU_SYSCLK0 with a typical value of 167MHz, but I am not entirely understanding why this value is typically 167MHz or how to adjust it.

Thanks for any help. If possible I'd like to understand the full math behind the answer rather than just knowing the best theoretical resolution so I can understand how to do the calculations in the future.

Thanks,

Jeremy