Other Parts Discussed in Thread: SYSBIOS
Tool/software:
I followed main_mcspi_dma_serial_flash_read_write.c to create a DSP project, SPI1, channel0, with EDMA channel 0， my code is below.
In the DSP main.c, I called spi_init(), spi_transfer().
The issue is as the code run at SPI_socGetInitCfg(), it gone crash. Question is, can DSP call this SPI_socGetInitCfg()?
I'm even quite not sure which library has the SPI_socGetInitCfg() API? The weird thing is, I can't pass the compilation after I comment out the SPI_socGetInitCfg.
The code enclosed in SOC_AM572x should not be executed for c66x DSP, right?
If yes, in this case, use McSPI in DSP, how to do PinMux？
/**
* \file mcspi_dma.c
*
* \brief McSpi test main file.
*/
#include <string.h>
/* XDCtools Header files */
#include <xdc/std.h>
#include <xdc/cfg/global.h>
#include <xdc/runtime/System.h>
#include <stdio.h>
//#include <ti/sysbios/knl/Task.h>
#include <xdc/runtime/Diags.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/Log.h>
#include <xdc/runtime/Timestamp.h>
/* BIOS Header files */
#include <ti/sysbios/BIOS.h>
#include <xdc/runtime/Error.h>
/* TI-RTOS Header files */
//#include <ti/drv/spi/SPI.h>
#include <ti/drv/spi/soc/SPI_soc.h>
#include <ti/drv/spi/src/SPI_osal.h>
#include <ti/drv/spi/MCSPI.h>
//#include <ti/drv/spi/soc/SPI_v1.h>
#include <ti/csl/src/ip/mcspi/V0/mcspi.h>
#include <ti/drv/spi/src/v0/SPI_v0.h>
#define SPI_HWAttrs SPI_v0_HWAttrs
#define SPI_DMA_ENABLE
#ifdef SPI_DMA_ENABLE
#include <ti/osal/CacheP.h>
/* EDMA3 Header files */
#include <ti/sdo/edma3/drv/edma3_drv.h>
#include <ti/sdo/edma3/rm/edma3_rm.h>
#include <ti/sdo/edma3/rm/sample/bios6_edma3_rm_sample.h>
#include <ti/sdo/edma3/rm/edma3_common.h>
#include <ti/sdo/edma3/drv/edma3_drv.h>
#endif
#include "mcspi_dma.h"
/**********************************************************************
************************** Macros ************************************
**********************************************************************/
/* Maximum # of channels per SPI instance */
#define MCSPI_MAX_NUM_CHN (4U)
/* Transfer length in bytes */
#define MCSPI_XFER_LEN (1U)
#define CM_L4PER_MCSPI1_CLKCTRL (0x4A0097F0)
/* Define the SPI test interface */
typedef struct SPI_Tests_s
{
bool (*testFunc)(void *);
int32_t testId;
bool pollMode;
bool cbMode;
bool dmaMode;
uint32_t timeout;
char testDesc[80];
} SPI_Tests;
/* Cross bar specific configurations specific to AM571x and AM572x */
#if defined(SOC_AM574x) || defined(SOC_AM572x) || defined (SOC_AM571x)
extern void MCSPI_Board_crossbarInit(void);
#endif
/**********************************************************************
************************** Global Variables **************************
**********************************************************************/
/* Buffer containing the known data that needs to be written to flash */
#ifdef _TMS320C6X
#pragma DATA_ALIGN (txBuf, 128)
uint8_t txBuf[1U];
#else
uint8_t txBuf[1U] __attribute__((aligned(128)));
#endif
/* Buffer containing the received data */
#ifdef _TMS320C6X
#pragma DATA_ALIGN (rxBuf, 128)
uint8_t rxBuf[1U] = {0xFFU};
#else
uint8_t rxBuf[1U] __attribute__((aligned(128))) = {0xFFU};
#endif
/* Transaction data */
SPI_Transaction transaction;
MCSPI_Handle gMcSpiHandle; /* SPI handle */
static EDMA3_RM_Handle MCSPIApp_edmaInit(void);
#if 1
void MCSPI_Board_crossbarInit(void)
{
/* SPI1 Clock Enable */
HW_WR_REG32(CM_L4PER_MCSPI1_CLKCTRL, 0x00000002);
/* GPIO3 Clock Enable */
//HW_WR_REG32(0x4A009768, 0x00000102);
/* GPIO3_19 */
//HW_WR_REG32((SOC_CORE_PAD_IO_REGISTERS_BASE + CTRL_CORE_PAD_VIN1A_D15),
// (CTRL_CORE_PAD_VIN1A_D15_PILLUP));
#if 0
#ifdef C66X
#error "C66X defined\n"
/* Configure xbar connect for MCSPI3: DSP_IRQ_43 (reserved) mapped to MCSPI3 intr */
CSL_xbarIrqConfigure (CSL_XBAR_IRQ_CPU_ID_DSP1,
CSL_XBAR_INST_DSP1_IRQ_43, /* should match with C66 intc eventId in hwAttr */
CSL_XBAR_MCSPI3_IRQ);
#endif
#else
// default configured, no need here
//CSL_xbarIrqConfigure (CSL_XBAR_IRQ_CPU_ID_DSP1,
// CSL_XBAR_INST_DSP1_IRQ_91, /* should match with C66 intc eventId in hwAttr */
// CSL_XBAR_MCSPI1_IRQ);
#endif
}
void padConfig_prcmEnable()
{
/* Loopback mode is not available for MCSPI. To test Loopback on McSPI,
* Receive Bit is enabled on both Tx and Rx pins of McSPI
*/
//#if defined(SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x)
#if 1
/* HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_VOUT1_VSYNC,0x000C0008); // SPI3_SCLK (SPI3_IOSet_2)
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_VOUT1_DE,0x000C0008); // SPI3_D1 (SPI3_IOSet_2)
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_VOUT1_HSYNC,0x000C0008); // SPI3_D0 (SPI3_IOSet_2)
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_VOUT1_CLK,0x00060008); // SPI3_CS0 (SPI3_IOSet_2)
*/
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI1_SCLK,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI1_D1,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI1_D0,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI1_CS0,0x00060000);
/*
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI2_SCLK,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI2_D1,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI2_D0,0x000C0000);
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI2_CS0,0x00060000);
*/
#if defined (SOC_AM572x) || defined(SOC_AM574x)
//HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_VOUT1_FLD,0x00060008); // SPI3_CS1 (SPI3_IOSet_2)
//HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_SPI1_CS1,0x00060003);
#endif
#else
//#error "SOC_AM572x NOT defined\n"
#endif
}
/*
* ======== SPI init config ========
*/
static void SPI_initConfig(uint32_t instance)
{
SPI_HWAttrs spi_cfg;
/* Get the default SPI init configurations */
SPI_socGetInitCfg(instance, &spi_cfg);
return;
/* interrupt enabled */
spi_cfg.enableIntr = true;
/* Set the DMA related init config */
spi_cfg.edmaHandle = MCSPIApp_edmaInit();
spi_cfg.dmaMode = TRUE;
/* Set the SPI init configurations */
SPI_socSetInitCfg(instance, &spi_cfg);
}
void spi_init()
{
MCSPI_Params mcSpiParams;
uint32_t instance;
MCSPI_Board_crossbarInit();
padConfig_prcmEnable();
Log_print0(Diags_INFO, "SPI_initConfig()...");
instance = MCSPI_INSTANCE;
SPI_initConfig(instance);
Log_print0(Diags_INFO, "SPI_initConfig() done");
SPI_init();
Log_print0(Diags_INFO, "SPI_init() done");
/* Default SPI configuration parameters */
MCSPI_Params_init(&mcSpiParams);
mcSpiParams.frameFormat = SPI_POL1_PHA0;
mcSpiParams.transferTimeout = SemaphoreP_WAIT_FOREVER;
Log_print0(Diags_INFO, "MCSPI_open()...");
/* Open the default channel first */
gMcSpiHandle = MCSPI_open(instance, MCSPI_CHANNEL_0, &mcSpiParams);
if (gMcSpiHandle == NULL)
{
Log_print0(Diags_INFO, "Error initializing SPI");
}
else
{
Log_print1(Diags_INFO, "SPI instance %d initialized\n", instance);
}
}
/*
* ======== spi_transfer ========
*/
Bool spi_transfer(void *spi, uint8_t* txBuf, uint8_t* rxBuf, uint32_t len)
{
bool retVal;
transaction.status= SPI_TRANSFER_STARTED;
transaction.count = len;
transaction.txBuf = &txBuf[0];
transaction.rxBuf = &rxBuf[0];
CacheP_wb((void *)txBuf, (int32_t)len);
CacheP_wb((void *)rxBuf, (int32_t)len);
retVal = MCSPI_transfer((MCSPI_Handle)spi, &transaction);
CacheP_Inv((void *)rxBuf, (int32_t)len);
return (retVal);
}
#endif
#ifdef SPI_DMA_ENABLE
EDMA3_RM_Handle gEdmaHandle = NULL;
/**
* \brief Function to initialize the edma driver and get the handle to the
* edma driver;
*/
static EDMA3_RM_Handle MCSPIApp_edmaInit(void)
{
EDMA3_DRV_Result edmaResult = EDMA3_DRV_E_INVALID_PARAM;
uint32_t edma3Id;
if (gEdmaHandle != NULL)
{
return (gEdmaHandle);
}
edma3Id = 2;
gEdmaHandle = (EDMA3_RM_Handle)edma3init(edma3Id, &edmaResult);
if (edmaResult != EDMA3_DRV_SOK)
{
/* Report EDMA Error */
System_printf("\nEDMA driver initialization FAIL\n");
}
else
{
System_printf("\nEDMA driver initialization PASS.\n");
}
return(gEdmaHandle);
}
#endif
