AM62A7: Enabling the watchdog and testing

Part Number: AM62A7

Tool/software:

Hi,

Yocto SDK: 09_01_00

EVM: AM62A SK EVM

As per Academy link, watchdog node is not added in device tree. So, I have added watchdog in device tree file from k3-am62-main.dtsi device tree reference as below

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 7b654ee246d1..67cb0be04766 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -795,6 +795,42 @@ main_mcan0: can@20701000 {
                status = "disabled";
        };

+    main_rti0: watchdog@e000000 {
+        compatible = "ti,j7-rti-wdt";
+        reg = <0x00 0x0e000000 0x00 0x100>;
+        clocks = <&k3_clks 125 0>;
+        power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+        assigned-clocks = <&k3_clks 125 0>;
+        assigned-clock-parents = <&k3_clks 125 2>;
+    };
+
+    main_rti1: watchdog@e010000 {
+        compatible = "ti,j7-rti-wdt";
+        reg = <0x00 0x0e010000 0x00 0x100>;
+        clocks = <&k3_clks 126 0>;
+        power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+        assigned-clocks = <&k3_clks 126 0>;
+        assigned-clock-parents = <&k3_clks 126 2>;
+    };
+
+    main_rti2: watchdog@e020000 {
+        compatible = "ti,j7-rti-wdt";
+        reg = <0x00 0x0e020000 0x00 0x100>;
+        clocks = <&k3_clks 127 0>;
+        power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
+        assigned-clocks = <&k3_clks 127 0>;
+        assigned-clock-parents = <&k3_clks 127 2>;
+    };
+
+    main_rti3: watchdog@e030000 {
+        compatible = "ti,j7-rti-wdt";
+        reg = <0x00 0x0e030000 0x00 0x100>;
+        clocks = <&k3_clks 128 0>;
+        power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
+        assigned-clocks = <&k3_clks 128 0>;
+        assigned-clock-parents = <&k3_clks 128 2>;
+    };
+
        epwm0: pwm@23000000 {
                compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
                #pwm-cells = <3>;

After adding this, watchdog device are shown on the board as shown below

root@am62axx-evm:~# ls /dev/watchdog*
/dev/watchdog   /dev/watchdog0  /dev/watchdog1  /dev/watchdog2  /dev/watchdog3

I tried to write 'c' character in watchdog. That is triggering the watchdog and even after watchdog timed out than also not rebooting the board.

root@am62axx-evm:~# echo 'c' > /dev/watchdog3
root@am62axx-evm:~# [ 1057.553049] watchdog: watchdog3: nowayout prevents watchdog being stopped!
[ 1057.553063] watchdog: watchdog3: watchdog did not stop!

root@am62axx-evm:~#
root@am62axx-evm:~# wdctl /dev/watchdog3
Device:        /dev/watchdog3
Identity:      K3 RTI Watchdog [v[ 1128.415710] watchdog: watchdog3: nowayout prevents watchdog being stopped!
ersion 0]
Timeout:       60 seconds
[ 1128.415724] watchdog: watchdog3: watchdog did not stop!

Timeleft:       0 seconds
FLAG           DESCRIPTION           STATUS BOOT-STATUS
KEEPALIVEPING  Keep alive ping reply      1           0

What could be the problem here?

Jay 

  • Hello Jay,

    Please keep in mind that since you are working a bit ahead of us here, we might be limited in the support that we can offer (since we have not actually validated what you are trying to do yet). With that said, the basic watchdog circuitry should be the same on AM62Ax as on previous devices like AM62x, so I would assume that it would work the same.

    We recently (i.e., after SDK 9.2) patched the watchdog driver to fix a different issue, where the watchdog could not be pet. Did you first apply that patch to your kernel driver? If not, please do that first.

    Patch at: https://lore.kernel.org/lkml/20240417205700.3947408-1-jm@ti.com/

    More information at: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1338070/am625-how-to-control-the-watchdog

    While you are doing that, I will double check with the developer. I remember they were dealing with an issue where the watchdog would not actually reset the processor when it timed out, but I cannot remember what their solution was.

    Regards,

    Nick

  • Hi Nick,

    Thank you for your reply.

    I tried the patch you have mentioned. But still have the same behavior. Watchdog is getting expired but watchdog is not rebooting the board. 

    Lets us know once you get the update on "the watchdog would not actually reset the processor" issue. 

    Also, I come to know that our Yocto SDK is 09.01.00. I have corrected same in the query as well.

    Regards,

    Jay

  • Hello Jay,

    Thank you for trying out the patch, and your updated information. It does look like the developer has observed something similar to what you are seeing. I do not have any additional information yet - I'm working from a different country for the week, so interaction with the developer is taking a bit longer than usual.

    Please ping the thread on Monday if I have not responded by then. There is a lot going on right now, and I want to make sure I do not lose your thread!

    Regards,

    Nick

  • Hi Nick, 

    Is there any update on this thread? 

    Regards,

    Jay

  • Hello Jay,

    Thanks for the ping. The developer hasn't had time to run a bunch of tests and debug at this point in time - they suspected that something might be wrong with the clock routed to the watchdog, but have not done any investigation at this point.

    I would be curious to see the devmem2 values on your EVM for the watchdog status register CFG_WDSTATUS, and the Digital Watchdog Down Counter CFG_DWDCNTR (i.e., what is the status of the peripheral, and can you even see the counter value changing over time?)

    If the watchdog counter is not counting down, or counting down at a rate different from 32kHz, that could tell us something useful.

    Regards,

    Nick

  • Hi Nick, 

    Thank you for your reply.

    Please look at the values of CFG_DWDCNTR and CFG_WDSTATUS of watchdog device watchdog0

    root@am62axx-evm:~# devmem2 0x0e0000a0 //CFG_DWDCTRL
    /dev/mem opened.
    Memory mapped at address 0xffffa4ed8000.
    Read at address  0x0E0000A0 (0xffffa4ed80a0): 0x01FCB539
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0e0000a0 // CFG_DWDCTRL
    /dev/mem opened.
    Memory mapped at address 0xffff9e5c1000.
    Read at address  0x0E0000A0 (0xffff9e5c10a0): 0x01FB99A6
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0e0000a0 // CFG_DWDCTRL
    /dev/mem opened.
    Memory mapped at address 0xffff8c621000.
    Read at address  0x0E0000A0 (0xffff8c6210a0): 0x01FA6DC9
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0e0000a0
    /dev/mem opened.
    Memory mapped at address 0xffffa7653000.
    Read at address  0x0E0000A0 (0xffffa76530a0): 0x01F96718
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0e000098 // WDSTATUS
    /dev/mem opened.
    Memory mapped at address 0xffffa0155000.
    Read at address  0x0E000098 (0xffffa0155098): 0x00000032
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0e000098 // WDSTATUS
    /dev/mem opened.
    Memory mapped at address 0xffffb4ae4000.
    Read at address  0x0E000098 (0xffffb4ae4098): 0x00000032

    Above is the value of registers after I kick-off the watchdog. Looks like watchdog is counting down. 

    Let me know anything else is required.

    Regards,

    Jay

  • Hello Jay,

    Thank you for sharing. Ok, so it looks like WDSTATUS is 0011 0010, which is definitely suspicious:

    DWWD = 1 = a time window violation has occurred. The watchdog will generate either a system reset or a non-maskable interrupt to the CPU in this case

    END = 1 = the end-time defined by the windowed watchdog configuration has been violated

    START = 0 = no start-time window violation has occurred

    KEYST = 0 = no wrong key or key-sequence written

    DWDST = 1 = DWD timeout period has expired

    AWDST = 0 = AWD pin 0 > 1 threshold not exceeded

    Followup questions

    Based on the numbers, I assume about 2 seconds passed between your read at line 4 and your read at line 9? (going by the difference in value, divided by 32,768 - might be helpful to enable the print timestamps in the terminal to have something to compare against)

    What timeout value did you program into the watchdog?

    Did you take those measurements before, or after the programmed timeout value would have expired?

    0x01FCB539 = about 1,017 seconds, which is pretty close to the reset value of 1FF_FFFF - I wonder if the timeout is somehow getting reset, or if the timeout occurred, and then the countdown value got reset afterwards.

    Regards,

    Nick

  • Hi Nick,

    What timeout value did you program into the watchdog?

    I didn't program any timeout value in watchdog, but when i use wdctl command to check timeout value, it says timeout of 60 seconds. So, I am believing that timeout is of 60 seconds.

    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [v[ 1054.239775] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    ersion 0]
    Timeout:       60 seconds
    [ 1054.239789] watchdog: watchdog0: watchdog did not stop!
    
    Timeleft:       0 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0

    Please check the status and control registers value with time stamps. Once i Start watchdog, status register value is 0x00000000. Once watchdog timer expires after 60 seconds, status register is changed and become 0x00000032. I captured the same scenario in the logs.

    [2024-06-17 12:54:00.979] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:02.500] /dev/mem opened.
    [2024-06-17 12:54:02.515] Memory mapped at address 0xffffa964b000.
    [2024-06-17 12:54:02.515] Read at address  0x0E0000A0 (0xffffa964b0a0): 0x01FFFFFF
    [2024-06-17 12:54:02.515] root@am62axx-evm:~# 
    [2024-06-17 12:54:03.139] root@am62axx-evm:~# 
    [2024-06-17 12:54:03.347] root@am62axx-evm:~# 
    [2024-06-17 12:54:03.523] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:04.259] /dev/mem opened.
    [2024-06-17 12:54:04.259] Memory mapped at address 0xffffb6410000.
    [2024-06-17 12:54:04.259] Read at address  0x0E0000A0 (0xffffb64100a0): 0x01FFFFFF
    [2024-06-17 12:54:04.259] root@am62axx-evm:~# 
    [2024-06-17 12:54:04.627] root@am62axx-evm:~# 
    [2024-06-17 12:54:04.851] root@am62axx-evm:~# 
    [2024-06-17 12:54:05.027] root@am62axx-evm:~# echo 1 > /dev/watchdog0
    [2024-06-17 12:54:09.843] root@am62axx-evm:~# [   21.191621] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [2024-06-17 12:54:09.859] [   21.191640] watchdog: watchdog0: watchdog did not stop!
    [2024-06-17 12:54:10.259] 
    [2024-06-17 12:54:10.259] root@am62axx-evm:~# 
    [2024-06-17 12:54:10.467] root@am62axx-evm:~# 
    [2024-06-17 12:54:10.675] root@am62axx-evm:~# 
    [2024-06-17 12:54:10.851] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:12.659] /dev/mem opened.
    [2024-06-17 12:54:12.659] Memory mapped at address 0xffff80ac6000.
    [2024-06-17 12:54:12.675] Read at address  0x0E0000A0 (0xffff80ac60a0): 0x00198981
    [2024-06-17 12:54:12.675] root@am62axx-evm:~# 
    [2024-06-17 12:54:13.362] root@am62axx-evm:~# 
    [2024-06-17 12:54:13.571] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:17.698] /dev/mem opened.
    [2024-06-17 12:54:17.698] Memory mapped at address 0xffffa9118000.
    [2024-06-17 12:54:17.698] Read at address  0x0E0000A0 (0xffffa91180a0): 0x00172529
    [2024-06-17 12:54:17.714] root@am62axx-evm:~# 
    [2024-06-17 12:54:19.266] root@am62axx-evm:~# 
    [2024-06-17 12:54:19.506] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:22.050] /dev/mem opened.
    [2024-06-17 12:54:22.066] Memory mapped at address 0xffff8768d000.
    [2024-06-17 12:54:22.066] Read at address  0x0E0000A0 (0xffff8768d0a0): 0x001512EA
    [2024-06-17 12:54:22.066] root@am62axx-evm:~# 
    [2024-06-17 12:54:22.706] root@am62axx-evm:~# 
    [2024-06-17 12:54:22.914] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:24.402] /dev/mem opened.
    [2024-06-17 12:54:24.418] Memory mapped at address 0xffffb7f53000.
    [2024-06-17 12:54:24.418] Read at address  0x0E0000A0 (0xffffb7f530a0): 0x0013F4A5
    [2024-06-17 12:54:24.418] root@am62axx-evm:~# 
    [2024-06-17 12:54:25.234] root@am62axx-evm:~# 
    [2024-06-17 12:54:25.442] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:27.746] /dev/mem opened.
    [2024-06-17 12:54:27.746] Memory mapped at address 0xffff92bfa000.
    [2024-06-17 12:54:27.761] Read at address  0x0E0000A0 (0xffff92bfa0a0): 0x00125E46
    [2024-06-17 12:54:27.761] root@am62axx-evm:~# 
    [2024-06-17 12:54:28.545] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:30.769] /dev/mem opened.
    [2024-06-17 12:54:30.769] Memory mapped at address 0xffff9e0e5000.
    [2024-06-17 12:54:30.785] Read at address  0x0E0000A0 (0xffff9e0e50a0): 0x0010EE7A
    [2024-06-17 12:54:30.785] root@am62axx-evm:~# 
    [2024-06-17 12:54:35.873] root@am62axx-evm:~# 
    [2024-06-17 12:54:36.001] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:37.297] /dev/mem opened.
    [2024-06-17 12:54:37.297] Memory mapped at address 0xffff855ec000.
    [2024-06-17 12:54:37.297] Read at address  0x0E0000A0 (0xffff855ec0a0): 0x000DD5D8
    [2024-06-17 12:54:37.297] root@am62axx-evm:~# 
    [2024-06-17 12:54:38.049] root@am62axx-evm:~# 
    [2024-06-17 12:54:38.273] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:40.096] /dev/mem opened.
    [2024-06-17 12:54:40.097] Memory mapped at address 0xffff80d80000.
    [2024-06-17 12:54:40.097] Read at address  0x0E0000A0 (0xffff80d800a0): 0x000C80A9
    [2024-06-17 12:54:40.112] root@am62axx-evm:~# 
    [2024-06-17 12:54:41.457] root@am62axx-evm:~# 
    [2024-06-17 12:54:41.665] root@am62axx-evm:~# devmem2 0x0e000098
    [2024-06-17 12:54:45.952] /dev/mem opened.
    [2024-06-17 12:54:45.952] Memory mapped at address 0xffffa9115000.
    [2024-06-17 12:54:45.952] Read at address  0x0E000098 (0xffffa9115098): 0x00000000
    [2024-06-17 12:54:45.968] root@am62axx-evm:~# 
    [2024-06-17 12:54:47.328] root@am62axx-evm:~# 
    [2024-06-17 12:54:48.688] root@am62axx-evm:~# devmem2 0x0e000098
    [2024-06-17 12:54:51.200] /dev/mem opened.
    [2024-06-17 12:54:51.216] Memory mapped at address 0xffff8ab96000.
    [2024-06-17 12:54:51.216] Read at address  0x0E000098 (0xffff8ab96098): 0x00000000
    [2024-06-17 12:54:51.216] root@am62axx-evm:~# 
    [2024-06-17 12:54:52.976] root@am62axx-evm:~# 
    [2024-06-17 12:54:53.231] root@am62axx-evm:~# devmem2 0x0e000098
    [2024-06-17 12:54:56.000] /dev/mem opened.
    [2024-06-17 12:54:56.015] Memory mapped at address 0xffff9306e000.
    [2024-06-17 12:54:56.015] Read at address  0x0E000098 (0xffff9306e098): 0x00000000
    [2024-06-17 12:54:56.015] root@am62axx-evm:~# 
    [2024-06-17 12:54:57.055] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:54:59.631] /dev/mem opened.
    [2024-06-17 12:54:59.631] Memory mapped at address 0xffff7fdaa000.
    [2024-06-17 12:54:59.647] Read at address  0x0E0000A0 (0xffff7fdaa0a0): 0x000337DE
    [2024-06-17 12:54:59.647] root@am62axx-evm:~# 
    [2024-06-17 12:55:00.479] root@am62axx-evm:~# 
    [2024-06-17 12:55:00.735] root@am62axx-evm:~# devmem2 0x0e000098
    [2024-06-17 12:55:04.303] /dev/mem opened.
    [2024-06-17 12:55:04.303] Memory mapped at address 0xffff896fa000.
    [2024-06-17 12:55:04.319] Read at address  0x0E000098 (0xffff896fa098): 0x00000000
    [2024-06-17 12:55:04.319] root@am62axx-evm:~# 
    [2024-06-17 12:55:05.263] root@am62axx-evm:~# devmem2 0x0e000098
    [2024-06-17 12:55:07.582] /dev/mem opened.
    [2024-06-17 12:55:07.582] Memory mapped at address 0xffffb44f4000.
    [2024-06-17 12:55:07.583] Read at address  0x0E000098 (0xffffb44f4098): 0x00000032
    [2024-06-17 12:55:07.583] root@am62axx-evm:~# 
    [2024-06-17 12:55:09.134] root@am62axx-evm:~# 
    [2024-06-17 12:55:09.423] root@am62axx-evm:~# devmem2 0x0e0000a0
    [2024-06-17 12:55:11.870] /dev/mem opened.
    [2024-06-17 12:55:11.870] Memory mapped at address 0xffffba7fd000.
    [2024-06-17 12:55:11.870] Read at address  0x0E0000A0 (0xffffba7fd0a0): 0x01FD68D3
    [2024-06-17 12:55:11.870] root@am62axx-evm:~# 
    [2024-06-17 12:55:12.430] root@am62axx-evm:~# 
    [2024-06-17 12:55:12.590] root@am62axx-evm:~# 
     

    Let me know any other clarification is required. 

    Can we expedite this issue as we have started manufacturing of prototype board. After testing the proto board, we will go for production. And watchdog feature is required for our application implementation. 

    Regards,

    Jay

  • Hello Jay,

    Thank you for sharing. I'll take a closer look at your output tomorrow, and plan to run some tests on my side within the next couple of days.

    Regards,

    Nick

  • Hi Nick,

    Any update on this thread?

    Regards,

    Jay

  • Hello Jay,

    Thank you for the ping! I will be spending some extra time on watchdog related stuff over the next couple of days to try to get you and a couple of other customers over the hump.

    responding to your last posts 

    yes, 60 seconds is the default timeout value.

    It looks like after the watchdog counter value reaches 0, it wraps back around to the largest programmable timeout value, which makes sense. This matches output I have gotten from another customer.

    0x32 makes sense and matches output from another customer as well:
    After letting watchdog expire, NO pets: 0x32 = 0b11_0010

    DWWD 1 = a time window violation has occurred
    END 1 = the end-time defined by the windowed watchdog configuration has been violated
    DWDST 1 = DWD timeout period has expired

    time decrease:
    17.698 - 12.675 = 5.023 seconds elapsed in print statement
    0x00198981 - 0x00172529 = 0x2 6458 = 156,760 / 32768 = 4.78 seconds elapsed according to the watchdog timer

    That's a fairly sizable difference in elapsed time. I'll double-check your clock source in a later response.

    Updates from the other threads 

    Here are the other customers working through a similar issue. I'm hoping between the 4 of us we can get yall moving soon:
    AM62Px at https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1370422/am62p-am62p
    AM62x at https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1377565/re-am623-watchdog-will-not-reset-processor

    What version of u-boot are you using? Did you make sure that ESM is properly defined in the uboot devicetree file, as discussed here?
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1370422/am62p-am62p/5263332#5263332

    My next steps 

    Before signing off for today, I'll try to double-check everyone's clock sources to make sure yall (and us) aren't using the RC clock to source the watchdog timer. Then I'll start digging into the ESM settings to figure out exactly what we should expect to see in the ESM registers for a working case.

    Regards,

    Nick

  • I spent some more time looking through clocking on the AM62x today (ran out of time before I could get to AM62A). Details here:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1377565/re-am623-watchdog-will-not-reset-processor/5265382#5265382

    Regards,

    Nick

  • Hello Jay,

    I think we have enough information to get watchdog working on AM62Ax.

    The template for getting started (this is NOT the only change that is needed though!)

    First off, watchdog will be added on AM62Ax for SDK 10.0.

    For Linux devicetree file, start by referring to https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=ti-linux-6.6.y-cicd (ti-linux-kernel, branch ti-linux-6.6.y-cicd)

    For Uboot devicetree file, refer to https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/arch/arm/dts/k3-am62a-main.dtsi?h=ti-u-boot-2024.04-next (ti-u-boot branch 2024.4-next)

    You want to look for the ESM settings, in addition to the watchdog settings. Once the watchdog times out, it sends an interrupt to the ESM module, and then the ESM module causes the processor to reset. If the ESM doesn't receive an interrupt, the reset will not happen.

    There might also be changes to other uboot files - please check the commit history of the repo. It's 10pm here, so I'm running out of time to do research.

    Now we need to change the ESM interrupt numbers to match the AM62Ax Technical Reference Manual 

    As of today, the AM62Ax watchdog code enables the wrong ESM interrupt numbers - the numbers are copy pasted from AM62x, but the AM62x ESM is different from the AM62Ax ESM.

    Please refer to this other post here for a summary of the ESM interrupt numbers you should use in your code:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1370422/am62p-am62p/5268347#5268347

    If you are able to get things working, could I get you to post your updated code? 

    The developer is in all-day trainings last week and this week, but once they come back we have a very short window of time for them to fix this for the SDK 10.0 release. I will point them to this thread, so your working code could be very helpful.

    Regards,

    Nick

  • Hi Nick,

    Thank you for your reply.

    Let me go through the solution you have provided. If I get it working, I'll post the patch here. So, it can useful for developer.

    Regards,

    Jay

  • Hello Jay,

    Sounds good. I'll be working Wednesday & Thursday this week if you need to have any additional discussion - after that I'll be on vacation until July 15.

    Regards,

    Nick

  • Hi Nick,

    I tried to check the u-boot changes but I am not able to figure out the u-boot changes for watchdog. Let us know the u-boot changes for the watchdog.

    Regards,

    Jay

  • Hi Jay,

    Nick is out of office and will respond to your query once he is back.

    Regards,
    Krunal

  • Hi NIck, 

    Did you get the chance to look into in this thread?

    Regards,

    Jay

  • Hello Jay,

    Thanks for the ping. Still trying to catch up on everything, so it will be a couple more days before I'll be able to invest much time on this thread.

    Did you try modifying  <u-boot-ti>/arch/arm/dts/k3-AM62A_file_name_here-main.dtsi and adding the interrupt numbers listed in the ESM_xxx_IN entries in this response? https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1370422/am62p-am62p/5268347#5268347

    Feel free to attach your modified code here for review.

    Regards,

    Nick

  • Hi Nick, 

    I have did below changes in u-boot dtsi file.

    diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
    index 41aec3a82e..72032cb263 100644
    --- a/arch/arm/dts/k3-am62a-main.dtsi
    +++ b/arch/arm/dts/k3-am62a-main.dtsi
    @@ -171,6 +171,109 @@
                    pinctrl-single,function-mask = <0xffffffff>;
            };
    
    +       main_esm: esm@420000 {
    +               compatible = "ti,j721e-esm";
    +               reg = <0x0 0x420000 0x0 0x1000>;
    +               ti,esm-pins = <192>, <193>, <195>, <209>, <210>, <204>;
    +               bootph-pre-ram;
    +       };
    +
    +    main_timer0: timer@2400000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2400000 0x00 0x400>;
    +        interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 36 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 36 2>;
    +        assigned-clock-parents = <&k3_clks 36 3>;
    +        power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer1: timer@2410000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2410000 0x00 0x400>;
    +        interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 37 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 37 2>;
    +        assigned-clock-parents = <&k3_clks 37 3>;
    +        power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer2: timer@2420000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2420000 0x00 0x400>;
    +        interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 38 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 38 2>;
    +        assigned-clock-parents = <&k3_clks 38 3>;
    +        power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer3: timer@2430000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2430000 0x00 0x400>;
    +        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 39 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 39 2>;
    +        assigned-clock-parents = <&k3_clks 39 3>;
    +        power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer4: timer@2440000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2440000 0x00 0x400>;
    +        interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 40 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 40 2>;
    +        assigned-clock-parents = <&k3_clks 40 3>;
    +        power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer5: timer@2450000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2450000 0x00 0x400>;
    +        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 41 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 41 2>;
    +        assigned-clock-parents = <&k3_clks 41 3>;
    +        power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer6: timer@2460000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2460000 0x00 0x400>;
    +        interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 42 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 42 2>;
    +        assigned-clock-parents = <&k3_clks 42 3>;
    +        power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
    +    main_timer7: timer@2470000 {
    +        compatible = "ti,am654-timer";
    +        reg = <0x00 0x2470000 0x00 0x400>;
    +        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
    +        clocks = <&k3_clks 43 2>;
    +        clock-names = "fck";
    +        assigned-clocks = <&k3_clks 43 2>;
    +        assigned-clock-parents = <&k3_clks 43 3>;
    +        power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
    +        ti,timer-pwm;
    +    };
    +
            main_uart0: serial@2800000 {
                    compatible = "ti,am64-uart", "ti,am654-uart";
                    reg = <0x00 0x02800000 0x00 0x100>;
    @@ -536,6 +639,51 @@
                    ti,mbox-num-fifos = <16>;
            };
    
    +    main_rti0: watchdog@e000000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e000000 0x00 0x100>;
    +        clocks = <&k3_clks 125 0>;
    +        power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 125 0>;
    +        assigned-clock-parents = <&k3_clks 125 2>;
    +    };
    +
    +    main_rti1: watchdog@e010000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e010000 0x00 0x100>;
    +        clocks = <&k3_clks 126 0>;
    +        power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 126 0>;
    +        assigned-clock-parents = <&k3_clks 126 2>;
    +    };
    +
    +    main_rti2: watchdog@e020000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e020000 0x00 0x100>;
    +        clocks = <&k3_clks 127 0>;
    +        power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 127 0>;
    +        assigned-clock-parents = <&k3_clks 127 2>;
    +    };
    +
    +    main_rti3: watchdog@e030000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e030000 0x00 0x100>;
    +        clocks = <&k3_clks 128 0>;
    +        power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 128 0>;
    +        assigned-clock-parents = <&k3_clks 128 2>;
    +    };
    +
    +    main_rti4: watchdog@e040000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e040000 0x00 0x100>;
    +        clocks = <&k3_clks 205 0>;
    +        power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 205 0>;
    +        assigned-clock-parents = <&k3_clks 205 2>;
    +    };
    +
            c7x_0: dsp@7e000000 {
                    compatible = "ti,am62a-c7xv-dsp";
                    reg = <0x00 0x7e000000 0x00 0x00100000>;

    Also I did changes in kernel dtsi file as below.

    diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    index 7b654ee246d1..8435e95b3929 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    @@ -248,6 +248,13 @@ main_pmx0: pinctrl@f4000 {
                    #interrupt-cells = <1>;
            };
    
    +    main_esm: esm@420000 {
    +        compatible = "ti,j721e-esm";
    +        reg = <0x0 0x420000 0x0 0x1000>;
    +        ti,esm-pins = <192>, <193>, <195>, <209>, <210>, <204>;
    +        bootph-pre-ram;
    +    };
    +
            main_timer0: timer@2400000 {
                    compatible = "ti,am654-timer";
                    reg = <0x00 0x2400000 0x00 0x400>;
    @@ -795,6 +802,51 @@ main_mcan0: can@20701000 {
                    status = "disabled";
            };
    
    +    main_rti0: watchdog@e000000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e000000 0x00 0x100>;
    +        clocks = <&k3_clks 125 0>;
    +        power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 125 0>;
    +        assigned-clock-parents = <&k3_clks 125 2>;
    +    };
    +
    +    main_rti1: watchdog@e010000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e010000 0x00 0x100>;
    +        clocks = <&k3_clks 126 0>;
    +        power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 126 0>;
    +        assigned-clock-parents = <&k3_clks 126 2>;
    +    };
    +
    +    main_rti2: watchdog@e020000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e020000 0x00 0x100>;
    +        clocks = <&k3_clks 127 0>;
    +        power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 127 0>;
    +        assigned-clock-parents = <&k3_clks 127 2>;
    +    };
    +
    +    main_rti3: watchdog@e030000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e030000 0x00 0x100>;
    +        clocks = <&k3_clks 128 0>;
    +        power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 128 0>;
    +        assigned-clock-parents = <&k3_clks 128 2>;
    +    };
    +
    +    main_rti4: watchdog@e040000 {
    +        compatible = "ti,j7-rti-wdt";
    +        reg = <0x00 0x0e040000 0x00 0x100>;
    +        clocks = <&k3_clks 205 0>;
    +        power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +        assigned-clocks = <&k3_clks 205 0>;
    +        assigned-clock-parents = <&k3_clks 205 2>;
    +    };
    +
            epwm0: pwm@23000000 {
                    compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
                    #pwm-cells = <3>;

    I tried testing the watchdog with this two changes but no success. Looks like watchdog is getting reload before it reaches expiry time.

    root@am62axx-evm:~# wdctl /dev/watchdog0
    [  218.466254] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [  218.466268] watchdog: watchdog0: watchdog did not stop!
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [version 0]
    Timeout:       60 seconds
    Pre-timeout:    0 seconds
    Timeleft:      33 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [v[  219.582645] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    ersion 0]
    Timeout:       60 seconds
    [  219.582665] watchdog: watchdog0: watchdog did not stop!
    
    Timeleft:      32 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    [  220.636494] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    Identity:      K3 RTI Watchdog [version 0]
    Timeout:       60 se[  220.636507] watchdog: watchdog0: watchdog did not stop!
    conds
    Pre-timeout:    0 seconds
    Timeleft:      31 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [v[  221.641155] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    ersion 0]
    Timeout:       60 seconds
    [  221.641169] watchdog: watchdog0: watchdog did not stop!
    Pre-timeout:    0 seconds
    Timeleft:      30 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0[  222.665383] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    
    Identity:      K3 RTI Watchdog [version 0]
    Timeout:       60 [  222.665397] watchdog: watchdog0: watchdog did not stop!
    seconds
    Pre-timeout:    0 seconds
    Timeleft:      29 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    [  223.690571] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [  223.690595] watchdog: watchdog0: watchdog did not stop!
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [version 0]
    Timeout:       60 seconds
    Pre-timeout:    0 seconds
    Timeleft:      27 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [v[  224.940707] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    ersion 0]
    Timeout:       60 seconds
    [  224.940721] watchdog: watchdog0: watchdog did not stop!
    
    Timeleft:      26 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# wdctl /dev/watchdog0
    Device:        /dev/watchdog0
    Identity:      K3 RTI Watchdog [v[  226.351104] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    ersion 0]
    Timeout:       60 seconds
    [  226.351119] watchdog: watchdog0: watchdog did not stop!
    
    Timeleft:      58 seconds
    FLAG           DESCRIPTION           STATUS BOOT-STATUS
    KEEPALIVEPING  Keep alive ping reply      1           0

    as you can see "timeleft" is decreasing but did not reach till 0 and got reloaded before that.

    Also, the watchdog status register giving the same error as before.

    root@am62axx-evm:~# devmem2 0x0e000098
    /dev/mem opened.
    Memory mapped at address 0xffff8f5d9000.
    Read at address  0x0E000098 (0xffff8f5d9098): 0x00000032

    Let me know if i need to do any other changes.

    Regards,

    Jay

  • Hello Jay,

    Thanks for posting your information, and apologies for the delayed responses. I will set aside some time tomorrow (Tuesday) to look through your code & outputs, and get back to you.

    Regards,

    Nick

  • Hi Nick,

    Let us know once you have any update on this thread.

    Regards,

    Jay

  • Hi Nick, 

    Any update on this thread?

    Regards,

    Jay

  • Hello Jay,

    I am sorry for the continued delays here. I've been trying to carve out some time to sit down and go through this watchdog stuff every day for the past week, and I keep running out of time :( It's bedtime already, so this is another day where I won't be able to dive into it.

    Your thread IS top of mind - as soon as I get a free hour you are at the top of the TODO list. I am hoping to get that time tomorrow, but realistically it may be a couple more days.

    Regards,

    Nick

  • Hello Jay,

    Another partial update. Our developer has started looking into the watchdog issue on this end as well, so I'll be conducting a code review tomorrow and provide another update then.

    Regards,

    Nick

  • Hi Nick,

    Thank you for your update on this thread. 

    we will wait for your reply.

    Regards,

    Jay

  • Hello Jay,

    Ok, I think I have the entire set of patches. I'm grabbing a lot of these from the TI internal patch review chat, so if the patch is public I'll link to the public patch, and if the patch is still internal I'll copy paste the entire patch into the comment. I suspect that your issue might come from not having all of the "initial ESM patches for Uboot" that are listed below.

    Keep in mind all these patches were applied onto kernel 6.6, so they might not apply cleanly onto SDK 9.2 / kernel 6.1. I have not tried the full setup at this point in time.

    apply the patch adding safety margin to the Linux watchdog driver

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/?h=ti-linux-6.6.y-cicd&id=0f733618da334a329c211d690975b12477253dca

    This prevents system reboots by making sure that the watchdog never gets pet before the 50% window opens.

    Apply initial ESM patches to uboot 

    AM62Ax:

    Add RTI nodes from https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit?h=ti-u-boot-2024.04&id=e703bfcb38ce837c5fd9e12ad15412eae951a7d7 : 

    --- a/arch/arm/dts/k3-am62a-main.dtsi
    +++ b/arch/arm/dts/k3-am62a-main.dtsi
    
    +       main_rti0: watchdog@e000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e000000 0x00 0x100>;
    +               clocks = <&k3_clks 125 0>;
    +               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 125 0>;
    +               assigned-clock-parents = <&k3_clks 125 2>;
    +       };
    +
    +       main_rti1: watchdog@e010000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e010000 0x00 0x100>;
    +               clocks = <&k3_clks 126 0>;
    +               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 126 0>;
    +               assigned-clock-parents = <&k3_clks 126 2>;
    +       };
    +
    +       main_rti2: watchdog@e020000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e020000 0x00 0x100>;
    +               clocks = <&k3_clks 127 0>;
    +               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 127 0>;
    +               assigned-clock-parents = <&k3_clks 127 2>;
    +       };
    +
    +       main_rti3: watchdog@e030000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e030000 0x00 0x100>;
    +               clocks = <&k3_clks 128 0>;
    +               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 128 0>;
    +               assigned-clock-parents = <&k3_clks 128 2>;
    +       };
    +
    +       main_rti4: watchdog@e040000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e040000 0x00 0x100>;
    +               clocks = <&k3_clks 205 0>;
    +               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 205 0>;
    +               assigned-clock-parents = <&k3_clks 205 2>;
    +       };
    
    diff --git a/arch/arm/dts/k3-am62a-mcu.dtsi b/arch/arm/dts/k3-am62a-mcu.dtsi
    index 6d1e501b94..a6d16a9408 100644
    --- a/arch/arm/dts/k3-am62a-mcu.dtsi
    +++ b/arch/arm/dts/k3-am62a-mcu.dtsi
    
    +       mcu_rti0: watchdog@4880000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x04880000 0x00 0x100>;
    +               clocks = <&k3_clks 131 0>;
    +               power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 131 0>;
    +               assigned-clock-parents = <&k3_clks 131 2>;
    +               /* Tightly coupled to M4F */
    +               status = "reserved";
    +       };
    
    diff --git a/arch/arm/dts/k3-am62a-wakeup.dtsi b/arch/arm/dts/k3-am62a-wakeup.dtsi
    index 99afac40e8..4e8279fa01 100644
    --- a/arch/arm/dts/k3-am62a-wakeup.dtsi
    +++ b/arch/arm/dts/k3-am62a-wakeup.dtsi
    
    +       wkup_rti0: watchdog@2b000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x2b000000 0x00 0x100>;
    +               clocks = <&k3_clks 132 0>;
    +               power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 132 0>;
    +               assigned-clock-parents = <&k3_clks 132 2>;
    +               /* Used by DM firmware */
    +               status = "reserved";
    +       };
    
    

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2024.04&id=9c16beee1f49425a831892a40c252ffd667c9e15

    AM62Px:

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2024.04&id=df700f007e1fb9ae6d0ad7dc45ff770894de290e

    Both AM62Ax & AM62Px:

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2024.04&id=c3b1d4f90c9275146a3622d6eb3d73b7dedd5a94 (not in SDK 9.1, but in the latest ti-u-boot-2023.04)

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2024.04&id=3bef74453f34a28c7e6d9daeb520de2deab54803 (not in SDK 9.1, but in the latest ti-u-boot-2023.04)

    Apply initial ESM & watchdog nodes to Linux devicetree 

    AM62Ax:

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/?h=ti-linux-6.6.y-cicd&id=f1dfd180ab49fb797cf5b1f51e2988d7db45445a

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/?h=ti-linux-6.6.y-cicd&id=804702e4c2aa5eae4611e9389833631a6b22e913 

    AM62Px:

    initial ESM & watchdog are already in the devicetree starting in SDK 9.1

    Apply patches to fix the ESM configuration in uboot 

    AM62Ax:

    arch: arm: dts: k3-am62a-main: Fix interrupt sources
    
    Fix interrupt sources routed to ESM0, add comment to clarify which interrupt sources are routed to ESM0.
    
    Signed-off-by: Judith Mendez <jm@ti.com>
    ---
     arch/arm/dts/k3-am62a-main.dtsi | 3 ++-
     1 file changed, 2 insertions(+), 1 deletion(-)
    
    diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi index e5adae8209d..53964307858 100644
    --- a/arch/arm/dts/k3-am62a-main.dtsi
    +++ b/arch/arm/dts/k3-am62a-main.dtsi
    @@ -274,7 +274,8 @@
     	main_esm: esm@420000 {
     		compatible = "ti,j721e-esm";
     		reg = <0x0 0x420000 0x0 0x1000>;
    -		ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
    +		/* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
    +		ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
     		bootph-pre-ram;
     	};
     
    --
    2.45.2

    AM62Px:

    arch: arm: dts: k3-am62p-main: Fix interrupt sources
    
    Fix interrupt sources routed to ESM0, add comment to clarify which interrupt sources are routed to ESM0.
    
    Signed-off-by: Judith Mendez <jm@ti.com>
    ---
     arch/arm/dts/k3-am62p-main.dtsi | 3 ++-
     1 file changed, 2 insertions(+), 1 deletion(-)
    
    diff --git a/arch/arm/dts/k3-am62p-main.dtsi b/arch/arm/dts/k3-am62p-main.dtsi index 652908cf0d0..d8333023cdc 100644
    --- a/arch/arm/dts/k3-am62p-main.dtsi
    +++ b/arch/arm/dts/k3-am62p-main.dtsi
    @@ -269,7 +269,8 @@
     	main_esm: esm@420000 {
     		compatible = "ti,j721e-esm";
     		reg = <0x00 0x420000 0x00 0x1000>;
    -		ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
    +		/* Interrupt sources: rti0, rti1, wrti0 rti2, rti3, rti15 */
    +		ti,esm-pins = <224>, <225>, <227>, <241>, <242>, <248>;
     		bootph-pre-ram;
     	};
     
    --
    2.45.2

    Apply patches to fix the ESM configuration in Linux 

    Not sure if this is actually needed to get things working, but as a best practice Linux devicetree file should match uboot devicetree file.

    AM62Ax:

    arm64: dts: ti: k3-am62a-main: Fix interrupt sources
    
    Fix interrupt sources routed to ESM0, add comment to clarify which interrupt sources are routed to ESM0.
    
    Signed-off-by: Judith Mendez <jm@ti.com>
    ---
     arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 3 ++-
     1 file changed, 2 insertions(+), 1 deletion(-)
    
    diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    index 49eece9218c3..f9f1f50785e8 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    @@ -274,7 +274,8 @@ main_pmx0: pinctrl@f4000 {
     	main_esm: esm@420000 {
     		compatible = "ti,j721e-esm";
     		reg = <0x0 0x420000 0x0 0x1000>;
    -		ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
    +		/* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
    +		ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
     		bootph-pre-ram;
     	};
     
    --
    2.45.2
    

    AM62Px:

    arm64: dts: ti: k3-am62p-main: Fix interrupt sources
    
    Fix interrupt sources routed to ESM0, add comment to clarify which interrupt sources are routed to ESM0.
    
    Signed-off-by: Judith Mendez <jm@ti.com>
    ---
     arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 3 ++-
     1 file changed, 2 insertions(+), 1 deletion(-)
    
    diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
    index 48898ed15dbd..83d1ee3ea641 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
    @@ -300,7 +300,8 @@ main_pmx0_range: gpio-range {
     	main_esm: esm@420000 {
     		compatible = "ti,j721e-esm";
     		reg = <0x00 0x420000 0x00 0x1000>;
    -		ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
    +		/* Interrupt sources: rti0, rti1, wrti0 rti2, rti3, rti15 */
    +		ti,esm-pins = <224>, <225>, <227>, <241>, <242>, <248>;
     		bootph-pre-ram;
     	};
     
    --
    2.45.2
    

    Regards,

    Nick

  • Let me know if this works for you! If so, I'll convert it into an FAQ to make it easier for other people to find.

    Regards,

    Nick

  • Hi Nick, 

    Thank you for your reply. It might take 2 to 3 days for me to test above patches. Once I test this, I'll update here.

    Regards,

    Jay

  • Sounds good, thanks Jay!

    -Nick

  • Hi Nick,

    I have did the u-boot and kernel changes as you have mentioned. please find my patches as below.

    u-boot patch:

    From 316e5680e14ccacc257457cfd9048325abe99dbb Mon Sep 17 00:00:00 2001
    From: Jay Kaneria <jay.kaneria@einfochips.com>
    Date: Thu, 8 Aug 2024 18:15:50 +0530
    Subject: [PATCH] added changes for watchdog
    
    ---
     arch/arm/dts/k3-am62a-main.dtsi | 149 ++++++++++++++++++++++++++++++++
     arch/arm/dts/k3-am62a-mcu.dtsi  |  63 ++++++++++++++
     arch/arm/mach-k3/am62a7_init.c  |  29 ++++++-
     configs/am62ax_evm_r5_defconfig |   3 +
     4 files changed, 242 insertions(+), 2 deletions(-)
    
    diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
    index 41aec3a82e..5ddd6e45d1 100644
    --- a/arch/arm/dts/k3-am62a-main.dtsi
    +++ b/arch/arm/dts/k3-am62a-main.dtsi
    @@ -171,6 +171,110 @@
                    pinctrl-single,function-mask = <0xffffffff>;
            };
    
    +       main_esm: esm@420000 {
    +               compatible = "ti,j721e-esm";
    +               reg = <0x0 0x420000 0x0 0x1000>;
    +               /* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
    +               ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
    +               bootph-pre-ram;
    +       };
    +
    +       main_timer0: timer@2400000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2400000 0x00 0x400>;
    +               interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 36 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 36 2>;
    +               assigned-clock-parents = <&k3_clks 36 3>;
    +               power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer1: timer@2410000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2410000 0x00 0x400>;
    +               interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 37 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 37 2>;
    +               assigned-clock-parents = <&k3_clks 37 3>;
    +               power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer2: timer@2420000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2420000 0x00 0x400>;
    +               interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 38 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 38 2>;
    +               assigned-clock-parents = <&k3_clks 38 3>;
    +               power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer3: timer@2430000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2430000 0x00 0x400>;
    +               interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 39 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 39 2>;
    +               assigned-clock-parents = <&k3_clks 39 3>;
    +               power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer4: timer@2440000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2440000 0x00 0x400>;
    +               interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 40 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 40 2>;
    +               assigned-clock-parents = <&k3_clks 40 3>;
    +               power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer5: timer@2450000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2450000 0x00 0x400>;
    +               interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 41 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 41 2>;
    +               assigned-clock-parents = <&k3_clks 41 3>;
    +               power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer6: timer@2460000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2460000 0x00 0x400>;
    +               interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 42 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 42 2>;
    +               assigned-clock-parents = <&k3_clks 42 3>;
    +               power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer7: timer@2470000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2470000 0x00 0x400>;
    +               interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 43 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 43 2>;
    +               assigned-clock-parents = <&k3_clks 43 3>;
    +               power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
            main_uart0: serial@2800000 {
                    compatible = "ti,am64-uart", "ti,am654-uart";
                    reg = <0x00 0x02800000 0x00 0x100>;
    @@ -536,6 +640,51 @@
                    ti,mbox-num-fifos = <16>;
            };
    
    +       main_rti0: watchdog@e000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e000000 0x00 0x100>;
    +               clocks = <&k3_clks 125 0>;
    +               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 125 0>;
    +               assigned-clock-parents = <&k3_clks 125 2>;
    +       };
    +
    +       main_rti1: watchdog@e010000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e010000 0x00 0x100>;
    +               clocks = <&k3_clks 126 0>;
    +               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 126 0>;
    +               assigned-clock-parents = <&k3_clks 126 2>;
    +       };
    +
    +       main_rti2: watchdog@e020000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e020000 0x00 0x100>;
    +               clocks = <&k3_clks 127 0>;
    +               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 127 0>;
    +               assigned-clock-parents = <&k3_clks 127 2>;
    +       };
    +
    +       main_rti3: watchdog@e030000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e030000 0x00 0x100>;
    +               clocks = <&k3_clks 128 0>;
    +               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 128 0>;
    +               assigned-clock-parents = <&k3_clks 128 2>;
    +       };
    +
    +       main_rti4: watchdog@e040000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e040000 0x00 0x100>;
    +               clocks = <&k3_clks 205 0>;
    +               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 205 0>;
    +               assigned-clock-parents = <&k3_clks 205 2>;
    +       };
    +
            c7x_0: dsp@7e000000 {
                    compatible = "ti,am62a-c7xv-dsp";
                    reg = <0x00 0x7e000000 0x00 0x00100000>;
    diff --git a/arch/arm/dts/k3-am62a-mcu.dtsi b/arch/arm/dts/k3-am62a-mcu.dtsi
    index a3d43bfa9c..e4f3d0bff8 100644
    --- a/arch/arm/dts/k3-am62a-mcu.dtsi
    +++ b/arch/arm/dts/k3-am62a-mcu.dtsi
    @@ -27,6 +27,58 @@
                    status = "disabled";
            };
    
    +       mcu_esm: esm@4100000 {
    +               compatible = "ti,j721e-esm";
    +               reg = <0x0 0x4100000 0x0 0x1000>;
    +               ti,esm-pins = <0>, <1>, <2>, <85>;
    +               bootph-pre-ram;
    +       };
    +
    +       /*
    +        * The MCU domain timer interrupts are routed only to the ESM module,
    +        * and not currently available for Linux. The MCU domain timers are
    +        * of limited use without interrupts, and likely reserved by the ESM.
    +        */
    +       mcu_timer0: timer@4800000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x4800000 0x00 0x400>;
    +               clocks = <&k3_clks 35 2>;
    +               clock-names = "fck";
    +               power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +               status = "reserved";
    +       };
    +
    +       mcu_timer1: timer@4810000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x4810000 0x00 0x400>;
    +               clocks = <&k3_clks 48 2>;
    +               clock-names = "fck";
    +               power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +               status = "reserved";
    +       };
    +
    +       mcu_timer2: timer@4820000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x4820000 0x00 0x400>;
    +               clocks = <&k3_clks 49 2>;
    +               clock-names = "fck";
    +               power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +               status = "reserved";
    +       };
    +
    +       mcu_timer3: timer@4830000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x4830000 0x00 0x400>;
    +               clocks = <&k3_clks 50 2>;
    +               clock-names = "fck";
    +               power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +               status = "reserved";
    +       };
    +
            mcu_uart0: serial@4a00000 {
                    compatible = "ti,am64-uart", "ti,am654-uart";
                    reg = <0x00 0x04a00000 0x00 0x100>;
    @@ -49,6 +101,17 @@
                    status = "disabled";
            };
    
    +       mcu_rti0: watchdog@4880000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x04880000 0x00 0x100>;
    +               clocks = <&k3_clks 131 0>;
    +               power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 131 0>;
    +               assigned-clock-parents = <&k3_clks 131 2>;
    +               /* Tightly coupled to M4F */
    +               status = "reserved";
    +       };
    +
            mcu_r5fss0: r5fss@79000000 {
                    compatible = "ti,am62-r5fss";
                    ti,cluster-mode = <0>;
    diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
    index 5a96683c53..2521cf3002 100644
    --- a/arch/arm/mach-k3/am62a7_init.c
    +++ b/arch/arm/mach-k3/am62a7_init.c
    @@ -14,6 +14,9 @@
     #include <dm/uclass-internal.h>
     #include <dm/pinctrl.h>
    
    +#define CTRLMMR_MCU_RST_CTRL             0x04518170
    +#define RST_CTRL_ESM_ERROR_RST_EN_Z_MASK 0xFFFDFFFF
    +
     struct fwl_data cbass_main_fwls[] = {
            { "FSS_DAT_REG3", 7, 8 },
     };
    @@ -69,6 +72,15 @@ static void ctrl_mmr_unlock(void)
            mmr_unlock(PADCFG_MMR1_BASE, 1);
     }
    
    +static __maybe_unused void enable_mcu_esm_reset(void)
    +{
    +       /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z  to '0' (low active) */
    +       u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
    +
    +       stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK;
    +       writel(stat, CTRLMMR_MCU_RST_CTRL);
    +}
    +
     #if (IS_ENABLED(CONFIG_CPU_V7R))
     static void setup_qos(void)
     {
    @@ -172,8 +184,21 @@ void board_init_f(ulong dummy)
            /* Output System Firmware version info */
            k3_sysfw_print_ver();
    
    -       /* Disable ROM configured firewalls right after loading sysfw */
    -       remove_fwl_configs(cbass_main_fwls, ARRAY_SIZE(cbass_main_fwls));
    +       /* Disable ROM configured firewalls right after loading sysfw */
    +       remove_fwl_configs(cbass_main_fwls, ARRAY_SIZE(cbass_main_fwls));
    +       if (IS_ENABLED(CONFIG_ESM_K3)) {
    +               /* Probe/configure ESM0 */
    +               ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
    +               if (ret)
    +                       printf("esm main init failed: %d\n", ret);
    +
    +               /* Probe/configure MCUESM */
    +               ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
    +               if (ret)
    +                       printf("esm mcu init failed: %d\n", ret);
    +
    +               enable_mcu_esm_reset();
    +       }
    
     #if defined(CONFIG_K3_AM62A_DDRSS)
            ret = uclass_get_device(UCLASS_RAM, 0, &dev);
    diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
    index fce48f1915..d2e969678d 100644
    --- a/configs/am62ax_evm_r5_defconfig
    +++ b/configs/am62ax_evm_r5_defconfig
    @@ -17,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x43c00000
     CONFIG_DM_RESET=y
     CONFIG_SPL_MMC=y
     CONFIG_SPL_SERIAL=y
    +CONFIG_SPL_DRIVERS_MISC=y
     CONFIG_SPL_STACK_R_ADDR=0x82000000
     CONFIG_SPL_SYS_MALLOC_F_LEN=0x7145
     CONFIG_SPL_SIZE_LIMIT=0x3A7F0
    @@ -93,6 +94,8 @@ CONFIG_DM_I2C=y
     CONFIG_SYS_I2C_OMAP24XX=y
     CONFIG_DM_MAILBOX=y
     CONFIG_K3_SEC_PROXY=y
    +CONFIG_SPL_MISC=y
    +CONFIG_ESM_K3=y
     CONFIG_MMC_HS200_SUPPORT=y
     CONFIG_SPL_MMC_HS200_SUPPORT=y
     CONFIG_MMC_SDHCI=y
    --
    2.26.2

    kernel patch:

    diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    index 7b654ee246d1..77c9ad34cfd6 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
    @@ -248,6 +248,14 @@ main_pmx0: pinctrl@f4000 {
                    #interrupt-cells = <1>;
            };
    
    +    main_esm: esm@420000 {
    +        compatible = "ti,j721e-esm";
    +        reg = <0x0 0x420000 0x0 0x1000>;
    +        /* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
    +               ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
    +               bootph-pre-ram;
    +       };
    +
            main_timer0: timer@2400000 {
                    compatible = "ti,am654-timer";
                    reg = <0x00 0x2400000 0x00 0x400>;
    @@ -795,6 +803,51 @@ main_mcan0: can@20701000 {
                    status = "disabled";
            };
    
    +       main_rti0: watchdog@e000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e000000 0x00 0x100>;
    +               clocks = <&k3_clks 125 0>;
    +               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 125 0>;
    +               assigned-clock-parents = <&k3_clks 125 2>;
    +       };
    +
    +       main_rti1: watchdog@e010000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e010000 0x00 0x100>;
    +               clocks = <&k3_clks 126 0>;
    +               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 126 0>;
    +               assigned-clock-parents = <&k3_clks 126 2>;
    +       };
    +
    +       main_rti2: watchdog@e020000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e020000 0x00 0x100>;
    +               clocks = <&k3_clks 127 0>;
    +               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 127 0>;
    +               assigned-clock-parents = <&k3_clks 127 2>;
    +       };
    +
    +       main_rti3: watchdog@e030000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e030000 0x00 0x100>;
    +               clocks = <&k3_clks 128 0>;
    +               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 128 0>;
    +               assigned-clock-parents = <&k3_clks 128 2>;
    +       };
    +
    +       main_rti4: watchdog@e040000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e040000 0x00 0x100>;
    +               clocks = <&k3_clks 205 0>;
    +               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 205 0>;
    +               assigned-clock-parents = <&k3_clks 205 2>;
    +       };
    +
            epwm0: pwm@23000000 {
                    compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
                    #pwm-cells = <3>;
    diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
    index 0bc197f52342..187b61a6d594 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
    @@ -26,6 +26,13 @@ mcu_pmx0: pinctrl@4084000 {
                    pinctrl-single,function-mask = <0xffffffff>;
                    status = "disabled";
            };
    +
    +       mcu_esm: esm@4100000 {
    +               compatible = "ti,j721e-esm";
    +               reg = <0x0 0x4100000 0x0 0x1000>;
    +               ti,esm-pins = <0>, <1>, <2>, <85>;
    +               bootph-pre-ram;
    +       };
    
            /*
             * The MCU domain timer interrupts are routed only to the ESM module,
    @@ -170,6 +177,17 @@ mcu_r5fss0_core0: r5f@79000000 {
                    };
            };
    
    +       mcu_rti0: watchdog@4880000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x04880000 0x00 0x100>;
    +               clocks = <&k3_clks 131 0>;
    +               power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 131 0>;
    +               assigned-clock-parents = <&k3_clks 131 2>;
    +               /* Tightly coupled to M4F */
    +               status = "reserved";
    +       };
    +
            mcu_mcan0: can@4e08000 {
                    compatible = "bosch,m_can";
                    reg = <0x00 0x4e08000 0x00 0x200>,
    diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
    index a3a2ab24a9f1..2b1c0178f0c3 100644
    --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
    @@ -91,4 +91,15 @@ wkup_vtm0: temperature-sensor@b00000 {
                    power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
                    #thermal-sensor-cells = <1>;
            };
    +
    +       wkup_rti0: watchdog@2b000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x2b000000 0x00 0x100>;
    +               clocks = <&k3_clks 132 0>;
    +               power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 132 0>;
    +               assigned-clock-parents = <&k3_clks 132 2>;
    +               /* Used by DM firmware */
    +               status = "reserved";
    +       };
     };
    diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c
    index f91a260beaa7..882ea06052e4 100644
    --- a/drivers/watchdog/rti_wdt.c
    +++ b/drivers/watchdog/rti_wdt.c
    @@ -52,6 +52,8 @@
    
     #define DWDST                  BIT(1)
    
    +#define MAX_HW_ERROR            250
    +
     static int heartbeat = DEFAULT_HEARTBEAT;
    
     /*
    @@ -88,7 +90,7 @@ static int rti_wdt_start(struct watchdog_device *wdd)
             * to be 50% or less than that; we obviouly want to configure the open
             * window as large as possible so we select the 50% option.
             */
    -       wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
    +       wdd->min_hw_heartbeat_ms = 520 * wdd->timeout + MAX_HW_ERROR;
    
            /* Generate NMI when wdt expires */
            writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
    @@ -122,31 +124,33 @@ static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
             * be petted during the open window; not too early or not too late.
             * The HW configuration options only allow for the open window size
             * to be 50% or less than that.
    +        * To avoid any glitches, we accommodate 2% + max hardware error
    +        * safety margin.
             */
            switch (wsize) {
            case RTIWWDSIZE_50P:
    -               /* 50% open window => 50% min heartbeat */
    -               wdd->min_hw_heartbeat_ms = 500 * heartbeat;
    +               /* 50% open window => 52% min heartbeat */
    +               wdd->min_hw_heartbeat_ms = 520 * heartbeat + MAX_HW_ERROR;
                    break;
    
            case RTIWWDSIZE_25P:
    -               /* 25% open window => 75% min heartbeat */
    -               wdd->min_hw_heartbeat_ms = 750 * heartbeat;
    +               /* 25% open window => 77% min heartbeat */
    +               wdd->min_hw_heartbeat_ms = 770 * heartbeat + MAX_HW_ERROR ;
                    break;
    
            case RTIWWDSIZE_12P5:
    -               /* 12.5% open window => 87.5% min heartbeat */
    -               wdd->min_hw_heartbeat_ms = 875 * heartbeat;
    +               /* 12.5% open window => 89.5% min heartbeat */
    +               wdd->min_hw_heartbeat_ms = 895 * heartbeat + MAX_HW_ERROR;
                    break;
    
            case RTIWWDSIZE_6P25:
    -               /* 6.5% open window => 93.5% min heartbeat */
    -               wdd->min_hw_heartbeat_ms = 935 * heartbeat;
    +               /* 6.5% open window => 95.5% min heartbeat */
    +               wdd->min_hw_heartbeat_ms = 955 * heartbeat + MAX_HW_ERROR;
                    break;
    
            case RTIWWDSIZE_3P125:
    -               /* 3.125% open window => 96.9% min heartbeat */
    -               wdd->min_hw_heartbeat_ms = 969 * heartbeat;
    +               /* 3.125% open window => 98.9% min heartbeat */
    +               wdd->min_hw_heartbeat_ms = 989 * heartbeat + MAX_HW_ERROR;
                    break;
    
            default:
    @@ -219,14 +223,6 @@ static int rti_wdt_probe(struct platform_device *pdev)
                    return -EINVAL;
            }
    
    -       /*
    -        * If watchdog is running at 32k clock, it is not accurate.
    -        * Adjust frequency down in this case so that we don't pet
    -        * the watchdog too often.
    -        */
    -       if (wdt->freq < 32768)
    -               wdt->freq = wdt->freq * 9 / 10;
    -
            devm_pm_runtime_enable(dev);
            pm_runtime_get_noresume(dev);

    I have did above changes and did testing on /dev/watchdog0 device. below is the watchdog down counter and status register value after start watchdog

    root@am62axx-evm:~# echo  '\0' > /dev/watchdog0
    [   43.944420] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [   43.945448] watchdog: watchdog0: watchdog did not stop!
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# ^C
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffffbcec2000.
    Read at address  0x0E000098 (0xffffbcec2098): 0x00000000
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffba7e1000.
    Read at address  0x0E0000A0 (0xffffba7e10a0): 0x00165A89
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff93f17000.
    Read at address  0x0E0000A0 (0xffff93f170a0): 0x0015A038
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb0016000.
    Read at address  0x0E0000A0 (0xffffb00160a0): 0x00148BB9
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff8a1fd000.
    Read at address  0x0E0000A0 (0xffff8a1fd0a0): 0x0013C482
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffaed1b000.
    Read at address  0x0E0000A0 (0xffffaed1b0a0): 0x0012694C
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffac99c000.
    Read at address  0x0E0000A0 (0xffffac99c0a0): 0x00116C35
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff9d39d000.
    Read at address  0x0E0000A0 (0xffff9d39d0a0): 0x00104841
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb8cb4000.
    Read at address  0x0E0000A0 (0xffffb8cb40a0): 0x000F87E1
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff86fba000.
    Read at address  0x0E0000A0 (0xffff86fba0a0): 0x000ED641
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff87d91000.
    Read at address  0x0E0000A0 (0xffff87d910a0): 0x000E0CE9
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff98b84000.
    Read at address  0x0E0000A0 (0xffff98b840a0): 0x000D3F4B
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff815d9000.
    Read at address  0x0E0000A0 (0xffff815d90a0): 0x000C4AC7
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffaf395000.
    Read at address  0x0E0000A0 (0xffffaf3950a0): 0x000B6FDC
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff936f8000.
    Read at address  0x0E0000A0 (0xffff936f80a0): 0x000A8176
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffa71e9000.
    Read at address  0x0E0000A0 (0xffffa71e90a0): 0x0009D6EC
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffaba72000.
    Read at address  0x0E0000A0 (0xffffaba720a0): 0x00092CCD
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffbe0ca000.
    Read at address  0x0E0000A0 (0xffffbe0ca0a0): 0x0008892C
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb5401000.
    Read at address  0x0E0000A0 (0xffffb54010a0): 0x00078341
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff859e6000.
    Read at address  0x0E0000A0 (0xffff859e60a0): 0x0006C58D
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff8aaa4000.
    Read at address  0x0E0000A0 (0xffff8aaa40a0): 0x0005FF00
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffff80cad000.
    Read at address  0x0E000098 (0xffff80cad098): 0x00000000
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff9914a000.
    Read at address  0x0E0000A0 (0xffff9914a0a0): 0x0003EABC
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb208d000.
    Read at address  0x0E0000A0 (0xffffb208d0a0): 0x000314F7
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb84a2000.
    Read at address  0x0E0000A0 (0xffffb84a20a0): 0x0002870E
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff93117000.
    Read at address  0x0E0000A0 (0xffff931170a0): 0x0001DD0C
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff93c0f000.
    Read at address  0x0E0000A0 (0xffff93c0f0a0): 0x00014ADA
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffff8eb0e000.
    Read at address  0x0E0000A0 (0xffff8eb0e0a0): 0x00007F6D
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E0000A0
    /dev/mem opened.
    Memory mapped at address 0xffffb6202000.
    Read at address  0x0E0000A0 (0xffffb62020a0): 0x01FFCFFC
    root@am62axx-evm:~#
    root@am62axx-evm:~#
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffffaefe4000.
    Read at address  0x0E000098 (0xffffaefe4098): 0x00000032

    Once the time expires, status register generates error as you can see in above logs. My EVM didn't reset. 

    Nick, Can you test the same on your side and provide the working patch? We are running low on time. we have release in the next week. So, It will be very helpful if we get working patch.

    Regards,

    Jay

  • Hello Jay,

    Understood on the urgency. I've blocked off my morning on Friday to run tests on my side, and I'll get back to you.

    Regards,

    Nick

  • Hello Jay,

    Able to replicate your test results

    Ok, I am able to replicate your observations on kernel 6.1 (I built with the latest uboot 2023.04, but the version of Linux kernel that is in SDK 9.1). 

    root@am62axx-evm:/opt/edgeai-gst-apps# rmmod rti_wdt
    root@am62axx-evm:/opt/edgeai-gst-apps# modprobe rti_wdt heartbeat=10
    root@am62axx-evm:/opt/edgeai-gst-apps# echo 1 > /dev/watchdog
    [  114.246352] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [  114.253250] watchdog: watchdog0: watchdog did not stop!
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffff9edfd000.
    Read at address  0x0E000098 (0xffff9edfd098): 0x00000000
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffff9d803000.
    Read at address  0x0E000098 (0xffff9d803098): 0x00000032
    

    0x32 = 11_0010

    DWWD = 1 = a time window violation has occurred. The watchdog will generate either a system reset or a non-maskable interrupt to the CPU in this case

    END = 1 = the end-time defined by the windowed watchdog configuration has been violated

    START = 0 = no start-time window violation has occurred

    KEYST = 0 = no wrong key or key-sequence written

    DWDST = 1 = DWD timeout period has expired

    AWDST = 0 = AWD pin 0 > 1 threshold not exceeded

    Next steps 

    Since your release is this coming week, I assume we're stuck with SDK 9.1 for now.

    I have not tested personally yet, but our SDK 10.0 documentation says that most of the patches to enable watchdog & ESM are already included in the Linux SDK, (i.e.,  https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/?h=ti-linux-6.6.y-cicd and https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?h=ti-u-boot-2024.04 ), and the only additional patches needed are here:

       For 10.0 SDK, ESM support was introduced for |__PART_FAMILY_NAME__|
       platform, but ESM interrupt sources are incorrect, apply the following
       changes in order for the watchdogs to trigger reset on CPU:
    
    .. ifconfig:: CONFIG_part_variant in ('AM62AX')
    
       For linux kernel:
    
       .. code-block:: diff
    
          diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
          index 49eece9218c3..f9f1f50785e8 100644
          --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
          +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
          @@ -274,7 +274,8 @@ main_pmx0: pinctrl@f4000 {
                  main_esm: esm@420000 {
                          compatible = "ti,j721e-esm";
                          reg = <0x0 0x420000 0x0 0x1000>;
          -               ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
          +               /* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
          +               ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
                          bootph-pre-ram;
                  };
    
       For u-boot:
    
       .. code-block:: diff
    
          diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
          index e5adae8209d..53964307858 100644
          --- a/arch/arm/dts/k3-am62a-main.dtsi
          +++ b/arch/arm/dts/k3-am62a-main.dtsi
          @@ -274,7 +274,8 @@
                  main_esm: esm@420000 {
                          compatible = "ti,j721e-esm";
                          reg = <0x0 0x420000 0x0 0x1000>;
          -               ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
          +               /* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
          +               ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
                          bootph-pre-ram;
                  };

    Which tells me that there is some other prerequisite that changed between SDK 9.1 and SDK 10.0 that we are missing. There are a LOT of changes between those two releases, so I'll have to do some thinking to try to figure out what we are missing... Will get back to you on Monday.

    Regards,

    Nick

  • Hi Nick,

    Thank you for checking the same on your side. 

    Let us know once you have solution. 

    Regards,

    Jay

  • Hello Jay,

    Ok, I looked through different files. I'm assuming it's the ESM configuration that is messing up since the watchdog is behaving the way we would expect. When I walked through the patches with the developer, she said we were applying all the patches she would expect to need.

    File comparison: nothing of note

    uboot: drivers/misc/k3_esm.c
    no differences between 2024.04 and the version of 2023.04 in SDK 9.1.

    uboot: arch/arm/mach-k3/am62a7_init.c
    The only major difference I see between 2024.04 and the latest 2023.04 (NOT the version in SDK 9.1) is 
    72703c7a0d arm: mach-k3: Refactor QoS settings
    which doesn't seem to make any big changes

    uboot: arch/arm/dts/k3-am62a-main.dtsi
    no meaningful differences

    Double-checking the build outputs

    Although now that I am taking another look at the patches, the configs to enable ESM are in the r5f defconfig, and I realize I only rebuilt the A53 side (not the R5F side) while testing yesterday. Rebuilding the R5F code now (i.e., tiboot3-am62ax-hs-fs-evm.bin from <output directory>/r5)
    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2024.04&id=3bef74453f34a28c7e6d9daeb520de2deab54803

    Update: did not make a difference.

    Next steps

    I have not actually verified the SDK 10.0 behavior myself yet. Since that is my assumed "known good" starting point, tomorrow I'll actually run tests on SDK 10.0 to make sure I can see the watchdog working as expected before doing any more work on kernel 6.1 & uboot 2023.04.

    Regards,

    Nick

  • Hello Jay,

    Giving a daily update since I know time is short on your side. Had some trouble finding the right SDK 10.0 build this afternoon, so I'll need to run tests on kernel 6.6 tomorrow.

    Regards,

    Nick

  • Apologies for the continued delays here. Tried to run the SDK 10.0 tests but ran into some issues with my uboot build setup. I think I've figured out the problem, but it's time to sign off for the night.

    Regards,

    Nick

  • Hi Nick,

    Thank you for your reply and support on this case.

    Regards,

    Jay

  • Hello Jay,

    Summary

    Ok, so the first time I tried running watchdog on SDK 10.0 it still did not work, which makes me concerned that we don't actually have a "known good" codebase to work from. I'll try one more time with the latest ti-linux-kernel-6.6.y-cicd and ti-u-boot-2024.04 instead of the SDK, but it is looking like this functionality will not make it into your upcoming software release.

    The rest of my response is mostly to help myself keep track of what I did for when I compare notes with the developer.

    First set of tests:
    used AM64x SDK 10.0 as a basis for building kernel & uboot
    used TI internal build to generate the AM62Ax-specific files for ti-sysfw, ti-dm, optee, BL31
    applied the Linux & uboot patches from my above response, sections
    Apply patches to fix the ESM configuration in uboot 
    and
    Apply patches to fix the ESM configuration in Linux 

    Verification of uboot devicetree file changes:

    ti-processor-sdk-linux-am64xx-evm-10.00.07.04/board-support/ti-u-boot-2024.04+git/out$ dtc -I dtb r5/u-boot.dtb
    ...
                    esm@420000 {
                            compatible = "ti,j721e-esm";
                            reg = <0x00 0x420000 0x00 0x1000>;
                            ti,esm-pins = <0xc0 0xc1 0xc3 0xcc 0xd1 0xd2>;
                            bootph-pre-ram;
                    };
    
    ti-processor-sdk-linux-am64xx-evm-10.00.07.04/board-support/ti-u-boot-2024.04+git/out$ dtc -I dtb a53/u-boot.dtb
    ...
                    esm@420000 {
                            compatible = "ti,j721e-esm";
                            reg = <0x00 0x420000 0x00 0x1000>;
                            ti,esm-pins = <0xc0 0xc1 0xc3 0xcc 0xd1 0xd2>;
                            bootph-pre-ram;
                            phandle = <0x85>;
                    };
    

    Verification of Linux devicetree file changes

    root@am62axx-evm:~# dtc -I dtb /boot/dtb/ti/k3-am62a7-sk.dtb | less
    ...
                    esm@420000 {
                            compatible = "ti,j721e-esm";
                            reg = <0x00 0x420000 0x00 0x1000>;
                            ti,esm-pins = <0xc0 0xc1 0xc3 0xcc 0xd1 0xd2>;
                            bootph-pre-ram;
                            phandle = <0x78>;
                    };
    

    Terminal output 

    root@am62axx-evm:~# uname -a
    Linux am62axx-evm 6.6.32-g6de6e418c80e-dirty #3 SMP PREEMPT Thu Aug 15 18:09:28 CDT 2024 aarch64 GNU/Linux
    root@am62axx-evm:~# rmmod rti_wdt
    root@am62axx-evm:~# modprobe rti_wdt heartbeat=10
    root@am62axx-evm:~# echo 1 > /dev/watchdog
    [   74.155419] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [   74.162311] watchdog: watchdog0: watchdog did not stop!
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffffbb492000.
    Read at address  0x0E000098 (0xffffbb492098): 0x00000000
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffff8e2b0000.
    Read at address  0x0E000098 (0xffff8e2b0098): 0x00000032
    

    ESM Register dump 

    root@am62axx-evm:~# devmem2 0x420008
    /dev/mem opened.
    Memory mapped at address 0xffff9d9ea000.
    Read at address  0x00420008 (0xffff9d9ea008): 0x0000000F
    root@am62axx-evm:~# devmem2 0x420010
    /dev/mem opened.
    Memory mapped at address 0xffffbb936000.
    Read at address  0x00420010 (0xffffbb936010): 0x00000000
    root@am62axx-evm:~# devmem2 0x420014
    /dev/mem opened.
    Memory mapped at address 0xffff8912d000.
    Read at address  0x00420014 (0xffff8912d014): 0x00000000
    root@am62axx-evm:~# devmem2 0x420018
    /dev/mem opened.
    Memory mapped at address 0xffffa9e7e000.
    Read at address  0x00420018 (0xffffa9e7e018): 0x00000000
    root@am62axx-evm:~# devmem2 0x42001C
    /dev/mem opened.
    Memory mapped at address 0xffffa7793000.
    Read at address  0x0042001C (0xffffa779301c): 0x00000000
    root@am62axx-evm:~# devmem2 0x420020
    /dev/mem opened.
    Memory mapped at address 0xffff81593000.
    Read at address  0x00420020 (0xffff81593020): 0xFFFFFFFF
    root@am62axx-evm:~# devmem2 0x420024
    /dev/mem opened.
    Memory mapped at address 0xffffb5153000.
    Read at address  0x00420024 (0xffffb5153024): 0xFFFFFFFF
    root@am62axx-evm:~# devmem2 0x420028
    /dev/mem opened.
    Memory mapped at address 0xffff9c4c8000.
    Read at address  0x00420028 (0xffff9c4c8028): 0x00000000
    root@am62axx-evm:~# devmem2 0x42002C
    /dev/mem opened.
    Memory mapped at address 0xffff98cba000.
    Read at address  0x0042002C (0xffff98cba02c): 0x00000000
    root@am62axx-evm:~# devmem2 0x420040
    /dev/mem opened.
    Memory mapped at address 0xffffbe08a000.
    Read at address  0x00420040 (0xffffbe08a040): 0x00000000
    root@am62axx-evm:~# devmem2 0x420044
    /dev/mem opened.
    Memory mapped at address 0xffffbf2ec000.
    Read at address  0x00420044 (0xffffbf2ec044): 0x00000001
    root@am62axx-evm:~# devmem2 0x420048                                                                                                                  (13 results) [187/7212]
    /dev/mem opened.
    Memory mapped at address 0xffff87df5000.
    Read at address  0x00420048 (0xffff87df5048): 0x00030D40
    root@am62axx-evm:~# devmem2 0x42004C
    /dev/mem opened.
    Memory mapped at address 0xffffacd3c000.
    Read at address  0x0042004C (0xffffacd3c04c): 0x00030D40
    root@am62axx-evm:~# devmem2 0x420050
    /dev/mem opened.
    Memory mapped at address 0xffffbe4cf000.
    Read at address  0x00420050 (0xffffbe4cf050): 0x000186A0
    root@am62axx-evm:~# devmem2 0x420054
    /dev/mem opened.
    Memory mapped at address 0xffff8ff12000.
    Read at address  0x00420054 (0xffff8ff12054): 0x000186A0
    root@am62axx-evm:~# devmem2 0x420058
    /dev/mem opened.
    Memory mapped at address 0xffff9ae72000.
    Read at address  0x00420058 (0xffff9ae72058): 0x000186A0
    root@am62axx-evm:~# devmem2 0x42005C
    /dev/mem opened.
    Memory mapped at address 0xffff84aca000.
    Read at address  0x0042005C (0xffff84aca05c): 0x000186A0
    root@am62axx-evm:~# devmem2 0x420400
    /dev/mem opened.
    Memory mapped at address 0xffff91d43000.
    Read at address  0x00420400 (0xffff91d43400): 0x00060080
    root@am62axx-evm:~# devmem2 0x420420
    /dev/mem opened.
    Memory mapped at address 0xffff81f25000.
    Read at address  0x00420420 (0xffff81f25420): 0x00000000
    root@am62axx-evm:~# devmem2 0x420440
    /dev/mem opened.
    Memory mapped at address 0xffff9d0b3000.
    Read at address  0x00420440 (0xffff9d0b3440): 0x00000000
    root@am62axx-evm:~# devmem2 0x420460
    /dev/mem opened.
    Memory mapped at address 0xffffa7854000.
    Read at address  0x00420460 (0xffffa7854460): 0x00000000
    root@am62axx-evm:~# devmem2 0x420480
    /dev/mem opened.
    Memory mapped at address 0xffffa935f000.
    Read at address  0x00420480 (0xffffa935f480): 0x0000001C
    root@am62axx-evm:~# devmem2 0x4204A0                                                                                                                  (13 results) [143/7212]
    /dev/mem opened.
    Memory mapped at address 0xffffaeda8000.
    Read at address  0x004204A0 (0xffffaeda84a0): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204C0
    /dev/mem opened.
    Memory mapped at address 0xffffa1669000.
    Read at address  0x004204C0 (0xffffa16694c0): 0x00000001
    root@am62axx-evm:~# devmem2 0x420404
    /dev/mem opened.
    Memory mapped at address 0xffff9dcac000.
    Read at address  0x00420404 (0xffff9dcac404): 0x00000000
    root@am62axx-evm:~# devmem2 0x420424
    /dev/mem opened.
    Memory mapped at address 0xffffbbf44000.
    Read at address  0x00420424 (0xffffbbf44424): 0x00000000
    root@am62axx-evm:~# devmem2 0x420444
    /dev/mem opened.
    Memory mapped at address 0xffff8bca4000.
    Read at address  0x00420444 (0xffff8bca4444): 0x00000000
    root@am62axx-evm:~# devmem2 0x420464
    /dev/mem opened.
    Memory mapped at address 0xffff7fffb000.
    Read at address  0x00420464 (0xffff7fffb464): 0x00000000
    root@am62axx-evm:~# devmem2 0x420484
    /dev/mem opened.
    Memory mapped at address 0xffff995bb000.
    Read at address  0x00420484 (0xffff995bb484): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204A4
    /dev/mem opened.
    Memory mapped at address 0xffffbdc69000.
    Read at address  0x004204A4 (0xffffbdc694a4): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204C4
    /dev/mem opened.
    Memory mapped at address 0xffffaf664000.
    Read at address  0x004204C4 (0xffffaf6644c4): 0x00000000
    root@am62axx-evm:~# devmem2 0x420408
    /dev/mem opened.
    Memory mapped at address 0xffff8dfb5000.
    Read at address  0x00420408 (0xffff8dfb5408): 0x00000000
    root@am62axx-evm:~# devmem2 0x420428
    /dev/mem opened.
    Memory mapped at address 0xffff823f8000.
    Read at address  0x00420428 (0xffff823f8428): 0x00000000
    root@am62axx-evm:~# devmem2 0x420448                                                                                                                   (13 results) [99/7212]
    /dev/mem opened.
    Memory mapped at address 0xffffafc02000.
    Read at address  0x00420448 (0xffffafc02448): 0x00000000
    root@am62axx-evm:~# devmem2 0x420468
    /dev/mem opened.
    Memory mapped at address 0xffffbbe8d000.
    Read at address  0x00420468 (0xffffbbe8d468): 0x00000000
    root@am62axx-evm:~# devmem2 0x420488
    /dev/mem opened.
    Memory mapped at address 0xffff84ea5000.
    Read at address  0x00420488 (0xffff84ea5488): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204A8
    /dev/mem opened.
    Memory mapped at address 0xffffaf36c000.
    Read at address  0x004204A8 (0xffffaf36c4a8): 0x0006000F
    root@am62axx-evm:~# devmem2 0x4204C8
    /dev/mem opened.
    Memory mapped at address 0xffffa392f000.
    Read at address  0x004204C8 (0xffffa392f4c8): 0x00000000
    root@am62axx-evm:~# devmem2 0x42040C
    /dev/mem opened.
    Memory mapped at address 0xffffb57b0000.
    Read at address  0x0042040C (0xffffb57b040c): 0x00000000
    root@am62axx-evm:~# devmem2 0x42042C
    /dev/mem opened.
    Memory mapped at address 0xffff8a645000.
    Read at address  0x0042042C (0xffff8a64542c): 0x00000000
    root@am62axx-evm:~# devmem2 0x42044C
    /dev/mem opened.
    Memory mapped at address 0xffffa4916000.
    Read at address  0x0042044C (0xffffa491644c): 0x00000000
    root@am62axx-evm:~# devmem2 0x42046C
    /dev/mem opened.
    Memory mapped at address 0xffff85ec8000.
    Read at address  0x0042046C (0xffff85ec846c): 0x00000000
    root@am62axx-evm:~# devmem2 0x42048C
    /dev/mem opened.
    Memory mapped at address 0xffffb6827000.
    Read at address  0x0042048C (0xffffb682748c): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204AC
    /dev/mem opened.
    Memory mapped at address 0xffff8624d000.
    Read at address  0x004204AC (0xffff8624d4ac): 0x0006000F
    root@am62axx-evm:~# devmem2 0x4204CC
    /dev/mem opened.
    Memory mapped at address 0xffff9057e000.
    Read at address  0x004204CC (0xffff9057e4cc): 0x00000000
    root@am62axx-evm:~# devmem2 0x420410
    /dev/mem opened.
    Memory mapped at address 0xffffaccc6000.
    Read at address  0x00420410 (0xffffaccc6410): 0x00000000
    root@am62axx-evm:~# devmem2 0x420430
    /dev/mem opened.
    Memory mapped at address 0xffff89e1a000.
    Read at address  0x00420430 (0xffff89e1a430): 0x00000000
    root@am62axx-evm:~# devmem2 0x420450
    /dev/mem opened.
    Memory mapped at address 0xffff96e1b000.
    Read at address  0x00420450 (0xffff96e1b450): 0x00000000
    root@am62axx-evm:~# devmem2 0x420470
    /dev/mem opened.
    Memory mapped at address 0xffffa1b20000.
    Read at address  0x00420470 (0xffffa1b20470): 0x00000000
    root@am62axx-evm:~# devmem2 0x420490
    /dev/mem opened.
    Memory mapped at address 0xffff8037b000.
    Read at address  0x00420490 (0xffff8037b490): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204B0
    /dev/mem opened.
    Memory mapped at address 0xffffb58b8000.
    Read at address  0x004204B0 (0xffffb58b84b0): 0x0006000F
    root@am62axx-evm:~# devmem2 0x4204D0
    /dev/mem opened.
    Memory mapped at address 0xffff83853000.
    Read at address  0x004204D0 (0xffff838534d0): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204F0
    /dev/mem opened.
    Memory mapped at address 0xffff95b5d000.
    Read at address  0x004204F0 (0xffff95b5d4f0): 0x00000000
    root@am62axx-evm:~# devmem2 0x420414
    /dev/mem opened.
    Memory mapped at address 0xffff903d2000.
    Read at address  0x00420414 (0xffff903d2414): 0x00000000
    root@am62axx-evm:~# devmem2 0x420434
    /dev/mem opened.
    Memory mapped at address 0xffffb43d7000.
    Read at address  0x00420434 (0xffffb43d7434): 0x00000000
    root@am62axx-evm:~# devmem2 0x420454                                                                                                                   (13 results) [11/7212]
    /dev/mem opened.
    Memory mapped at address 0xffff8caa4000.
    Read at address  0x00420454 (0xffff8caa4454): 0x00000000
    root@am62axx-evm:~# devmem2 0x420474
    /dev/mem opened.
    Memory mapped at address 0xffff895bb000.
    Read at address  0x00420474 (0xffff895bb474): 0x00000000
    root@am62axx-evm:~# devmem2 0x420494
    /dev/mem opened.
    Memory mapped at address 0xffff9a437000.
    Read at address  0x00420494 (0xffff9a437494): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204B4
    /dev/mem opened.
    Memory mapped at address 0xffff907e3000.
    Read at address  0x004204B4 (0xffff907e34b4): 0x0006000F
    root@am62axx-evm:~# devmem2 0x4204D4
    /dev/mem opened.
    Memory mapped at address 0xffffa1a83000.
    Read at address  0x004204D4 (0xffffa1a834d4): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204F4
    /dev/mem opened.
    Memory mapped at address 0xffff9e802000.
    Read at address  0x004204F4 (0xffff9e8024f4): 0x00000000
    root@am62axx-evm:~# devmem2 0x420418
    /dev/mem opened.
    Memory mapped at address 0xffff9c58a000.
    Read at address  0x00420418 (0xffff9c58a418): 0x00000000
    root@am62axx-evm:~# devmem2 0x420438
    /dev/mem opened.
    Memory mapped at address 0xffff83802000.
    Read at address  0x00420438 (0xffff83802438): 0x00000000
    root@am62axx-evm:~# devmem2 0x420458
    /dev/mem opened.
    Memory mapped at address 0xffffb8158000.
    Read at address  0x00420458 (0xffffb8158458): 0x00000000
    root@am62axx-evm:~# devmem2 0x420478
    /dev/mem opened.
    Memory mapped at address 0xffffb733e000.
    Read at address  0x00420478 (0xffffb733e478): 0x00000000
    root@am62axx-evm:~# devmem2 0x420498
    /dev/mem opened.
    Memory mapped at address 0xffffa2e3c000.
    Read at address  0x00420498 (0xffffa2e3c498): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204B8
    /dev/mem opened.
    Memory mapped at address 0xffffb3fa4000.
    Read at address  0x004204B8 (0xffffb3fa44b8): 0x0006000F
    root@am62axx-evm:~# devmem2 0x4204D8
    /dev/mem opened.
    Memory mapped at address 0xffffbac68000.
    Read at address  0x004204D8 (0xffffbac684d8): 0x00000000
    root@am62axx-evm:~# devmem2 0x4204F8
    /dev/mem opened.
    Memory mapped at address 0xffff97735000.
    Read at address  0x004204F8 (0xffff977354f8): 0x00000000
    

    Regards,

    Nick

  • Hello Jay,

    I cannot get AM62Ax watchdog working on SDK 10.0 or SDK 9.1. 

    I apologize, but watchdog just will not be possible on your upcoming software release. I will circle back with the developer to make sure that I'm not missing something in my testing.

    Second set of tests 

    used AM64x SDK 10.0 as a basis for building kernel (was running into some build errors with ti-linux-kernel)
    used the latest ti-u-boot-2024.04 for building uboot

    used TI internal build to generate the AM62Ax-specific files for ti-sysfw, ti-dm, optee, BL31
    applied the Linux & uboot patches from my above response, sections
    Apply patches to fix the ESM configuration in uboot 
    and
    Apply patches to fix the ESM configuration in Linux 

    Terminal output 

    root@am62axx-evm:~# uname -a
    Linux am62axx-evm 6.6.32-g6de6e418c80e-dirty #3 SMP PREEMPT Thu Aug 15 18:09:28 CDT 2024 aarch64 GNU/Linux
    root@am62axx-evm:~# rmmod rti_wdt
    root@am62axx-evm:~# modprobe rti_wdt heartbeat=10
    root@am62axx-evm:~# echo 1 > /dev/watchdog
    [  152.099383] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [  152.106284] watchdog: watchdog0: watchdog did not stop!
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffffbef7b000.
    Read at address  0x0E000098 (0xffffbef7b098): 0x00000000
    root@am62axx-evm:~# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffff91ae0000.
    Read at address  0x0E000098 (0xffff91ae0098): 0x00000032
    

    Regards,

    Nick

  • Hi Nick, 

    Thank you for your reply. Let us know once you have update on this from developer.

    Regards,

    Jay

  • Hello Jay,

    Ok, I spent altogether too much time on this, but I finally figured out the issue with my setup. AM62Ax watchdog is working as expected on SDK 10.0, with the modifications documented here:
    https://software-dl.ti.com/processor-sdk-linux/esd/AM62AX/10_00_00/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Watchdog.html#fixes-for-10-0-sdk

    Test output:

    root@am62axx-evm:/opt/edgeai-gst-apps# rmmod rti_wdt
    root@am62axx-evm:/opt/edgeai-gst-apps# modprobe rti_wdt heartbeat=10
    root@am62axx-evm:/opt/edgeai-gst-apps# echo 1 > /dev/watchdog
    [   49.247844] watchdog: watchdog0: nowayout prevents watchdog being stopped!
    [   49.254747] watchdog: watchdog0: watchdog did not stop!
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0E000098
    /dev/mem opened.
    Memory mapped at address 0xffffa972b000.
    Read at address  0x0E000098 (0xffffa972b098): 0x00000000
    root@am62axx-evm:/opt/edgeai-gst-apps#
    //
    // board rebooted here
    //
    U-Boot SPL 2024.04-dirty (Aug 22 2024 - 18:40:45 -0500)
    SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
    SPL initial stack usage: 13568 bytes
    Trying to boot from MMC2
    Authentication passed
    

    My issue was in building the u-boot outputs. Turns out this documentation:
    https://software-dl.ti.com/processor-sdk-linux/esd/AM62AX/10_00_00/exports/docs/linux/Foundational_Components/U-Boot/UG-General-Info.html

    That says this:

    Copy the below images to the boot partition of an SD card and boot:
    ...
    HS-FS
        tiboot3-am62ax-hs-fs-evm.bin from <output directory>/r5
        tispl.bin, u-boot.img from <output directory>/a53

    should actually tell you to copy the tiboot3-am62ax-hs-fs-evm.bin file, and RENAME it to tiboot3.bin. I was just replacing the tiboot3-am62ax-hs-fs-evm.bin file, which was getting ignored since the system kept booting with the default tiboot3.bin file instead.

    Now that I have my "known good" starting point, I can continue working backwards towards SDK 9.1.

    How are things going on your end? It might be another day or so before I can spend more time on this.

    Regards,

    Nick

  • Hi Nick, 

    Thank you for your reply and findings.

    We are about to release the our first custom board based on AM62Ax processor in first next week. We are using the 9.1.0 SDK. We won't be able to upgrade the SDK right now. It will be good for us if you can share patch for SDK 9.1.0. Let us know once you have update on 9.1.0 SDK, Will test the same.

    Thank you for your support on this thread.

    Regards,

    Jay

  • Hello Jay,

    I've added SDK 9.1 watchdog tests onto my TODO list for tomorrow. Not sure how much time I'll be able to dedicate, but I should at least be able to double-check all the patches I posted above to make sure it wasn't my uboot setup that was the issue.

    Regards,

    Nick

  • Hi Nick,

    Any update on watchdog issue on SDK 9.1?

    Regards,

    Jay

  • Hi Nick, 

    Did you get chance to look in SDK 9.1 for watchdog issue?

    Regards,

    Jay

  • Hello Jay,

    Apologies for the delayed responses here - I have been out sick the past week and a half. I did double-check the SDK 9.1 outputs that I had built previously to make sure that I was actually loading the correct tiboot3.bin file, but it still did not work.

    I won't be able to prioritize additional work on SDK 9.1 watchdog at least for the rest of this week.

    What are things looking like on your side? Given the timeframe, does it still make sense for me to spend much more time on trying to get this working on kernel 6.1? If you are planning to do a later SW release on SDK 10.0, it might be easier to just add watchdog functionality in then.

    Regards,

    Nick

  • Hi Nick, 

    Thank you for your reply. 

    Sorry for delayed reply. We were busy with bring-up of custom board. 

    For us, everything are working fine on 9.1.0 SDK except the watchdog. So, We are not planning to update SDK as it would be time consuming as we have to check all the interfaces on new SDK. It doesn't make sense to update SDK for just watchdog. So, It will be great help if we can make watchdog work on 9.1.0 SDK. Please help us to get watchdog working on 9.1.0 SDK.

    Regards,

    Jay

  • Hi Nick, 

    Any update on watchdog issue in SDK 9.1.0 version?

    Regards,

    Jay

  • Hello Jay,

    I apologize for the lack of responses here. Between upcoming vacations and other customer escalations, I am not likely to have much time to spend looking at this more over the next month.

    If watchdog on kernel 6.1 is mission critical for yall, please ask your TI representative to escalate to my management so we can look at getting the effort reprioritized.

    Regards,

    Nick