Hello Team,
Hello Team,
Hello Nisarg,
Thanks for reaching out to Texas Instruments E2E support forum.
I have taken you inputs and working on it. Please allow some time to revert back.
Regards,
Tushar
Hello Nisarg,
Thanks for your patience.
Please provide API details, etc., to configure the debounce time for MCU-GPIO.
Please refer to section 6.1.2 I/O Debounce Control Registers of the TRM to know the details about configuring the debounce control register.
Please refer to Table 6-1. Debounce Period Values of the TRM to know the debounce period value that can be configured.
Regards,
Tushar
Hello Tushar,
As per your suggestion, we have identified the below APIs to configure and set the debounce time as per the document. Please check the below API flow and let us know if anything is missing. If any corrections are needed in the below details and API details, please let me know.
======================================================================================================
/* MCU_PADCONFIG16 (MCU_GPIO0_16) Physical Address is 0x04084040 (MCU_PADCFG_CTRL0_CFG0_PADCONFIG16) */
readDinDataValue = HW_RD_REG32(0x4084040);
/* Configure MCU_CTRL_MMR_DBOUNCE_CFG1 register in the
* MCU_PADCFG_CTRL0_CFG0_PADCONFIG16 for MCU_GPIO0_16.
* The MCU_CTRL_MMR_DBOUNCE_CFG1 register contains the
* debounce period for pads with PADCONFIGx [13–11] DEBOUNCE_SEL fields set to 1h.*/
configureDebounceRegValue = readDinDataValue | 0x800;
HW_WR_REG32(0x4084040, configureDebounceRegValue);
/*Set the Debounce-Period value in MCU_CTRL_MMR_DBOUNCE_CFG1 (0x04504084) registers for */
/* 2 means debounce period in 2.93 milliseconds */
HW_WR_REG32(0x04504084, 2);
======================================================================================================
We used the physical address to read and write registers using the HW_RD_REG32() and HW_WR_REG32() APIs.
Is it the correct method or not? Please provide confirmation on it.
Thanks,
Nisarg
Hello Nisarg,
Is it the correct method or not? Please provide confirmation on it.
Yes, the above flow seems okay.
You can check the same in memory browser of the CCS window. Are the values getting updated correctly or not?
Regards,
Tushar
Hi Tushar,
We tried below code to configure the debounce of 10-millisecond for the MCU_GPIO0_16 (MCU_PADCONFIG16 with Physical-Address is 0x04084040)
and tried to generated continues input-interrupt on that pin (MCU_GPIO0_16 ) using 1KHz Input Signal (with 50% duty cycle) (Use functional Generator to generate input signal) but observed that ISR not generated for every 10-millisecond but getting ISR after 457-millisecond which is not correct as per the debounce-time settings.
1KHz = 1 millisecond duration
Code Snippet:-
/*Set Debounce-Time for DIN Pin */ uint8_t setDINDebounceTime(uint8_t time) { uint8_t retValue = SUCCESS; uint32_t configureDebounceRegValue = 0; uint32_t readDinDataValue = 0; /* MCU_PADCONFIG16 (MCU_GPIO0_16) Physical Address is 0x04084040 */ readDinDataValue = HW_RD_REG32(DIN_PHY_ADDRESS); /* Configure MCU_CTRL_MMR_DBOUNCE_CFG1 register in the * MCU_PADCFG_CTRL0_CFG0_PADCONFIG16 for MCU_GPIO0_16. * The MCU_CTRL_MMR_DBOUNCE_CFG1 register contains the * debounce period for pads with PADCONFIGx[13-11] DEBOUNCE_SEL fields set to 1h.*/ configureDebounceRegValue = readDinDataValue | 0x800; HW_WR_REG32(DIN_PHY_ADDRESS, configureDebounceRegValue); /*Set Debounce-Period value in MCU_CTRL_MMR_DBOUNCE_CFG1 (0x04504084) registers for */ HW_WR_REG32(MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR, time); /* time means Debounce-Period in mili-second*/ return retValue; }
In ISR, Toggling one TEST-GPIO and captured below test-result using CRO on that TEST-GPIO.
Adding extra prints in above API code, to check below register values before setting debounce-time and after setting debounce-time (10 milliseconds debounce time)
/* MCU_GPIO0_16 (MCU_PADCONFIG16) */
#define DIN_PHY_ADDRESS 0x04084040
/* MCU_CTRL_MMR_DBOUNCE_CFG1 PHY Address */
#define MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR 0x04504084
Thanks
Nisarg
Hello Nisarg,
Thanks for you patience.
I am checking this internally. Please allow some time to revert back.
Regards,
Tushar
Hello Nisarg,
Can you please confirm have you changed the frequency of GPIO?
Can you please also tell at what frequency GPIO is operating?
Regards,
Tushar
Hi Tushar,
We did not change any frequency of GPIO. We checked the debounce with the default setting of GPIOs.
1) How do we set/change the frequency of the GPIO?
2) How do we check the current operating frequency of GPIO?
Please provide frequency configuration details and related API information for the GPIO.
Thanks,
Nisarg
Hello Nisarg,
1) How do we set/change the frequency of the GPIO?
2) How do we check the current operating frequency of GPIO?
Please refer to the Clock tree tool for AM62A device for clock related information and visualization. Please refer Clock Tree.
Please refer below screenshot.
Regards,
Tushar
Hello Tushar,
We checked as per your provided link and we found the below thing for MCU_GPIO0
But our question is: how do we configure/change the MCU_GPIO0 frequency using CCS Tool with the "example.syscfg" file?
We checked MCU_GPIO0 current clock-related information on board using "k3conf" command
Commands:-
k3conf show device | grep "MCU_GPIO"
k3conf dump clock 79
k3conf dump parent_clock 79 0
How do we configure/change the MCU_GPIO0 frequency using CCS Tool with the "example.syscfg" file? Or provide commands/APIs to configure the required frequency for debounce support in MCU_GPIO0???
Thanks,
Nisarg
Hello Nisarg,
Why do you want to change the GPIO clock frequency ?
Is it for Testing purpose or real time Application ?
Regards,
Anil.
Hello Anil,
Please check our below-mentioned old response. We don't want to change the GPIO-Frequency. We want to configure debounce on GPIO. We have tried to set debounce on GPIO, but we are not getting the expected result on debounce. Please check below for the details.
Hi Tushar,
We tried below code to configure the debounce of 10-millisecond for the MCU_GPIO0_16 (MCU_PADCONFIG16 with Physical-Address is 0x04084040)
and tried to generated continues input-interrupt on that pin (MCU_GPIO0_16 ) using 1KHz Input Signal (with 50% duty cycle) (Use functional Generator to generate input signal) but observed that ISR not generated for every 10-millisecond but getting ISR after 457-millisecond which is not correct as per the debounce-time settings.
1KHz = 1 millisecond duration
Code Snippet:-
Fullscreen12345678910111213141516171819202122/*Set Debounce-Time for DIN Pin */uint8_t setDINDebounceTime(uint8_t time){uint8_t retValue = SUCCESS;uint32_t configureDebounceRegValue = 0;uint32_t readDinDataValue = 0;/* MCU_PADCONFIG16 (MCU_GPIO0_16) Physical Address is 0x04084040 */readDinDataValue = HW_RD_REG32(DIN_PHY_ADDRESS);/* Configure MCU_CTRL_MMR_DBOUNCE_CFG1 register in the* MCU_PADCFG_CTRL0_CFG0_PADCONFIG16 for MCU_GPIO0_16.* The MCU_CTRL_MMR_DBOUNCE_CFG1 register contains the* debounce period for pads with PADCONFIGx[13-11] DEBOUNCE_SEL fields set to 1h.*/configureDebounceRegValue = readDinDataValue | 0x800;HW_WR_REG32(DIN_PHY_ADDRESS, configureDebounceRegValue);/*Set Debounce-Period value in MCU_CTRL_MMR_DBOUNCE_CFG1 (0x04504084) registers for */HW_WR_REG32(MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR, time); /* time means Debounce-Period in mili-second*/XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX/*Set Debounce-Time for DIN Pin */ uint8_t setDINDebounceTime(uint8_t time) { uint8_t retValue = SUCCESS; uint32_t configureDebounceRegValue = 0; uint32_t readDinDataValue = 0; /* MCU_PADCONFIG16 (MCU_GPIO0_16) Physical Address is 0x04084040 */ readDinDataValue = HW_RD_REG32(DIN_PHY_ADDRESS); /* Configure MCU_CTRL_MMR_DBOUNCE_CFG1 register in the * MCU_PADCFG_CTRL0_CFG0_PADCONFIG16 for MCU_GPIO0_16. * The MCU_CTRL_MMR_DBOUNCE_CFG1 register contains the * debounce period for pads with PADCONFIGx[13-11] DEBOUNCE_SEL fields set to 1h.*/ configureDebounceRegValue = readDinDataValue | 0x800; HW_WR_REG32(DIN_PHY_ADDRESS, configureDebounceRegValue); /*Set Debounce-Period value in MCU_CTRL_MMR_DBOUNCE_CFG1 (0x04504084) registers for */ HW_WR_REG32(MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR, time); /* time means Debounce-Period in mili-second*/ return retValue; }In ISR, Toggling one TEST-GPIO and captured below test-result using CRO on that TEST-GPIO.
Adding extra prints in above API code, to check below register values before setting debounce-time and after setting debounce-time (10 milliseconds debounce time)
/* MCU_GPIO0_16 (MCU_PADCONFIG16) */
#define DIN_PHY_ADDRESS 0x04084040/* MCU_CTRL_MMR_DBOUNCE_CFG1 PHY Address */
#define MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR 0x04504084Kindly help us on the above issue why debounce time not working as per the setting values? Please check the above API and details and let us know if we need to add additional settings or not. We are waiting for your response.Thanks
Nisarg
Thanks,
Nisarg
Hello Nisarg,
Can you please tell us how much processing time your interrupt is taking?
Is that also a part of delay (i.e. ~457ms)?
What method are you using to capture the above waveforms?
Are you using GPIO toggle at the starting of the interrupt service routine?
I have been trying to replicate your use case but not being able to see the ~457ms delay.
Instead of using GPIO toggling and capturing waveforms, I am taking timestamp at the very begining of the ISR processing and calculating the time difference from the last time it occurs.
I am writing to GPIO1_26 pin at every 1 second which is connected to MCU_GPIO0_15 and I am not seeing any delay that is taking ~457 ms of time. Are you also counting the ISR processing time here?
Please refer below code.
/* * Copyright (C) 2021-2023 Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include <kernel/dpl/DebugP.h> #include <kernel/dpl/ClockP.h> #include <kernel/dpl/CycleCounterP.h> #include <kernel/dpl/AddrTranslateP.h> #include <kernel/dpl/HwiP.h> #include "ti_drivers_config.h" #include "ti_drivers_open_close.h" #include "ti_board_open_close.h" /* * This example configures a GPIO pin in input mode * and configures it to generate interrupt on rising edge. * The application waits for 5 key presses, prints the * number of times the keys are pressed and exits. */ #define GPIO_DIR_INPUT (1U) #define GPIO_DIR_OUTPUT (0U) uint32_t gGpioBaseAddr1 = GPIO1_26_BASE_ADDR; uint32_t gGpioBaseAddr2 = MCU_GPIO0_16_BASE_ADDR; HwiP_Object gGpioHwiObject; volatile uint32_t gGpioIntrDone = 0; static void GPIO_bankIsrFxn(void *args); extern void Board_gpioInit(void); extern void Board_gpioDeinit(void); void Sciclient_gpioIrqSet(uint16_t src_index, uint16_t dst_host_irq); void Sciclient_gpioIrqRelease(uint16_t src_index, uint16_t dst_host_irq); extern uint32_t Board_getGpioButtonIntrNum(void); #if defined(__C7504__) extern uint32_t Board_getGpioButtonEventId(void); #endif extern char* Board_getGpioButtonSwitchNum(void); #define MCU_GPIO_BASE 0x4201000 void gpio_input_interrupt_main(void *args) { int32_t retVal; uint16_t eventId = HWIP_INVALID_EVENT_ID; uint32_t waitCount = 5; HwiP_Params hwiPrms; Board_gpioInit(); CycleCounterP_reset(); DebugP_log("GPIO Input Interrupt Test Started ...\r\n"); DebugP_log("GPIO Interrupt Configured for Rising Edge ...\r\n"); #if defined(__C7504__) eventId = Board_getGpioButtonEventId(); #endif /* Address translate */ gGpioBaseAddr1 = (uint32_t) AddrTranslateP_getLocalAddr(gGpioBaseAddr1); /* Setup GPIO for interrupt generation */ GPIO_setDirMode(gGpioBaseAddr1, GPIO1_26_PIN, GPIO1_26_DIR); GPIO_setTrigType(gGpioBaseAddr1, GPIO1_26_PIN, GPIO1_26_TRIG_TYPE); /* Address translate */ gGpioBaseAddr2 = (uint32_t) AddrTranslateP_getLocalAddr(gGpioBaseAddr2); /* Setup GPIO for interrupt generation */ GPIO_setDirMode(gGpioBaseAddr2, MCU_GPIO0_16_PIN, MCU_GPIO0_16_DIR); GPIO_setTrigType(gGpioBaseAddr2, MCU_GPIO0_16_PIN, MCU_GPIO0_16_TRIG_TYPE); GPIO_bankIntrEnable(gGpioBaseAddr2, GPIO_GET_BANK_INDEX(MCU_GPIO0_16_PIN)); /* Register pin interrupt */ HwiP_Params_init(&hwiPrms); hwiPrms.intNum = CSLR_MCU_R5FSS0_CORE0_CPU0_INTR_WKUP_MCU_GPIOMUX_INTROUTER0_OUTP_7; hwiPrms.eventId = eventId; hwiPrms.isPulse = 1; hwiPrms.callback = &GPIO_bankIsrFxn; hwiPrms.args = (void *) MCU_GPIO0_16_PIN; retVal = HwiP_construct(&gGpioHwiObject, &hwiPrms); DebugP_assert(retVal == SystemP_SUCCESS ); while(1) { GPIO_pinWriteHigh(gGpioBaseAddr1, GPIO1_26_PIN); ClockP_sleep(1); GPIO_pinWriteLow(gGpioBaseAddr1, GPIO1_26_PIN); ClockP_sleep(1); } /* Unregister interrupt */ GPIO_bankIntrDisable(gGpioBaseAddr2, GPIO_GET_BANK_INDEX(MCU_GPIO0_16_PIN)); GPIO_setTrigType(gGpioBaseAddr2, MCU_GPIO0_16_PIN, GPIO_TRIG_TYPE_NONE); GPIO_clearIntrStatus(gGpioBaseAddr2, MCU_GPIO0_16_PIN); HwiP_destruct(&gGpioHwiObject); DebugP_log("GPIO Input Interrupt Test Passed!!\r\n"); DebugP_log("All tests have passed!!\r\n"); Board_gpioDeinit(); } volatile uint32_t time[1000] = {0}; volatile uint32_t itr = 0; volatile uint32_t prev = 0; static void GPIO_bankIsrFxn(void *args) { uint32_t curr = CycleCounterP_getCount32(); if(itr < 1000 && gGpioIntrDone > 5) /* ignoring first 5 iteration */ { if(prev < curr) { time[itr] = (curr - prev) / 800; } else { time[itr] = ((0xFFFFFFFF - prev) + curr) / 800; } itr++; } uint32_t pinNum = (uint32_t) args; uint32_t bankNum = GPIO_GET_BANK_INDEX(pinNum); uint32_t intrStatus, pinMask = GPIO_GET_BANK_BIT_MASK(pinNum); /* Get and clear bank interrupt status */ intrStatus = GPIO_getBankIntrStatus(gGpioBaseAddr2, bankNum); GPIO_clearBankIntrStatus(gGpioBaseAddr2, bankNum, intrStatus); /* Per pin interrupt handling */ if(intrStatus & pinMask) { gGpioIntrDone++; } prev = CycleCounterP_getCount32(); }
I can see the interrupt is coming at every 1 sec. Can you please try the above method of calculating time at you end also after setting the debounce time and let us know the results.
Regards,
Tushar
What method are you using to capture the above waveforms?
Are you using GPIO toggle at the starting of the interrupt service routine?
Hello Tushar,
void DINTriggerISR(void *args) { /*-TESTING ONLY-*/ if(0 == gGpioDioCounter) { setGpioValue(MCU_GPIO_CAM_TRIGGER_PIN, GPIO_PIN_HIGH); gGpioDioCounter = 1; } else if(1 == gGpioDioCounter) { setGpioValue(MCU_GPIO_CAM_TRIGGER_PIN, GPIO_PIN_LOW); gGpioDioCounter = 0; } }
Hello Nisarg,
I can look at all your queries and provide reply by tomorrow .
Regards,
Anil.
Hello Anil,
Any update on it? We need a solution on it asap. (customer need debounce configuration.)
Please help us on this.
Thanks,
Nisarg
Hello Nisarg,
We are working on this issue.
My understanding is that we are feeding a 25MHz clock to the MCU_GPIO and configuring the value 10 in debounce register.
Typically, GPIO should wait till 10 GPIO input clocks cycles . So, we can wait for 10GPIO clock cycles at 25MHz which is 0.4usec.
Then , approximately GPIO should toggle at 1msec only , but this was not happening.
So, we are getting data from internal team about how to calculate this debounce periods.
My initial suspect is that this issue might be problem with the debounce calculation .
Regards,
Anil.
Hello Anil,
Our requirement is to configure the 0-21 millisecond range of debounce with our current MCU-GPIO Operating clock frequency. Please provide details on how to configure below registers to get above millisecond range of debounce time value
/* MCU_GPIO0_16 (MCU_PADCONFIG16) (MCU_MCAN1_RX) */
#define DIN_PHY_ADDRESS 0x04084040
/* MCU_CTRL_MMR_DBOUNCE_CFG1 PHY Address */
#define MCU_CTRL_MMR_DBOUNCE_CFG1_PHY_ADDR 0x04504084
Thanks,
Nisarg
Hello Nisarg,
You may get a delayed reply to this query since we need to get details from the design team as to how to calculate debounce periods based on which clock it is with the GPIO clock or crystal input.
Once we have got this information, we can tell you whether you can achieve your debounce requirement or not.
Regards,
Anil.
Hello Anil,
Any update on it? We need a solution on it asap. We need to deliver this to the customer asap.
Please help us on this.
Thanks,
Nisarg
Nisarg
below is the delay table based on a 25MHz source.
db_cfg_5:0 | GPIO Case (32.768MHz(1)) |
EQEP Case (25MHz(1)) |
db_cfg_5:0 | GPIO Case (25MHz(1)) |
EQEP Case (250MHz(1)) |
||||||
dec | bin | time | unit | time | unit | dec | bin | time | unit | time | unit |
0 | 000000 | bypass | n/a | byass | n/a | 32 | 100000 | 0.04 | us | 4 | ns |
1 | 000001 | 1.95 | ms | 2.56 | us | 33 | 100001 | 0.08 | us | 8 | ns |
2 | 000010 | 2.93 | ms | 3.84 | us | 34 | 100010 | 0.12 | us | 12 | ns |
3 | 000011 | 3.91 | ms | 5.12 | us | 35 | 100011 | 0.16 | us | 16 | ns |
4 | 000100 | 4.88 | ms | 6.40 | us | 36 | 100100 | 0.20 | us | 20 | ns |
5 | 000101 | 5.86 | ms | 7.68 | us | 37 | 100101 | 0.24 | us | 24 | ns |
6 | 000110 | 6.84 | ms | 8.96 | us | 38 | 100110 | 0.28 | us | 28 | ns |
7 | 000111 | 7.81 | ms | 10.24 | us | 39 | 100111 | 0.32 | us | 32 | ns |
8 | 001000 | 8.79 | ms | 11.52 | us | 40 | 101000 | 0.36 | us | 36 | ns |
9 | 001001 | 9.77 | ms | 12.80 | us | 41 | 101001 | 0.40 | us | 40 | ns |
10 | 001010 | 10.74 | ms | 14.08 | us | 42 | 101010 | 0.44 | us | 44 | ns |
11 | 001011 | 11.72 | ms | 15.36 | us | 43 | 101011 | 0.48 | us | 48 | ns |
12 | 001100 | 12.70 | ms | 16.64 | us | 44 | 101100 | 0.52 | us | 52 | ns |
13 | 001101 | 13.67 | ms | 17.92 | us | 45 | 101101 | 0.56 | us | 56 | ns |
14 | 001110 | 14.65 | ms | 19.20 | us | 46 | 101110 | 0.60 | us | 60 | ns |
15 | 001111 | 15.63 | ms | 20.48 | us | 47 | 101111 | 0.64 | us | 64 | ns |
16 | 010000 | 16.60 | ms | 21.76 | us | 48 | 110000 | 0.68 | us | 68 | ns |
17 | 010001 | 17.58 | ms | 23.04 | us | 49 | 110001 | 0.72 | us | 72 | ns |
18 | 010010 | 18.55 | ms | 24.32 | us | 50 | 110010 | 0.76 | us | 76 | ns |
19 | 010011 | 19.53 | ms | 25.60 | us | 51 | 110011 | 0.80 | us | 80 | ns |
20 | 010100 | 20.51 | ms | 26.88 | us | 52 | 110100 | 0.84 | us | 84 | ns |
21 | 010101 | 21.48 | ms | 28.16 | us | 53 | 110101 | 0.88 | us | 88 | ns |
22 | 010110 | 15.63 | ms | 20.48 | us | 54 | 110110 | 20.48 | us | 2.048 | us |
23 | 010111 | 31.25 | ms | 40.96 | us | 55 | 110111 | 40.96 | us | 4.096 | us |
24 | 011000 | 46.88 | ms | 61.44 | us | 56 | 111000 | 61.44 | us | 6.144 | us |
25 | 011001 | 62.50 | ms | 81.92 | us | 57 | 111001 | 81.92 | us | 8.192 | us |
26 | 011010 | 78.13 | ms | 102.40 | us | 58 | 111010 | 102.40 | us | 10.24 | us |
27 | 011011 | 93.75 | ms | 122.88 | us | 59 | 111011 | 122.88 | us | 12.288 | us |
28 | 011100 | 109.38 | ms | 143.36 | us | 60 | 111100 | 143.36 | us | 14.336 | us |
29 | 011101 | 125.00 | ms | 163.84 | us | 61 | 111101 | 163.84 | us | 16.384 | us |
30 | 011110 | 140.63 | ms | 184.32 | us | 62 | 111110 | 184.32 | us | 18.432 | us |
31 | 011111 | 156.25 | ms | 204.80 | us | 63 | 111111 | 204.80 | us | 20.48 | us |
I'll also have this added to the next revision of the TRM
--Paul
db_cfg_5:0 GPIO Case
(32.768MHz(1))
1) As per your provided information, the millisecond range is not available in the GPIO-Case-25MHz table, correct understanding? Can we achieve a millisecond range (1-21 ms) of debounce delay with a 25 MHz GPIO frequency? Please provide clarification on it.
Correct, the values in the provided table does not provide a debounce period within your required value when using the 25MHz source.
2) As per your table, you have mentioned GPIO Case-32.768MHz is for milliseconds range debounce time, Is it 32.768 MHz or 32.768 KHz ? Please clarify on that point.
The table shows that the you have 20 possible values that meet you requirement when using the 32.768KHz source.
3) Also, how do we achieve the millisecond range using the provided table range for GPIO case frequency ? How do we configure GPIO- frequency 32.768KHz? If we configure GPIO frequency as 32.768KHz then does it impact GPIO high low or GPIO-Interrupt performance on MCU-R5? Let us know if there is any other performance impact in case of lower GPIO frequency configuration.As per our requirement we want to achieve 1ms to 21ms of debounce time.
Program the db_cfg bit filed of the MCU_CTRL_MMR_CFG0_DBOUNCE_CFG(n) register with one of the 20 possible values defined in the table.
You could start with 10.74ms (001010b).
You also need to setup the DEBOUCE_SEL bit field in the appropriate PADCFG registers. The bit field should be programmed to select the your chosen MCU_CTRL_MMR_CFG0_DBOUNCE_CFG register, basically the "n" value.
MCU_CTRL_MMR_CFG0_DBOUNCE_CFG1 = 1
MCU_CTRL_MMR_CFG0_DBOUNCE_CFG2 = 2
etc
A DEBOUCE_SEL value of 0 disables debounce. A value of 7 is reserved. and should not be used.
--Paul
3) Also, how do we achieve the millisecond range using the provided table range for GPIO case frequency ? How do we configure GPIO- frequency 32.768KHz? If we configure GPIO frequency as 32.768KHz then does it impact GPIO high low or GPIO-Interrupt performance on MCU-R5? Let us know if there is any other performance impact in case of lower GPIO frequency configuration.As per our requirement we want to achieve 1ms to 21ms of debounce time.Program the db_cfg bit filed of the MCU_CTRL_MMR_CFG0_DBOUNCE_CFG(n) register with one of the 20 possible values defined in the table.
You could start with 10.74ms (001010b).
You also need to setup the DEBOUCE_SEL bit field in the appropriate PADCFG registers. The bit field should be programmed to select the your chosen MCU_CTRL_MMR_CFG0_DBOUNCE_CFG register, basically the "n" value.
MCU_CTRL_MMR_CFG0_DBOUNCE_CFG1 = 1
MCU_CTRL_MMR_CFG0_DBOUNCE_CFG2 = 2
etc
A DEBOUCE_SEL value of 0 disables debounce. A value of 7 is reserved. and should not be used.
Hello Paul,
1) How do we configure the "32.768KHz" GPIO-Frequency on the "MCU_GPIO0" Domain in MCU-R5? Does it impact on any other GPIO-Domain ? Please provide all the configuration details for the MCU-R5 FW.
2) Can we configure GPIO-Frequency ("32.768KHz") individually on any MCU-GPIOs in MCU-R5 FW?
3) If we configure MCU-GPIO frequency as 32.768KHz, then does it impact MCU-GPIO high/low transition-time or MCU-GPIO-interrupt performance on MCU-R5? Let us know if there is any other performance impact in case of a lower GPIO frequency configuration.
Thanks,
Nisarg
NIsarg
I have asked the SDK team to answer the software aspects of questions 1 & 2
Does it impact on any other GPIO-Domain ?
The debounce will only impact those pins/signals that have the DEBOUCE_SEL bit field programmed in their respective PADCFG register. The datasheet specifies which signals support the debounce function.
3) If we configure MCU-GPIO frequency as 32.768KHz, then does it impact MCU-GPIO high/low transition-time or MCU-GPIO-interrupt performance on MCU-R5? Let us know if there is any other performance impact in case of a lower GPIO frequency configuration.
The input requirements will remain as specified in the device datasheet.
I am checking to see what the latency impact of the debounce circuit will be.
--Paul
Hello Nisarg,
I can provide a reply to change the GPIO frequency to run at 32.768 KHz.
But, I am worrying that if we change the clock rate to 32.768KHz, the CPU may take more cycles to write and read operations since both I (Interface) and F(the Functinal clocks) are the same as compared to GPIO runs at 25MHz.
I really don't get any clue for the your issue above. GPIO runs at 25MHz and the configured GPIO debounce period value is 10, why are you getting an interrupt for 455msec rather than approximately 1msec. As per Paul mentioned above, if GPIO runs at 25MHz clock, we may not get a debounce periods in msec.
I am internally checking with Paul and letting you know the results.
Regards,
Anil.
Let us know if there is any other performance impact in case of a lower GPIO frequency configuration.
“The signal is passed only if inputs have been stable for the programmed filter duration time"
--Paul
Hello Nisarg,
I internally checked with Paul and confirmed that clock selection of GPIO IP and debounce clock selection are not the same.
We can configure them independently .
So, please provide test results at 10Hz, 5Hz, 3.3Hz, 2.5Hz and 2HZ signal to GPIO rather than the 1KHz signal and don't change the debounce period.
As per the above table, you have configured the DEBOUNCE CONFIG VALUE is 10, you can keep as tease and don't change GPIO IP clock selection. configure GPIO interrupt type is both rising edge and falling edge type.
Please share test results for the above Frequency signals .
Based on my analysis with the above inputs, you should get an interrupt at exactly 10Hz, 5Hz, 3.3Hz, 2.5Hz and 2HZ.
Regards,
Anil.
Hello Anil,
Please provide clarity on the below queries.
I internally checked with Paul and confirmed that clock selection of GPIO IP and debounce clock selection are not the same.
Kindly provide more details on above information.
i) What is the clock section of GPIO-IP?
i) What is the debounce clock selection?
iii) How is this clock selection related to 32.768 KHz and 25 MHz GPIO-Case?
iv) What is the difference between 32.768KHz and 25MHz GPIO-Case?
As per the above table, you have configured the DEBOUNCE CONFIG VALUE is 10, you can keep as tease and don't change GPIO IP clock selection. configure GPIO interrupt type is both rising edge and falling edge type.
Does the 10 (DEBOUNCE CONFIG VALUE is 10) value work for the 25MHz GPIO-Case or not? Please provide more details on it.
So, please provide test results at 10Hz, 5Hz, 3.3Hz, 2.5Hz and 2HZ signal to GPIO rather than the 1KHz signal and don't change the debounce period.
For the above input signals, the frequency-to-time table is below. What will be the duty cycle for the below input signal?
10Hz -> 100ms (milliseconds)
5Hz -> 200ms (milliseconds)
3.3Hz -> 303.03 ms (milliseconds)
2.5Hz -> 400ms (milliseconds)
2Hz -> 500ms (milliseconds)
In that case, how does the 10 (DEBOUNCE CONFIG VALUE is 10) value in debounce work for the 10Hz (100 milliseconds) input signal for 25 MHz GPIO-Case? Please provide more information on this.
Our last question is, Did you check debounce configuration value-10 (DEBOUNCE CONFIG VALUE is 10) for the 1KHz (1 milliseconds) input signal for 25MHz GPIO-Case or not?
Thanks,
NIsarg
i) What is the clock section of GPIO-IP?
i) What is the debounce clock selection?
iii) How is this clock selection related to 32.768 KHz and 25 MHz GPIO-Case?
iv) What is the difference between 32.768KHz and 25MHz GPIO-Case?
Hello Nisarg,
As I mentioned above, the GPIO IP clock and debounce clock selection are not the same .
Currently, in MCU+SDK, the GPIO IP runs at 25MHz . You can confirm by calling the SCI client and getting the response.
When SOC writes data or reads data on GPIO registers .GPIO should run at particular frequency.
Please look at the comment below. The GPIO clock frequency can be selected with the following configurations.
Please don't change the GPIO IP clock other than 25MHz and which will affect the GPIO performance since both I and F clocks are same .
Please refer to the Clock tree tool for AM62A device for clock related information and visualization. Please refer Clock Tree.
Please refer below screenshot.
As per Paul's above comments, the debounce configuration values can be configured from 0 to 63 values.
When you configure 0 to 31 values, automatically, SOC selects a 32.76KHz clock for the debounce clock and GPIO still runs at 25MHz.
When you configure 32 to 63 values, automatically, SOC selects selects a 25MHz clock to the debounce clock and GPIO runs at 25MHz.
The debounce clock selection is a black box for the user. Just user can configure values from 0 to 63 based on these values internal SOC debounce module selects the clock selection which is independent of GPIO IP and user can't be configured debounce clock .
Does the 10 (DEBOUNCE CONFIG VALUE is 10) value work for the 25MHz GPIO-Case or not? Please provide more details on it.
When you select 10 , debounce clock selects to 32.768KHz and GPIO still runs at 25MHz and there is no effect on GPIO performance.
For the above input signals, the frequency-to-time table is below. What will be the duty cycle for the below input signal?
Our last question is, Did you check debounce configuration value-10 (DEBOUNCE CONFIG VALUE is 10) for the 1KHz (1 milliseconds) input signal for 25MHz GPIO-Case or not?
Please try the 50% duty signal and share the test results.
Actually, you have configured a 10msec debounce period and given a 1msec signal to the GPIO ..
This is not a valid test case for validating debounce periods.
To test the debounce periods properly , the feeding signal time period should be longer as compared to the debounce period.
As per my analysis, you are getting 455msec time Ton/Toff seems ok.
To confirm my analysis, I asked you to test the above frequencies and share the Test results.
Issue Analysis points :
The 1msec signal is given to GPIO and the debounce period is 10msec.
SOC detects/captures the signal after 10msec..
Let's assume SOC detects first high signal after the 10msec and next 10msec , again SOC detects high signal and not detects low ..
SOC detects the same high signal till 455msec . Due to this Ton period is approximately ~455msec
At some point after 455msec , SOC detects the low signal till 922msec .So, you are getting total 922msec Time period .
This is reason whether my analysis is correct or wrong to confirm that I asked you to change the feeding clock frequency to the above suggested frequencies at 50% duty and share the Test results.
Regards,
Anil.
Hello Nisarg,
We need your input to close this thread.
Please let us know Test Results once done your Testing .
Regards,
Anil.
Hello Anil,
As per your request, we have captured the result for the 10Hz, 5Hz, and 2Hz input signals to GPIO (Interrupt Generation with 50% Duty Cycle) and configured the DEBOUNCE CONFIG VALUE 10 during that testing.
i) Yellow Color Signal is Input Signal (GPIO-Input Interrupt) (1st Waveform in Screenshot)
ii) The neon-pink color signal represents an O/P toggle GPIO signal from ISR (2nd Waveform in screenshot)
1) 10Hz Input-Signal with debounce-decimal value is 10 configured
2) 5Hz input signal with debounce-decimal value is 10 configured
3) 2Hz input signal with debounce-decimal value is 10 configured
Interrupt ISR Logic
void DINTriggerISR(void *args)
{
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
uint32_t statusRegister = 0;
xTaskNotifyIndexedFromISR(TaskP_getHndl(&triggerDINTaskObj),
0,
statusRegister,
eNoAction,
&xHigherPriorityTaskWoken);
#if 1 /*-TESTING ONLY-*/
if (getGpioValue(MCU_GPIO_DIN_PIN))
{
setGpioValue(MCU_GPIO_CAM_TRIGGER_PIN, GPIO_PIN_HIGH);
}
else
{
setGpioValue(MCU_GPIO_CAM_TRIGGER_PIN, GPIO_PIN_LOW);
}
#endif
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
In all the above results, we have observed that we have configured the debounce value 10 (10.74 milliseconds), but we are getting a delay of 14 milliseconds b/w input signal detection to GPIO toggle from ISR. We have configured the interrupt on both rising and falling edges.
Why are we getting 14-millisecond delay b/w two signal when debounce configured 10? Is it expected behavior? Please provide more information on it.
Let's assume SOC detects first high signal after the 10msec and next 10msec , again SOC detects high signal and not detects low ..
SOC detects the same high signal till 455msec . Due to this Ton period is approximately ~455msec
At some point after 455msec , SOC detects the low signal till 922msec .So, you are getting total 922msec Time period
Kindly provide more clarity on which base SoC detects the above 1KHz input signal when the debounce value is configured as 10. How does it detect a 455 millisecond Ton period? Need more information on this.
Thanks,
Nisarg
In all the above results, we have observed that we have configured the debounce value 10 (10.74 milliseconds), but we are getting a delay of 14 milliseconds b/w input signal detection to GPIO toggle from ISR. We have configured the interrupt on both rising and falling edges.
Why are we getting 14-millisecond delay b/w two signal when debounce configured 10? Is it expected behavior? Please provide more information on it.
Hello Nisarg,
Here there are different problems because of the debounce period that does not match with the actual input.
I am not sure about your Test setup, and it seems to include many peripheral/Applications in your Test setup.
If you included many peripherals in your Test setup, there might be a chance the interrupts are disabled during critical sections and once this critical section is done, the interrupts resumes.
Due to this delay, your GPIO interrupt gets delayed, and one more thing is that you are measuring time with the GPIO, hence we need to include GPIO latency time as well.
I recommend removing all applications except your test application and toggle GPIO directly write in to the Registers in NORTOS examples .
Based on the above results, we can confirm, still you have the same results as the above or not.
If you still have the above results, then there is a problem with the debounce table.
Based on the above results, we need to configure the debounce period to be always less than the input frequency.
Kindly provide more clarity on which base SoC detects the above 1KHz input signal when the debounce value is configured as 10. How does it detect a 455 millisecond Ton period? Need more information on this.
Issue Analysis points :
The 1msec signal is given to GPIO and configured the debounce period is 10msec.
SOC detects/captures the signal after 10msec only.
You can see in the above table, SOC detects 0 at 0th msec even though the signal is high because the debounce period is 10msec.
Exactly at 10msec, SOC detects high.
Next, the input signal is change from low to high and high to low for the 10 times in next 10msec.
Exactly at 20msec again, SOC detects the same high signal.
Next, the input signal is change from low to high and high to low for the 10 times in next 10msec.
Exactly after 30msec again, SOC detects the same high signal and so on ...
There are no GPIO transitions occurring in above Test case.
Due to this, the GPIO interrupt is not triggered.
At some point, the GPIO detects low that time you are getting an interrupt and SOC is detecting low signal might be at the 455msec.
The same behavior for low signal as well and finally you are getting 922msec period due to above behavior .
Actually, you have configured a 10msec debounce period and given a 1msec signal to the GPIO .
This is not a valid test case for validating debounce periods.
To test the debounce periods properly, the feeding signal time period should be longer as compared to the debounce period.
Regards,
Anil.
Hello Nisarg,
Here there are different problems because of the debounce period that does not match with the actual input.
I am not sure about your Test setup, and it seems to include many peripheral/Applications in your Test setup.
If you included many peripherals in your Test setup, there might be a chance the interrupts are disabled during critical sections and once this critical section is done, the interrupts resumes.
Due to this delay, your GPIO interrupt gets delayed, and one more thing is that you are measuring time with the GPIO, hence we need to include GPIO latency time as well.
I recommend removing all applications except your test application and toggle GPIO directly write in to the Registers in NORTOS examples .
Based on the above results, we can confirm, still you have the same results as the above or not.
If you still have the above results, then there is a problem with the debounce table.
Hello Anil,
Thanks for these details, but we have checked the same code setup with the no-debounce configuration, and we found no latency b/w input signal detection to GPIO toggle from ISR. (Application running on MCU-R5 FreeRTOS)
1) 10Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
2) 5Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
3) 2Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
Please check the above details and let us know if we still need to change the test setup or not.
Thanks,
Nisarg
Hello Nisarg,
Based on the above results, your set-up is OK, but some deviation is there in between input and output there is 0.5 to 1msec between the 1st wave and 3rd wave.
Can you please do the same testing with the 5 ,15 and 20 debounce values ?
I suspect that the above debounce period seems to be the problem.
So, based on the above Test Results at different debounce values, we will get a clue about this.
Regards,
Anil.
Hi Anil,
During our last testing, we captured the below different debounce time results with 10Hz Input signal.
1) 10Hz input signal with debounce-decimal value is 15 configured (15.63 ms)
2) 10Hz input signal with debounce-decimal value is 21 configured (21.48 ms)
Please check the above different debounce time results with a 10Hz input signal.
Please let us know if you need more details on it. We are waiting for your response.
Thanks,
Nisarg
Hello Nisarg,
Based on the above results, I suspect that there might be problem with the a debounce table.
Your test setup is OK.
One more note that all pins mux modes do not support debounce functionality.
Please look at the latest datasheet for more details about which pins support this functionality.
I can check with Paul internally and will come back.
Regards,
Anil.
Hi Anil,
Thanks for the update.
We are using only those pins that are supporting debounce configuration.
We have captured the above results on the "MCU_GPIO0_16" (SoC Ball: B9)
We are waiting for your response.
Thanks,
Nisarg
Hello Nisarg,
Thanks for the above information.
Currently, I am checking with HW experts on your issue continuously and discussions are going on.
I will update the status. Is it ok to move with the configure less debounce time than actual debounce on the software side ?
For example, you need 10msec to debounce and try to configure the Debounce config value of 7msec, and you will get the debounce value is actual 10msec on the software side.
Meantime, I am also working with HW experts to find the root cause.
Regards,
Anil.
Hello Nisarg,
What is the current status?
How did you implement debounce in your application?
Currently, this issue is taking a long time, and I am also discussing this with the design team.
My suggestion is that if you are stuck at this point, please configure the debounce periods from 1 to 20 ms as per your requirements and check the results.
Then, analyze the error between the output and the actual debounce configuration.
After that, incorporate the error into the software. This testing needs to be confirmed with a more samples, not just one.
Regards,
Anil.
Hello Anil,
What is the current status?
We are waiting from TI regarding how we can achieve exact debounce time, which is configured on MCU.
How did you implement debounce in your application?
Our requirement is to implement hardware debounce time only so we are blocked until information regarding root cause.
Currently, this issue is taking a long time, and I am also discussing this with the design team.
My suggestion is that if you are stuck at this point, please configure the debounce periods from 1 to 20 ms as per your requirements and check the results.
Then, analyze the error between the output and the actual debounce configuration.After that, incorporate the error into the software. This testing needs to be confirmed with a more samples, not just one.
We need to communicate the root cause of this issue with the customer, and then we can take a decision regarding the above-suggested implementation. So please provide the root cause, whether this is a hardware defect or our configuration is incorrect. If this is a hardware defect, then please provide the correct table information, which is supported by the MCU processor currently.
Thanks,
Nisarg
Hello Nisarg,
Thanks for the the above information.
Internally discussed with Hw experts and they confirmed that there is might be problem with the debounce validation Testing.
So, instead of giving frequency signals, we need to send pulse width which a needs to be changed, and please look at Paul comments.
Please try with Paul suggestion and share test results and do the same testing at 10, 15 and 21 debounce configures.
The best way to test that would be to vary the input pulse width and search for the width that is on the edge of passing through the debounce circuit or is blocked by the debounce circuit. They could start with very short pulses that should always be blocked and increase until the see them pass, or start with long pulses and decrease until they are blocked. This is the best way to test the debounce circuit and verify the delay without worrying with latency.
Regards,
Anil.
Hello, Anil,
Thanks for your response !!!
Thanks for the the above information.
Internally discussed with Hw experts and they confirmed that there is might be problem with the debounce validation Testing.
So, instead of giving frequency signals, we need to send pulse width which a needs to be changed, and please look at Paul comments.
Please try with Paul suggestion and share test results and do the same testing at 10, 15 and 21 debounce configures.
Kindly provide more details above points. The frequency signal also contains a definite pulse width of ON and OFF periods based on the duty cycle. Kindly provide more clarity on the above point. We will check/test accordingly and collect the data.
We have already checked input frequency signals with different debounce values and already shared results with you. We are waiting for your response.
Hi Anil,
During our last testing, we captured the below different debounce time results with 10Hz Input signal.
1) 10Hz input signal with debounce-decimal value is 15 configured (15.63 ms)
2) 10Hz input signal with debounce-decimal value is 21 configured (21.48 ms)
Please check the above different debounce time results with a 10Hz input signal.
Please let us know if you need more details on it. We are waiting for your response.
Thanks,
Nisarg
Thanks,
Nisarg
Hello Nisarg,
I routed your query to Hw expert and will get more details about the Test method.
Regards,
Anil.
Nisarg
Kindly provide more details above points
You should be be able to use the same setup as you already have.
1. Configure the debounce value as desired.
2. Apply an input to the GPIO pin that has a pulse width less than the debounce value. You could start with 80% of the debounce setting. The GPIO should not see the the input pulse, no interrupt generated, and no output GPIO transition.
3. gradually increase the pulse width until the output GPIO transitions. This means that the input pulse has successfully passed the debounce filter and has been recognized by the GPIO input. The width of the input pulse should be slightly larger than the debounce setting.
You can try this for select 32KHz and 25MHZ debounce settings.
This was suggested by a different Paul.
--Paul
Hi Paul,
Hello Anil,
Thanks for these details, but we have checked the same code setup with the no-debounce configuration, and we found no latency b/w input signal detection to GPIO toggle from ISR. (Application running on MCU-R5 FreeRTOS)
1) 10Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
2) 5Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
3) 2Hz input signal and no-debounce configuration on GPIO-Input Interrupt PIN.
Please check the above details and let us know if we still need to change the test setup or not.
Thanks,
Hi Anil,
During our last testing, we captured the below different debounce time results with 10Hz Input signal.
1) 10Hz input signal with debounce-decimal value is 15 configured (15.63 ms)
2) 10Hz input signal with debounce-decimal value is 21 configured (21.48 ms)
Please check the above different debounce time results with a 10Hz input signal.
Please let us know if you need more details on it. We are waiting for your response.
Thanks,
Nisarg
We have previously checked input frequency signals with different debounce values and shared results (CRO captured results) with TI-Team in this forum. Please check above old data results. From above results we can see that variation between expected and actual debounce results.
Does above information is not sufficient to identify this issue ? Please let us know if you need more details on it. We are waiting for your response.
We need to communicate the root cause of this issue with the customer. So please provide the root cause, whether this is a hardware defect or our configuration is incorrect. If this is a hardware defect, then please provide the correct table information, which is supported by the MCU processor currently.
Thanks,
Nisarg