Part Number: TDA4VM
Other Parts Discussed in Thread: PROCESSOR-SDK-J721E
Tool/software:
Dear Ti support,
When using the Fls driver from pdk_jacinto_08_06_00_31 delivery we have seen an non wanted behavior.
There is actually two different behaviors. Both are related to reading from the S28HS01GTGZBHM03 that we have on the VCM board.
1) When reading from the flash, starting from an odd address. We realize that the flash is actually reading from the targeted address but with the LSb cleared.
- We could also read this behavior from the datasheet "The LSb of the address always be zero in any Octal DDR transactions with the address input."
This behavior is not handled by the Fls Mcal driver from the PDK.
2) When reading single byte next and all following transactions to the flash give incorrect response.
Here we do not really understand what is going on. Perhaps the single byte read is not completed correctly and all following accesses fail due to this.
We are trying to work around this issue to move forward in our testing but would need to highlight this as a erroneous driver implementation.