Tool/software:
Hi,
I've been trying to do some system optimization on a design I inherited. This is an EtherCAT design that uses distributed clocks, and so there is a periodic 1ms interrupt provided by the PRU (sync0 interrupt) that is instantiated as a HWI. I notice some strange behavior with it though. This design has a number of tasks, and with all the tasks enabled, I see approximately 10us of jitter in this interrupt. Now if I disable most tasks and leave only the essential ones, I see jitter values of ~1-2us. I am confused why having additional tasks adds jitter to a HWI. I thought this interrupt should preempt everything, and regardless of how many tasks there are, it should just be a single context switch from whatever task was running to the ISR right? Am I missing something with how SYS/BIOS works?
Thanks,
Keith