AM6442: DDR4 initialization failure with two-device (2 x 8-bit) DDR configuration of a custom board

JDA

Part Number: AM6442

Tool/software:

Hi TI experts,

I'm having trouble debugging the DDR4 initialization on my AM6442 custom board, which is a whole new design and does not boot up successfully, yet.

Could you provide some guidance to help me to solve this issue? Thanks.

Here are the details for your reference.

- SDK version: ti-processor-sdk-linux-am64xx-evm-09.02.01.09

"read DBI" is DISABLED manually (reference)

- Chip model: AM6442BSEFHAALV 34PL1JLS 709 G1 (HS-FS device, SR2.0)

- DDR4 chip:

ISSI, IS43QR81024A-075VBLI K103
1Gb x 8 bits x 2 devices = 2GB
not support "read DBI" function
datasheet is here: IS43QR81024A-075VBLI.pdf

- DDR4 DTSI

We keep most of the default setting from "DDR Register Configuration Tool in SysConfig," but make only 3 changes to the following parameters.
1. Reference Design: TMDS64GPEVM
2. Data Bus Width (per device): 8
3. Density (per device) (Gb): 8

- Schematic (DDR interface from processor to memory)

over 1 year ago

0 JDA over 1 year ago

Prodigy 74 points

This is the current status. Please for your information.

Kind Regards,

JDA.

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

Have you checked all the timing parameters from the DDR4 datasheet match the values in the tool? The defaults values for the EVM in the tool is for a Micron device. You need to go thru each parameter in case the ISSI datasheet has different values for each timing parameter.

Regards,

James

0 JDA over 1 year ago in reply to JJD

Prodigy 74 points

Hi James，

I have checked all the timing parameters from ISSI DDR4 datasheet as you recommended and changed all the different parameters. But after testing, I still cannot get the DDR4 on my custom board to work properly.

The following are the parameters I configured and the DDR chip model for your reference.

1. DDR4 chip:

ISSI, IS43QR81024A-075VBLI K103
1Gb x 8 bits x 2 devices = 2GB
Page Size = 1KB
not support "read DBI" function
datasheet is here: IS43QR81024A-075VBLI.pdf

2. The timing parameters and other setting are as follows.

	TI Default Online Setting	New Setting via ISSI datasheet	Note
1. General Setting
DDR Memory Type	DDR4	DDR4
Reference Design	TMDS64GPEVM	TMDS64GPEVM
2. DDR4
2.1 Config A) System Configuration
Memory Frequency (MHz)	800	800
Data Bus Width (per device)	16	8
Density (per device) (Gb)	16	8
Chip Selects / Ranks	1	1
Operating Temperature Range	-40C to 85C	-40C to 85C
Read DBI	Enable	Disable	[P29][P274] "read DBI" is DISABLED manually (reference), due to this chip doesn't support it.
LPASR mode	Manual mode, Normal temp	Manual mode, Normal temp
TCR mode	Disabled	Disabled
TCR range	Normal	Normal
2.2 DRAM Timing A) Latency Parameters
CL (nCK)	14	11	[P227] CAS Latency (not shown clearly)
CWL (nCK)	9	9	[P129] CAS Write Latency (not sure 9 or 11?) primary choice = 9, alternative choice = 11
CA Parity Latency	4 clocks	4 clocks	[P29][P73]
2.3 DRAM Timing B) Timing Parameters
tCCD_L (tCK)	4	5	[P254] min = max(5nCK, 6.250ns)
tCCD_L (ns)	5	6.25	[P254] min = max(5nCK, 6.250ns)
tCCD_S (tCK)	4	4	[P255]
tCKE (tCK)	3	3	[P66]
tCKE (ns)	5	5	[P66]
tCKSRE (tCK)	5	5	[P257]
tCKSRE (ns)	10	10	[P257]
tCKSRX (tCK)	5	5	[P257]
tCKSRX (ns)	10	10	[P257]
tDLLK (tCK)	597	597	[P255]
tDQSCK min (ns)	0.16	0.225	[P256] -0.225 ns [reference][JDD] For DQSCKmin, keep the value of .225. This is taken as a negative value.
tDQSCK max (ns)	0.16	0.225	[P256] -0.225 ns [reference][JDD] For DQSCKmin, keep the value of .225. This is taken as a negative value.
tFAW (tCK)	28	20	[P255] page size of this chip is 1KB tFAW_1K, Min=Max(20nCK, 25ns) tFAW_2K, Min=Max(28nCK, 35ns)
tFAW (ns)	30	25	[P255] page size of this chip is 1KB tFAW_1K, Min=Max(20nCK, 25ns) tFAW_2K, Min=Max(28nCK, 35ns)
tMOD (tCK)	24	24	[P255]
tMOD (ns)	15	15	[P255]
tMRD (tCK)	8	8	[P255]
ODTH8 (tCK)	6	6	[P191] not sure 6 or 7? 1 tCK Preamble = 6, 2 tCK Preamble = 7
tPAR_ALERT_PW max (tCK)	192	96	[P258] Min=48, Max = 96 (The max value is inputted here.)
tPW_RESET_L (ns)	200000	200000	[P204]
2.3 DRAM Timing B) Timing Parameters
tRAS (ns)	35	35	not shown for DDR4-1600, use the default
tRCD (ns)	13.75	13.75	not shown for DDR4-1600, use the default
tREFI (ns)	7800	7800	[P101] 1X mode, 8Gb , tREFI1 = 7.8us
tRFC (ns)	350	350	[P101] 1X mode, 8GB, tRFC1(min) = 350 ns
tRP: (ns)	13.75	13.75	not shown for DDR4-1600, use the default
tRRD_L (tCK)	4	4	[P255] page size of this chip is 1KB tRRD_L(1K), Min = Max(4nCK, 6ns) tRRD_L(2K), Min = Max(4nCK, 7.5ns)
tRRD_L (ns)	6.4	6	[P255] page size of this chip is 1KB tRRD_L(1K), Min = Max(4nCK, 6ns) tRRD_L(2K), Min = Max(4nCK, 7.5ns)
tRRD_S (tCK)	4	4	[P255] page size of this chip is 1KB tRRD_S(1K),Min=Max(4nCK,5ns) tRRD_S(2K),Min=Max(4nCK,6ns)
tRRD_S (ns)	5.3	5	[P255] page size of this chip is 1KB tRRD_S(1K),Min=Max(4nCK,5ns) tRRD_S(2K),Min=Max(4nCK,6ns)
tRTP (tCK)	4	4	[P255]
tRTP (ns)	7.5	7.5	[P255]
tWR (ns)	15	15	[P255]
tWR_CRC_DM (tCK)	4	4	[P255]
tWR_CRC_DM (ns)	3.75	3.75	[P255]
tWTR_L (tCK)	4	4	[P255]
tWTR_L (ns)	7.5	7.5	[P255]
tWTR_S (tCK)	2	2	[P255]
tWTR_S (ns)	2.5	2.5	[P255]
tWTR_S_CRC_DM (tCK)	4	4	[P255]
tWTR_S_CRC_DM (ns)	3.75	3.75	[P255]
tXP (tCK)	4	4	[P257]
tXP (ns)	6	6	[P257]
tXPR (tCK)	5	5	[P257]
2.4 IO Control A) Processor / DDR Controller IO Configuration
VREF Control Range DQ/DM	Range 1	Range 1	not sure, yet, use the default
VREF Control % of VDDQ DQ/DM	72.8	72.8	not sure, yet, use the default
Driver Impedance for DQ/DQS/DM	40 Ohm	40 Ohm	not sure, yet, use the default
Driver Impedance for Addr/Ctrl/Clk	40 Ohm	40 Ohm	not sure, yet, use the default
ODT for DQ/DQS/DM	48 Ohm	48 Ohm	not sure, yet, use the default
2.5 IO Control B) DRAM IO Configuration
DQ VREF Range	Range 1	Range 1	not sure, yet, use the default
DQ VREF	72.4	72.4	not sure, yet, use the default
Output Driver Impedance (ODI)	RZQ/7(34ohm)	RZQ/7(34ohm)	not sure, yet, use the default
Nominal ODT (RttNOM)	RZQ/6(40ohm)	RZQ/6(40ohm)	not sure, yet, use the default
Dynamic ODT	Disabled	Disabled	not sure, yet, use the default

After using the new setting, the AM6442 boot process still fails as before.

I am not sure if the DDR4 configuration is correct or not. Or there are still something else we need to check again?

Please provide further guidance or indication, if you may.

Figure 1: The boot log of the new DDR4 configuration (20240608-1420).

Kind Regards,

JDA.

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

Hi JDA,

the changes you made to the configuration look correct.

One thing i noticed on the schematic is that DDR_RESETn should be pulled low thru a resistor (see page 9 of the DDR datasheet). This signal should be low during power ramp, and the pull resistor low will ensure this. I'm not sure if this is the main problem, but please try to correct this on one of your boards.

Check RESET vs CKE on a scope. CKE should go high at least 500ns after RESET goes high. This ensures the initialization starts correctly.

Can you send the .dtsi file that you are using?

Regards,

James

0 JDA over 1 year ago in reply to JJD

Prodigy 74 points

Hi James,

Thanks for reviewing the DDR4 configurations for us.

The .dtsi file which I am using and generated from “TI DDR Register Configuration Tool in SysConfig” service is attached as a .zip file below.

The source code of "k3-am64-evm-ddr4-1600MTs.dtsi" is replaced with the content of this .dtsi file.

Meanwhile, the "k3-am64-ddr.dtsi" and other related .dtsi files are kept as the original without any modification.

(SDK version: ti-processor-sdk-linux-am64xx-evm-09.02.01.09)

PS: We also appreciate for your kind reminder and guidance for "DDR_RESETn" issue. We are trying to fix it now. For any further update or good news, I will let you know.

Kind Regards,

JDA.

[download] k3-am64-ddr-config_disable-readDBI.zip

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

I noticed a few changes that need to be made to the configuration. Since you are using a -075 device, you have to look at the DDR4-2666 speed bin table (pg 227) for some of the parameters.

For 800MHz (1.25ns) only CL=12 is valid, other choices are reserved. There are 2 choices for CWL, i would stay with 9

tRP = 14.25ns

tRCD=14.25ns

Please make these changes and send the .dtsi file again.

Also, can you also try to apply the attached patch? This will add code that will dump the DDR subsystem registers to the console. Please copy that to a file and post here. This will give me some visibility into the training results.

To apply patch, cd to the u-boot directory and run:

git apply 0001-added-regdump-code.patch

The patch include 2 new files, and some minor edits to the DDR driver to call the regdump code

/cfs-file/__key/communityserver-discussions-components-files/791/0001_2D00_added_2D00_regdump_2D00_code.patch

Regards,

James

0 JDA over 1 year ago in reply to JJD

Prodigy 74 points

Hi James,

We've followed your guidance to modify our schematic. Now, the DDR_RESETn is pulled low through a resistor.

After checking the DDR_RESETn vs DDR_CKE signal on a scope, the sequence seems not to be as expected. (page 9,10 of DDR datasheet)

CKE goes to be HIGH firstly. After about 2.5 seconds, DDR_RESETn goes to be HIGH then.

Do you have any idea about the possible reason of this unexpected result? Is it because of the DDR configuration of .dtsi?

PS: The .dtsi file tested here is the previous version without changing CL=12, yet. But we will implement your kind guidance and try to dump the DDRSS registers to the console in the coming 24 hours. Appreciates.
[download] k3-am64-ddr-config_disable-readDBI.zip

(page 10 of DDR datasheet)

(page 9 of DDR datasheet)

Kind Regards,

JDA.

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

Yes, the relationship between CKE and RESET is not correct. But i'm trying to understand the scale you have setup on your scope. RESET should rise to 1.2V, but i only see it go to less than 500mV. CKE is VTT terminated, so its level is ok (although i can't explain the slight glitch before it goes high).

Please double check the rework on RESET signal. And take a wider scope shot, you should see RESET low during power ramp, and then transition to 1.2V once and stay high

Regards,

James

0 JDA over 1 year ago in reply to JJD

Prodigy 74 points

Hi James,

By following your kind advice, the four DDR4 parameters are updated into our .dtsi file, which is attached as below. Meanwhile, the .patch file you provided is merged into our source code. The DDR subsystem registers now are able to be dumped to the console. The console log is also attached as below for your reference. Thanks.

CL = 12
CWL = 9
tRP = 14.25 ns
tRCD = 14.25 ns

PS: There is no hardware modification for above firmware test, yet. But we appreciate your kind reminder of the CKE/RESET issue. We are working on it now.

k3-am64-ddr-config_disable-readDBI_CL-12_v20240614-2247.zip

Fullscreen [20240613-2247] Dump_DDRSS_Registers.log Download

U-Boot SPL 2023.04 (Jun 13 2024 - 22:47:27 +0800)
Resetting on cold boot to workaround ErrataID:i2331
Please resend tiboot3.bin in case of UART/DFU boot
resetting ...

U-Boot SPL 2023.04 (Jun 13 2024 - 22:47:27 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
k3_ddrss_probe(dev=)
k3_ddrss_ofdata_to_priv(dev=)
k3_ddrss memorycontroller@f300000: ddr freq0 not populated, using bypass frequency.
k3_ddrss_power_on(ddrss=)
k3_ddrss memorycontroller@f300000: VTT regulator enabled, volt = 0
k3_lpddr4_probe: PASS
k3_lpddr4_init: PASS
--->>> LPDDR4 Initialization is in progress ... <<<---
k3_lpddr4_start: Post start PASS
Begin DDR Register Dump
0x0f308000 0x10460a01  //DDRSS_CTL_0_DATA
0x0f308004 0x5d1af3c3  //DDRSS_CTL_1_DATA
0x0f308008 0x0171a610  //DDRSS_CTL_2_DATA
0x0f30800c 0x40020a11  //DDRSS_CTL_3_DATA
0x0f308010 0x00052006  //DDRSS_CTL_4_DATA
0x0f308014 0x02050020  //DDRSS_CTL_5_DATA
0x0f308018 0x03070101  //DDRSS_CTL_6_DATA
0x0f30801c 0x000890b8  //DDRSS_CTL_7_DATA
0x0f308020 0x00000000  //DDRSS_CTL_8_DATA
0x0f308024 0x00000000  //DDRSS_CTL_9_DATA
0x0f308028 0x00000000  //DDRSS_CTL_10_DATA
0x0f30802c 0x000890b8  //DDRSS_CTL_11_DATA
0x0f308030 0x00000000  //DDRSS_CTL_12_DATA
0x0f308034 0x00000000  //DDRSS_CTL_13_DATA
0x0f308038 0x00000000  //DDRSS_CTL_14_DATA
0x0f30803c 0x000890b8  //DDRSS_CTL_15_DATA
0x0f308040 0x00000000  //DDRSS_CTL_16_DATA
0x0f308044 0x00000000  //DDRSS_CTL_17_DATA
0x0f308048 0x00000000  //DDRSS_CTL_18_DATA
0x0f30804c 0x01010100  //DDRSS_CTL_19_DATA
0x0f308050 0x01000101  //DDRSS_CTL_20_DATA
0x0f308054 0x01000110  //DDRSS_CTL_21_DATA
0x0f308058 0x02010002  //DDRSS_CTL_22_DATA
0x0f30805c 0x00027100  //DDRSS_CTL_23_DATA
0x0f308060 0x00061a80  //DDRSS_CTL_24_DATA
0x0f308064 0x02550255  //DDRSS_CTL_25_DATA
0x0f308068 0x00000255  //DDRSS_CTL_26_DATA
0x0f30806c 0x00000000  //DDRSS_CTL_27_DATA
0x0f308070 0x00000000  //DDRSS_CTL_28_DATA
0x0f308074 0x00000000  //DDRSS_CTL_29_DATA
0x0f308078 0x00000000  //DDRSS_CTL_30_DATA
0x0f30807c 0x00000000  //DDRSS_CTL_31_DATA
0x0f308080 0x00000000  //DDRSS_CTL_32_DATA
0x0f308084 0x00000000  //DDRSS_CTL_33_DATA
0x0f308088 0x00000000  //DDRSS_CTL_34_DATA
0x0f30808c 0x00000000  //DDRSS_CTL_35_DATA
0x0f308090 0x00000000  //DDRSS_CTL_36_DATA
0x0f308094 0x00000000  //DDRSS_CTL_37_DATA
0x0f308098 0x04000918  //DDRSS_CTL_38_DATA
0x0f30809c 0x1c1c1c1c  //DDRSS_CTL_39_DATA
0x0f3080a0 0x04000918  //DDRSS_CTL_40_DATA
0x0f3080a4 0x1c1c1c1c  //DDRSS_CTL_41_DATA
0x0f3080a8 0x04000918  //DDRSS_CTL_42_DATA
0x0f3080ac 0x1c1c1c1c  //DDRSS_CTL_43_DATA
0x0f3080b0 0x05050404  //DDRSS_CTL_44_DATA
0x0f3080b4 0x00001705  //DDRSS_CTL_45_DATA
0x0f3080b8 0x0602000d  //DDRSS_CTL_46_DATA
0x0f3080bc 0x05001d0b  //DDRSS_CTL_47_DATA
0x0f3080c0 0x00170505  //DDRSS_CTL_48_DATA
0x0f3080c4 0x0602000d  //DDRSS_CTL_49_DATA
0x0f3080c8 0x05001d0b  //DDRSS_CTL_50_DATA
0x0f3080cc 0x00170505  //DDRSS_CTL_51_DATA
0x0f3080d0 0x0602000d  //DDRSS_CTL_52_DATA
0x0f3080d4 0x07001d0b  //DDRSS_CTL_53_DATA
0x0f3080d8 0x00180807  //DDRSS_CTL_54_DATA
0x0f3080dc 0x0400db60  //DDRSS_CTL_55_DATA
0x0f3080e0 0x07070009  //DDRSS_CTL_56_DATA
0x0f3080e4 0x00001808  //DDRSS_CTL_57_DATA
0x0f3080e8 0x0400db60  //DDRSS_CTL_58_DATA
0x0f3080ec 0x07070009  //DDRSS_CTL_59_DATA
0x0f3080f0 0x00001808  //DDRSS_CTL_60_DATA
0x0f3080f4 0x0400db60  //DDRSS_CTL_61_DATA
0x0f3080f8 0x03000009  //DDRSS_CTL_62_DATA
0x0f3080fc 0x0d0d0002  //DDRSS_CTL_63_DATA
0x0f308100 0x0d0d0d0d  //DDRSS_CTL_64_DATA
0x0f308104 0x01010000  //DDRSS_CTL_65_DATA
0x0f308108 0x03191919  //DDRSS_CTL_66_DATA
0x0f30810c 0x0b0b0b0b  //DDRSS_CTL_67_DATA
0x0f308110 0x00000b0b  //DDRSS_CTL_68_DATA
0x0f308114 0x00000101  //DDRSS_CTL_69_DATA
0x0f308118 0x00000000  //DDRSS_CTL_70_DATA
0x0f30811c 0x01000001  //DDRSS_CTL_71_DATA
0x0f308120 0x01180803  //DDRSS_CTL_72_DATA
0x0f308124 0x00001860  //DDRSS_CTL_73_DATA
0x0f308128 0x00000118  //DDRSS_CTL_74_DATA
0x0f30812c 0x00001860  //DDRSS_CTL_75_DATA
0x0f308130 0x00000118  //DDRSS_CTL_76_DATA
0x0f308134 0x00001860  //DDRSS_CTL_77_DATA
0x0f308138 0x00000005  //DDRSS_CTL_78_DATA
0x0f30813c 0x00000000  //DDRSS_CTL_79_DATA
0x0f308140 0x00000000  //DDRSS_CTL_80_DATA
0x0f308144 0x00000000  //DDRSS_CTL_81_DATA
0x0f308148 0x00000000  //DDRSS_CTL_82_DATA
0x0f30814c 0x00000000  //DDRSS_CTL_83_DATA
0x0f308150 0x00000000  //DDRSS_CTL_84_DATA
0x0f308154 0x00000000  //DDRSS_CTL_85_DATA
0x0f308158 0x00000000  //DDRSS_CTL_86_DATA
0x0f30815c 0x00090009  //DDRSS_CTL_87_DATA
0x0f308160 0x00000009  //DDRSS_CTL_88_DATA
0x0f308164 0x00000000  //DDRSS_CTL_89_DATA
0x0f308168 0x00000000  //DDRSS_CTL_90_DATA
0x0f30816c 0x00000000  //DDRSS_CTL_91_DATA
0x0f308170 0x00000000  //DDRSS_CTL_92_DATA
0x0f308174 0x00000000  //DDRSS_CTL_93_DATA
0x0f308178 0x00010001  //DDRSS_CTL_94_DATA
0x0f30817c 0x00025501  //DDRSS_CTL_95_DATA
0x0f308180 0x02550120  //DDRSS_CTL_96_DATA
0x0f308184 0x02550120  //DDRSS_CTL_97_DATA
0x0f308188 0x01200120  //DDRSS_CTL_98_DATA
0x0f30818c 0x01200120  //DDRSS_CTL_99_DATA
0x0f308190 0x00000000  //DDRSS_CTL_100_DATA
0x0f308194 0x00000000  //DDRSS_CTL_101_DATA
0x0f308198 0x00000000  //DDRSS_CTL_102_DATA
0x0f30819c 0x00000000  //DDRSS_CTL_103_DATA
0x0f3081a0 0x00000000  //DDRSS_CTL_104_DATA
0x0f3081a4 0x00000000  //DDRSS_CTL_105_DATA
0x0f3081a8 0x03010000  //DDRSS_CTL_106_DATA
0x0f3081ac 0x00010000  //DDRSS_CTL_107_DATA
0x0f3081b0 0x00000000  //DDRSS_CTL_108_DATA
0x0f3081b4 0x01000000  //DDRSS_CTL_109_DATA
0x0f3081b8 0x80104002  //DDRSS_CTL_110_DATA
0x0f3081bc 0x00040003  //DDRSS_CTL_111_DATA
0x0f3081c0 0x00040005  //DDRSS_CTL_112_DATA
0x0f3081c4 0x00030000  //DDRSS_CTL_113_DATA
0x0f3081c8 0x00050004  //DDRSS_CTL_114_DATA
0x0f3081cc 0x00000004  //DDRSS_CTL_115_DATA
0x0f3081d0 0x00040003  //DDRSS_CTL_116_DATA
0x0f3081d4 0x00040005  //DDRSS_CTL_117_DATA
0x0f3081d8 0x00000000  //DDRSS_CTL_118_DATA
0x0f3081dc 0x00061800  //DDRSS_CTL_119_DATA
0x0f3081e0 0x00061800  //DDRSS_CTL_120_DATA
0x0f3081e4 0x00061800  //DDRSS_CTL_121_DATA
0x0f3081e8 0x00061800  //DDRSS_CTL_122_DATA
0x0f3081ec 0x00061800  //DDRSS_CTL_123_DATA
0x0f3081f0 0x00000000  //DDRSS_CTL_124_DATA
0x0f3081f4 0x0000aaa0  //DDRSS_CTL_125_DATA
0x0f3081f8 0x00061800  //DDRSS_CTL_126_DATA
0x0f3081fc 0x00061800  //DDRSS_CTL_127_DATA
0x0f308200 0x00061800  //DDRSS_CTL_128_DATA
0x0f308204 0x00061800  //DDRSS_CTL_129_DATA
0x0f308208 0x00061800  //DDRSS_CTL_130_DATA
0x0f30820c 0x00000000  //DDRSS_CTL_131_DATA
0x0f308210 0x0000aaa0  //DDRSS_CTL_132_DATA
0x0f308214 0x00061800  //DDRSS_CTL_133_DATA
0x0f308218 0x00061800  //DDRSS_CTL_134_DATA
0x0f30821c 0x00061800  //DDRSS_CTL_135_DATA
0x0f308220 0x00061800  //DDRSS_CTL_136_DATA
0x0f308224 0x00061800  //DDRSS_CTL_137_DATA
0x0f308228 0x00000000  //DDRSS_CTL_138_DATA
0x0f30822c 0x0000aaa0  //DDRSS_CTL_139_DATA
0x0f308230 0x00000000  //DDRSS_CTL_140_DATA
0x0f308234 0x00000000  //DDRSS_CTL_141_DATA
0x0f308238 0x00000000  //DDRSS_CTL_142_DATA
0x0f30823c 0x00000000  //DDRSS_CTL_143_DATA
0x0f308240 0x00000000  //DDRSS_CTL_144_DATA
0x0f308244 0x00000000  //DDRSS_CTL_145_DATA
0x0f308248 0x00000000  //DDRSS_CTL_146_DATA
0x0f30824c 0x00000000  //DDRSS_CTL_147_DATA
0x0f308250 0x00000000  //DDRSS_CTL_148_DATA
0x0f308254 0x00000000  //DDRSS_CTL_149_DATA
0x0f308258 0x00000000  //DDRSS_CTL_150_DATA
0x0f30825c 0x00000000  //DDRSS_CTL_151_DATA
0x0f308260 0x00000000  //DDRSS_CTL_152_DATA
0x0f308264 0x00000000  //DDRSS_CTL_153_DATA
0x0f308268 0x00000000  //DDRSS_CTL_154_DATA
0x0f30826c 0x00000000  //DDRSS_CTL_155_DATA
0x0f308270 0x080c0000  //DDRSS_CTL_156_DATA
0x0f308274 0x080c080c  //DDRSS_CTL_157_DATA
0x0f308278 0x00000000  //DDRSS_CTL_158_DATA
0x0f30827c 0x07010a09  //DDRSS_CTL_159_DATA
0x0f308280 0x000e0a09  //DDRSS_CTL_160_DATA
0x0f308284 0x010a0900  //DDRSS_CTL_161_DATA
0x0f308288 0x0e0a0907  //DDRSS_CTL_162_DATA
0x0f30828c 0x0a090000  //DDRSS_CTL_163_DATA
0x0f308290 0x0a090701  //DDRSS_CTL_164_DATA
0x0f308294 0x0000080e  //DDRSS_CTL_165_DATA
0x0f308298 0x00040003  //DDRSS_CTL_166_DATA
0x0f30829c 0x00004007  //DDRSS_CTL_167_DATA
0x0f3082a0 0x00000000  //DDRSS_CTL_168_DATA
0x0f3082a4 0x00000000  //DDRSS_CTL_169_DATA
0x0f3082a8 0x00000000  //DDRSS_CTL_170_DATA
0x0f3082ac 0x00000000  //DDRSS_CTL_171_DATA
0x0f3082b0 0x00000000  //DDRSS_CTL_172_DATA
0x0f3082b4 0x00000000  //DDRSS_CTL_173_DATA
0x0f3082b8 0x01000000  //DDRSS_CTL_174_DATA
0x0f3082bc 0x00000000  //DDRSS_CTL_175_DATA
0x0f3082c0 0x00001500  //DDRSS_CTL_176_DATA
0x0f3082c4 0x0000100e  //DDRSS_CTL_177_DATA
0x0f3082c8 0x00000000  //DDRSS_CTL_178_DATA
0x0f3082cc 0x00000000  //DDRSS_CTL_179_DATA
0x0f3082d0 0x00000001  //DDRSS_CTL_180_DATA
0x0f3082d4 0x00000002  //DDRSS_CTL_181_DATA
0x0f3082d8 0x00000c00  //DDRSS_CTL_182_DATA
0x0f3082dc 0x00001000  //DDRSS_CTL_183_DATA
0x0f3082e0 0x00000c00  //DDRSS_CTL_184_DATA
0x0f3082e4 0x00001000  //DDRSS_CTL_185_DATA
0x0f3082e8 0x00000c00  //DDRSS_CTL_186_DATA
0x0f3082ec 0x00001000  //DDRSS_CTL_187_DATA
0x0f3082f0 0x00000000  //DDRSS_CTL_188_DATA
0x0f3082f4 0x00000000  //DDRSS_CTL_189_DATA
0x0f3082f8 0x00000000  //DDRSS_CTL_190_DATA
0x0f3082fc 0x00000000  //DDRSS_CTL_191_DATA
0x0f308300 0x00000000  //DDRSS_CTL_192_DATA
0x0f308304 0x00000000  //DDRSS_CTL_193_DATA
0x0f308308 0x00000000  //DDRSS_CTL_194_DATA
0x0f30830c 0x00000000  //DDRSS_CTL_195_DATA
0x0f308310 0x00000000  //DDRSS_CTL_196_DATA
0x0f308314 0x00000000  //DDRSS_CTL_197_DATA
0x0f308318 0x00000000  //DDRSS_CTL_198_DATA
0x0f30831c 0x00000000  //DDRSS_CTL_199_DATA
0x0f308320 0x00000000  //DDRSS_CTL_200_DATA
0x0f308324 0x00000000  //DDRSS_CTL_201_DATA
0x0f308328 0x00000000  //DDRSS_CTL_202_DATA
0x0f30832c 0x00000000  //DDRSS_CTL_203_DATA
0x0f308330 0x00041400  //DDRSS_CTL_204_DATA
0x0f308334 0x00000301  //DDRSS_CTL_205_DATA
0x0f308338 0x00000000  //DDRSS_CTL_206_DATA
0x0f30833c 0x00000414  //DDRSS_CTL_207_DATA
0x0f308340 0x00000301  //DDRSS_CTL_208_DATA
0x0f308344 0x00000000  //DDRSS_CTL_209_DATA
0x0f308348 0x00000414  //DDRSS_CTL_210_DATA
0x0f30834c 0x00000301  //DDRSS_CTL_211_DATA
0x0f308350 0x00000000  //DDRSS_CTL_212_DATA
0x0f308354 0x00000414  //DDRSS_CTL_213_DATA
0x0f308358 0x00000301  //DDRSS_CTL_214_DATA
0x0f30835c 0x00000000  //DDRSS_CTL_215_DATA
0x0f308360 0x00000414  //DDRSS_CTL_216_DATA
0x0f308364 0x00000301  //DDRSS_CTL_217_DATA
0x0f308368 0x00000000  //DDRSS_CTL_218_DATA
0x0f30836c 0x00000414  //DDRSS_CTL_219_DATA
0x0f308370 0x00000301  //DDRSS_CTL_220_DATA
0x0f308374 0x00000000  //DDRSS_CTL_221_DATA
0x0f308378 0x00000000  //DDRSS_CTL_222_DATA
0x0f30837c 0x00000000  //DDRSS_CTL_223_DATA
0x0f308380 0x00000000  //DDRSS_CTL_224_DATA
0x0f308384 0x00000000  //DDRSS_CTL_225_DATA
0x0f308388 0x00000000  //DDRSS_CTL_226_DATA
0x0f30838c 0x00000000  //DDRSS_CTL_227_DATA
0x0f308390 0x00000000  //DDRSS_CTL_228_DATA
0x0f308394 0x00000000  //DDRSS_CTL_229_DATA
0x0f308398 0x00000000  //DDRSS_CTL_230_DATA
0x0f30839c 0x00000000  //DDRSS_CTL_231_DATA
0x0f3083a0 0x00000000  //DDRSS_CTL_232_DATA
0x0f3083a4 0x00000000  //DDRSS_CTL_233_DATA
0x0f3083a8 0x00000000  //DDRSS_CTL_234_DATA
0x0f3083ac 0x00000000  //DDRSS_CTL_235_DATA
0x0f3083b0 0x00000401  //DDRSS_CTL_236_DATA
0x0f3083b4 0x00000401  //DDRSS_CTL_237_DATA
0x0f3083b8 0x00000401  //DDRSS_CTL_238_DATA
0x0f3083bc 0x00000401  //DDRSS_CTL_239_DATA
0x0f3083c0 0x00000401  //DDRSS_CTL_240_DATA
0x0f3083c4 0x00000401  //DDRSS_CTL_241_DATA
0x0f3083c8 0x00000493  //DDRSS_CTL_242_DATA
0x0f3083cc 0x00000493  //DDRSS_CTL_243_DATA
0x0f3083d0 0x00000493  //DDRSS_CTL_244_DATA
0x0f3083d4 0x00000493  //DDRSS_CTL_245_DATA
0x0f3083d8 0x00000493  //DDRSS_CTL_246_DATA
0x0f3083dc 0x00000493  //DDRSS_CTL_247_DATA
0x0f3083e0 0x00000000  //DDRSS_CTL_248_DATA
0x0f3083e4 0x00000000  //DDRSS_CTL_249_DATA
0x0f3083e8 0x00000000  //DDRSS_CTL_250_DATA
0x0f3083ec 0x00000000  //DDRSS_CTL_251_DATA
0x0f3083f0 0x00000000  //DDRSS_CTL_252_DATA
0x0f3083f4 0x00000000  //DDRSS_CTL_253_DATA
0x0f3083f8 0x00000000  //DDRSS_CTL_254_DATA
0x0f3083fc 0x00000000  //DDRSS_CTL_255_DATA
0x0f308400 0x00000000  //DDRSS_CTL_256_DATA
0x0f308404 0x00000000  //DDRSS_CTL_257_DATA
0x0f308408 0x00000000  //DDRSS_CTL_258_DATA
0x0f30840c 0x00000000  //DDRSS_CTL_259_DATA
0x0f308410 0x00000000  //DDRSS_CTL_260_DATA
0x0f308414 0x00000000  //DDRSS_CTL_261_DATA
0x0f308418 0x00000000  //DDRSS_CTL_262_DATA
0x0f30841c 0x00000000  //DDRSS_CTL_263_DATA
0x0f308420 0x00000000  //DDRSS_CTL_264_DATA
0x0f308424 0x00000000  //DDRSS_CTL_265_DATA
0x0f308428 0x00000000  //DDRSS_CTL_266_DATA
0x0f30842c 0x00000000  //DDRSS_CTL_267_DATA
0x0f308430 0x00000000  //DDRSS_CTL_268_DATA
0x0f308434 0x00000000  //DDRSS_CTL_269_DATA
0x0f308438 0x00000000  //DDRSS_CTL_270_DATA
0x0f30843c 0x00000000  //DDRSS_CTL_271_DATA
0x0f308440 0x00000000  //DDRSS_CTL_272_DATA
0x0f308444 0x00000000  //DDRSS_CTL_273_DATA
0x0f308448 0x00000000  //DDRSS_CTL_274_DATA
0x0f30844c 0x00000000  //DDRSS_CTL_275_DATA
0x0f308450 0x00000000  //DDRSS_CTL_276_DATA
0x0f308454 0x00010000  //DDRSS_CTL_277_DATA
0x0f308458 0x00000000  //DDRSS_CTL_278_DATA
0x0f30845c 0x00000100  //DDRSS_CTL_279_DATA
0x0f308460 0x00000000  //DDRSS_CTL_280_DATA
0x0f308464 0x00000101  //DDRSS_CTL_281_DATA
0x0f308468 0x00000000  //DDRSS_CTL_282_DATA
0x0f30846c 0x00000000  //DDRSS_CTL_283_DATA
0x0f308470 0x00000000  //DDRSS_CTL_284_DATA
0x0f308474 0x00000000  //DDRSS_CTL_285_DATA
0x0f308478 0x00000000  //DDRSS_CTL_286_DATA
0x0f30847c 0x00000000  //DDRSS_CTL_287_DATA
0x0f308480 0x00000000  //DDRSS_CTL_288_DATA
0x0f308484 0x00000000  //DDRSS_CTL_289_DATA
0x0f308488 0x0c181511  //DDRSS_CTL_290_DATA
0x0f30848c 0x00000304  //DDRSS_CTL_291_DATA
0x0f308490 0x00000000  //DDRSS_CTL_292_DATA
0x0f308494 0x00000000  //DDRSS_CTL_293_DATA
0x0f308498 0x00000000  //DDRSS_CTL_294_DATA
0x0f30849c 0x00000000  //DDRSS_CTL_295_DATA
0x0f3084a0 0x00000000  //DDRSS_CTL_296_DATA
0x0f3084a4 0x00000000  //DDRSS_CTL_297_DATA
0x0f3084a8 0x00000000  //DDRSS_CTL_298_DATA
0x0f3084ac 0x00000000  //DDRSS_CTL_299_DATA
0x0f3084b0 0x00000000  //DDRSS_CTL_300_DATA
0x0f3084b4 0x00000000  //DDRSS_CTL_301_DATA
0x0f3084b8 0x00000000  //DDRSS_CTL_302_DATA
0x0f3084bc 0x00000000  //DDRSS_CTL_303_DATA
0x0f3084c0 0x00000000  //DDRSS_CTL_304_DATA
0x0f3084c4 0x00040000  //DDRSS_CTL_305_DATA
0x0f3084c8 0x00800200  //DDRSS_CTL_306_DATA
0x0f3084cc 0x00000000  //DDRSS_CTL_307_DATA
0x0f3084d0 0x02000400  //DDRSS_CTL_308_DATA
0x0f3084d4 0x00000080  //DDRSS_CTL_309_DATA
0x0f3084d8 0x00040000  //DDRSS_CTL_310_DATA
0x0f3084dc 0x00800200  //DDRSS_CTL_311_DATA
0x0f3084e0 0x00000000  //DDRSS_CTL_312_DATA
0x0f3084e4 0x00000000  //DDRSS_CTL_313_DATA
0x0f3084e8 0x00000000  //DDRSS_CTL_314_DATA
0x0f3084ec 0x00000100  //DDRSS_CTL_315_DATA
0x0f3084f0 0x00000000  //DDRSS_CTL_316_DATA
0x0f3084f4 0x00000101  //DDRSS_CTL_317_DATA
0x0f3084f8 0x3fff0000  //DDRSS_CTL_318_DATA
0x0f3084fc 0x000fff00  //DDRSS_CTL_319_DATA
0x0f308500 0xffffffff  //DDRSS_CTL_320_DATA
0x0f308504 0x00ffff00  //DDRSS_CTL_321_DATA
0x0f308508 0x0a000000  //DDRSS_CTL_322_DATA
0x0f30850c 0x0001ffff  //DDRSS_CTL_323_DATA
0x0f308510 0x01010101  //DDRSS_CTL_324_DATA
0x0f308514 0x01010101  //DDRSS_CTL_325_DATA
0x0f308518 0x00000118  //DDRSS_CTL_326_DATA
0x0f30851c 0x01000c01  //DDRSS_CTL_327_DATA
0x0f308520 0x00000001  //DDRSS_CTL_328_DATA
0x0f308524 0x00000000  //DDRSS_CTL_329_DATA
0x0f308528 0x00000000  //DDRSS_CTL_330_DATA
0x0f30852c 0x01000000  //DDRSS_CTL_331_DATA
0x0f308530 0x00010000  //DDRSS_CTL_332_DATA
0x0f308534 0x00010004  //DDRSS_CTL_333_DATA
0x0f308538 0x80008400  //DDRSS_CTL_334_DATA
0x0f30853c 0x00000000  //DDRSS_CTL_335_DATA
0x0f308540 0x00000000  //DDRSS_CTL_336_DATA
0x0f308544 0x00000000  //DDRSS_CTL_337_DATA
0x0f308548 0x00000000  //DDRSS_CTL_338_DATA
0x0f30854c 0x00000000  //DDRSS_CTL_339_DATA
0x0f308550 0x00000000  //DDRSS_CTL_340_DATA
0x0f308554 0x00000000  //DDRSS_CTL_341_DATA
0x0f308558 0x00000004  //DDRSS_CTL_342_DATA
0x0f30855c 0x00000400  //DDRSS_CTL_343_DATA
0x0f308560 0x00000000  //DDRSS_CTL_344_DATA
0x0f308564 0x00000000  //DDRSS_CTL_345_DATA
0x0f308568 0x00000000  //DDRSS_CTL_346_DATA
0x0f30856c 0x00000000  //DDRSS_CTL_347_DATA
0x0f308570 0x00000000  //DDRSS_CTL_348_DATA
0x0f308574 0x00000000  //DDRSS_CTL_349_DATA
0x0f308578 0x00000000  //DDRSS_CTL_350_DATA
0x0f30857c 0x00000000  //DDRSS_CTL_351_DATA
0x0f308580 0x00000000  //DDRSS_CTL_352_DATA
0x0f308584 0x00000000  //DDRSS_CTL_353_DATA
0x0f308588 0x00000000  //DDRSS_CTL_354_DATA
0x0f30858c 0x00000000  //DDRSS_CTL_355_DATA
0x0f308590 0x00000000  //DDRSS_CTL_356_DATA
0x0f308594 0x00000000  //DDRSS_CTL_357_DATA
0x0f308598 0x00000000  //DDRSS_CTL_358_DATA
0x0f30859c 0x00000000  //DDRSS_CTL_359_DATA
0x0f3085a0 0x00000000  //DDRSS_CTL_360_DATA
0x0f3085a4 0x00000000  //DDRSS_CTL_361_DATA
0x0f3085a8 0x00000000  //DDRSS_CTL_362_DATA
0x0f3085ac 0x00000000  //DDRSS_CTL_363_DATA
0x0f3085b0 0x00000000  //DDRSS_CTL_364_DATA
0x0f3085b4 0x00000000  //DDRSS_CTL_365_DATA
0x0f3085b8 0x00000000  //DDRSS_CTL_366_DATA
0x0f3085bc 0x00000000  //DDRSS_CTL_367_DATA
0x0f3085c0 0x00000000  //DDRSS_CTL_368_DATA
0x0f3085c4 0x00000000  //DDRSS_CTL_369_DATA
0x0f3085c8 0x0c000000  //DDRSS_CTL_370_DATA
0x0f3085cc 0x060c0606  //DDRSS_CTL_371_DATA
0x0f3085d0 0x06060c06  //DDRSS_CTL_372_DATA
0x0f3085d4 0x00010101  //DDRSS_CTL_373_DATA
0x0f3085d8 0x02000000  //DDRSS_CTL_374_DATA
0x0f3085dc 0x03020101  //DDRSS_CTL_375_DATA
0x0f3085e0 0x00000303  //DDRSS_CTL_376_DATA
0x0f3085e4 0x02020200  //DDRSS_CTL_377_DATA
0x0f3085e8 0x02020202  //DDRSS_CTL_378_DATA
0x0f3085ec 0x02020202  //DDRSS_CTL_379_DATA
0x0f3085f0 0x02020202  //DDRSS_CTL_380_DATA
0x0f3085f4 0x00000000  //DDRSS_CTL_381_DATA
0x0f3085f8 0x00000000  //DDRSS_CTL_382_DATA
0x0f3085fc 0x04000100  //DDRSS_CTL_383_DATA
0x0f308600 0x1e000304  //DDRSS_CTL_384_DATA
0x0f308604 0x000030c0  //DDRSS_CTL_385_DATA
0x0f308608 0x00000200  //DDRSS_CTL_386_DATA
0x0f30860c 0x00000200  //DDRSS_CTL_387_DATA
0x0f308610 0x00000200  //DDRSS_CTL_388_DATA
0x0f308614 0x00000200  //DDRSS_CTL_389_DATA
0x0f308618 0x0000db60  //DDRSS_CTL_390_DATA
0x0f30861c 0x0001e780  //DDRSS_CTL_391_DATA
0x0f308620 0x0a0b0302  //DDRSS_CTL_392_DATA
0x0f308624 0x001e090a  //DDRSS_CTL_393_DATA
0x0f308628 0x000030c0  //DDRSS_CTL_394_DATA
0x0f30862c 0x00000200  //DDRSS_CTL_395_DATA
0x0f308630 0x00000200  //DDRSS_CTL_396_DATA
0x0f308634 0x00000200  //DDRSS_CTL_397_DATA
0x0f308638 0x00000200  //DDRSS_CTL_398_DATA
0x0f30863c 0x0000db60  //DDRSS_CTL_399_DATA
0x0f308640 0x0001e780  //DDRSS_CTL_400_DATA
0x0f308644 0x0a0b0302  //DDRSS_CTL_401_DATA
0x0f308648 0x001e090a  //DDRSS_CTL_402_DATA
0x0f30864c 0x000030c0  //DDRSS_CTL_403_DATA
0x0f308650 0x00000200  //DDRSS_CTL_404_DATA
0x0f308654 0x00000200  //DDRSS_CTL_405_DATA
0x0f308658 0x00000200  //DDRSS_CTL_406_DATA
0x0f30865c 0x00000200  //DDRSS_CTL_407_DATA
0x0f308660 0x0000db60  //DDRSS_CTL_408_DATA
0x0f308664 0x0001e780  //DDRSS_CTL_409_DATA
0x0f308668 0x0a0b0302  //DDRSS_CTL_410_DATA
0x0f30866c 0x0000090a  //DDRSS_CTL_411_DATA
0x0f308670 0x00000000  //DDRSS_CTL_412_DATA
0x0f308674 0x0302000a  //DDRSS_CTL_413_DATA
0x0f308678 0x01000500  //DDRSS_CTL_414_DATA
0x0f30867c 0x01010001  //DDRSS_CTL_415_DATA
0x0f308680 0x00010001  //DDRSS_CTL_416_DATA
0x0f308684 0x01010001  //DDRSS_CTL_417_DATA
0x0f308688 0x02010000  //DDRSS_CTL_418_DATA
0x0f30868c 0x00000200  //DDRSS_CTL_419_DATA
0x0f308690 0x02000201  //DDRSS_CTL_420_DATA
0x0f308694 0x00000000  //DDRSS_CTL_421_DATA
0x0f308698 0x00202020  //DDRSS_CTL_422_DATA
0x0f30a000 0x00000a01  //DDRSS_PI_0_DATA
0x0f30a004 0xae8d79e2  //DDRSS_PI_1_DATA
0x0f30a008 0x0714b570  //DDRSS_PI_2_DATA
0x0f30a00c 0x01011387  //DDRSS_PI_3_DATA
0x0f30a010 0x00000001  //DDRSS_PI_4_DATA
0x0f30a014 0x00010064  //DDRSS_PI_5_DATA
0x0f30a018 0x00000000  //DDRSS_PI_6_DATA
0x0f30a01c 0x00000000  //DDRSS_PI_7_DATA
0x0f30a020 0x00000000  //DDRSS_PI_8_DATA
0x0f30a024 0x00000000  //DDRSS_PI_9_DATA
0x0f30a028 0x00000000  //DDRSS_PI_10_DATA
0x0f30a02c 0x00000000  //DDRSS_PI_11_DATA
0x0f30a030 0x00000000  //DDRSS_PI_12_DATA
0x0f30a034 0x00010001  //DDRSS_PI_13_DATA
0x0f30a038 0x00000000  //DDRSS_PI_14_DATA
0x0f30a03c 0x00010001  //DDRSS_PI_15_DATA
0x0f30a040 0x00000005  //DDRSS_PI_16_DATA
0x0f30a044 0x00010000  //DDRSS_PI_17_DATA
0x0f30a048 0x00000000  //DDRSS_PI_18_DATA
0x0f30a04c 0x00000000  //DDRSS_PI_19_DATA
0x0f30a050 0x00000000  //DDRSS_PI_20_DATA
0x0f30a054 0x00000000  //DDRSS_PI_21_DATA
0x0f30a058 0x00000000  //DDRSS_PI_22_DATA
0x0f30a05c 0x00000000  //DDRSS_PI_23_DATA
0x0f30a060 0x280d0001  //DDRSS_PI_24_DATA
0x0f30a064 0x00000000  //DDRSS_PI_25_DATA
0x0f30a068 0x00010000  //DDRSS_PI_26_DATA
0x0f30a06c 0x00003200  //DDRSS_PI_27_DATA
0x0f30a070 0x00000000  //DDRSS_PI_28_DATA
0x0f30a074 0x00000000  //DDRSS_PI_29_DATA
0x0f30a078 0x00060602  //DDRSS_PI_30_DATA
0x0f30a07c 0x00000000  //DDRSS_PI_31_DATA
0x0f30a080 0x00000000  //DDRSS_PI_32_DATA
0x0f30a084 0x00000000  //DDRSS_PI_33_DATA
0x0f30a088 0x00000001  //DDRSS_PI_34_DATA
0x0f30a08c 0x00000055  //DDRSS_PI_35_DATA
0x0f30a090 0x000000aa  //DDRSS_PI_36_DATA
0x0f30a094 0x000000ad  //DDRSS_PI_37_DATA
0x0f30a098 0x00000052  //DDRSS_PI_38_DATA
0x0f30a09c 0x0000006a  //DDRSS_PI_39_DATA
0x0f30a0a0 0x00000095  //DDRSS_PI_40_DATA
0x0f30a0a4 0x00000095  //DDRSS_PI_41_DATA
0x0f30a0a8 0x000000ad  //DDRSS_PI_42_DATA
0x0f30a0ac 0x00000000  //DDRSS_PI_43_DATA
0x0f30a0b0 0x00000000  //DDRSS_PI_44_DATA
0x0f30a0b4 0x00010100  //DDRSS_PI_45_DATA
0x0f30a0b8 0x00000014  //DDRSS_PI_46_DATA
0x0f30a0bc 0x000007d0  //DDRSS_PI_47_DATA
0x0f30a0c0 0x00000300  //DDRSS_PI_48_DATA
0x0f30a0c4 0x00000000  //DDRSS_PI_49_DATA
0x0f30a0c8 0x00000000  //DDRSS_PI_50_DATA
0x0f30a0cc 0x01000000  //DDRSS_PI_51_DATA
0x0f30a0d0 0x00010101  //DDRSS_PI_52_DATA
0x0f30a0d4 0x0100090a  //DDRSS_PI_53_DATA
0x0f30a0d8 0x00000000  //DDRSS_PI_54_DATA
0x0f30a0dc 0x00010000  //DDRSS_PI_55_DATA
0x0f30a0e0 0x00000000  //DDRSS_PI_56_DATA
0x0f30a0e4 0x00000000  //DDRSS_PI_57_DATA
0x0f30a0e8 0x00000000  //DDRSS_PI_58_DATA
0x0f30a0ec 0x00000000  //DDRSS_PI_59_DATA
0x0f30a0f0 0x00001400  //DDRSS_PI_60_DATA
0x0f30a0f4 0x00000000  //DDRSS_PI_61_DATA
0x0f30a0f8 0x01000000  //DDRSS_PI_62_DATA
0x0f30a0fc 0x00000404  //DDRSS_PI_63_DATA
0x0f30a100 0x00000001  //DDRSS_PI_64_DATA
0x0f30a104 0x0001010e  //DDRSS_PI_65_DATA
0x0f30a108 0x02040100  //DDRSS_PI_66_DATA
0x0f30a10c 0x00010000  //DDRSS_PI_67_DATA
0x0f30a110 0x00000034  //DDRSS_PI_68_DATA
0x0f30a114 0x00000000  //DDRSS_PI_69_DATA
0x0f30a118 0x00000000  //DDRSS_PI_70_DATA
0x0f30a11c 0x00000000  //DDRSS_PI_71_DATA
0x0f30a120 0x00000000  //DDRSS_PI_72_DATA
0x0f30a124 0x00000000  //DDRSS_PI_73_DATA
0x0f30a128 0x00000000  //DDRSS_PI_74_DATA
0x0f30a12c 0x00000005  //DDRSS_PI_75_DATA
0x0f30a130 0x01000000  //DDRSS_PI_76_DATA
0x0f30a134 0x04010000  //DDRSS_PI_77_DATA
0x0f30a138 0x00020000  //DDRSS_PI_78_DATA
0x0f30a13c 0x00010002  //DDRSS_PI_79_DATA
0x0f30a140 0x00000001  //DDRSS_PI_80_DATA
0x0f30a144 0x00020001  //DDRSS_PI_81_DATA
0x0f30a148 0x00020002  //DDRSS_PI_82_DATA
0x0f30a14c 0x29c02002  //DDRSS_PI_83_DATA
0x0f30a150 0x00000000  //DDRSS_PI_84_DATA
0x0f30a154 0x00000000  //DDRSS_PI_85_DATA
0x0f30a158 0x00000000  //DDRSS_PI_86_DATA
0x0f30a15c 0x00000000  //DDRSS_PI_87_DATA
0x0f30a160 0x00000000  //DDRSS_PI_88_DATA
0x0f30a164 0x00000000  //DDRSS_PI_89_DATA
0x0f30a168 0x00000000  //DDRSS_PI_90_DATA
0x0f30a16c 0x00000300  //DDRSS_PI_91_DATA
0x0f30a170 0x0a090b0c  //DDRSS_PI_92_DATA
0x0f30a174 0x04060708  //DDRSS_PI_93_DATA
0x0f30a178 0x01000005  //DDRSS_PI_94_DATA
0x0f30a17c 0x00000800  //DDRSS_PI_95_DATA
0x0f30a180 0x00000000  //DDRSS_PI_96_DATA
0x0f30a184 0x00010008  //DDRSS_PI_97_DATA
0x0f30a188 0x00000000  //DDRSS_PI_98_DATA
0x0f30a18c 0x0000aa00  //DDRSS_PI_99_DATA
0x0f30a190 0x00000000  //DDRSS_PI_100_DATA
0x0f30a194 0x00010000  //DDRSS_PI_101_DATA
0x0f30a198 0x00000000  //DDRSS_PI_102_DATA
0x0f30a19c 0x00000000  //DDRSS_PI_103_DATA
0x0f30a1a0 0x00000000  //DDRSS_PI_104_DATA
0x0f30a1a4 0x00000000  //DDRSS_PI_105_DATA
0x0f30a1a8 0x00000000  //DDRSS_PI_106_DATA
0x0f30a1ac 0x00000000  //DDRSS_PI_107_DATA
0x0f30a1b0 0x00000000  //DDRSS_PI_108_DATA
0x0f30a1b4 0x00000000  //DDRSS_PI_109_DATA
0x0f30a1b8 0x00000000  //DDRSS_PI_110_DATA
0x0f30a1bc 0x00000000  //DDRSS_PI_111_DATA
0x0f30a1c0 0x00000000  //DDRSS_PI_112_DATA
0x0f30a1c4 0x00000000  //DDRSS_PI_113_DATA
0x0f30a1c8 0x00000000  //DDRSS_PI_114_DATA
0x0f30a1cc 0x00000000  //DDRSS_PI_115_DATA
0x0f30a1d0 0x00000000  //DDRSS_PI_116_DATA
0x0f30a1d4 0x00000000  //DDRSS_PI_117_DATA
0x0f30a1d8 0x00000000  //DDRSS_PI_118_DATA
0x0f30a1dc 0x00000000  //DDRSS_PI_119_DATA
0x0f30a1e0 0x00000000  //DDRSS_PI_120_DATA
0x0f30a1e4 0x00000000  //DDRSS_PI_121_DATA
0x0f30a1e8 0x00000000  //DDRSS_PI_122_DATA
0x0f30a1ec 0x00000000  //DDRSS_PI_123_DATA
0x0f30a1f0 0x00000008  //DDRSS_PI_124_DATA
0x0f30a1f4 0x00000000  //DDRSS_PI_125_DATA
0x0f30a1f8 0x00000000  //DDRSS_PI_126_DATA
0x0f30a1fc 0x00000000  //DDRSS_PI_127_DATA
0x0f30a200 0x00000000  //DDRSS_PI_128_DATA
0x0f30a204 0x00000000  //DDRSS_PI_129_DATA
0x0f30a208 0x00000000  //DDRSS_PI_130_DATA
0x0f30a20c 0x00000000  //DDRSS_PI_131_DATA
0x0f30a210 0x00000000  //DDRSS_PI_132_DATA
0x0f30a214 0x00010100  //DDRSS_PI_133_DATA
0x0f30a218 0x00000000  //DDRSS_PI_134_DATA
0x0f30a21c 0x00000000  //DDRSS_PI_135_DATA
0x0f30a220 0x00027100  //DDRSS_PI_136_DATA
0x0f30a224 0x00061a80  //DDRSS_PI_137_DATA
0x0f30a228 0x00000100  //DDRSS_PI_138_DATA
0x0f30a22c 0x00000000  //DDRSS_PI_139_DATA
0x0f30a230 0x00000000  //DDRSS_PI_140_DATA
0x0f30a234 0x00000000  //DDRSS_PI_141_DATA
0x0f30a238 0x00000000  //DDRSS_PI_142_DATA
0x0f30a23c 0x00000000  //DDRSS_PI_143_DATA
0x0f30a240 0x01000000  //DDRSS_PI_144_DATA
0x0f30a244 0xc1010003  //DDRSS_PI_145_DATA
0x0f30a248 0x02000101  //DDRSS_PI_146_DATA
0x0f30a24c 0x01030101  //DDRSS_PI_147_DATA
0x0f30a250 0x00010400  //DDRSS_PI_148_DATA
0x0f30a254 0x06000105  //DDRSS_PI_149_DATA
0x0f30a258 0x01070001  //DDRSS_PI_150_DATA
0x0f30a25c 0x00000000  //DDRSS_PI_151_DATA
0x0f30a260 0x00000000  //DDRSS_PI_152_DATA
0x0f30a264 0x00000001  //DDRSS_PI_153_DATA
0x0f30a268 0x00010000  //DDRSS_PI_154_DATA
0x0f30a26c 0x00000000  //DDRSS_PI_155_DATA
0x0f30a270 0x00000000  //DDRSS_PI_156_DATA
0x0f30a274 0x00000000  //DDRSS_PI_157_DATA
0x0f30a278 0x00000000  //DDRSS_PI_158_DATA
0x0f30a27c 0x00010000  //DDRSS_PI_159_DATA
0x0f30a280 0x00000004  //DDRSS_PI_160_DATA
0x0f30a284 0x00000000  //DDRSS_PI_161_DATA
0x0f30a288 0x00000000  //DDRSS_PI_162_DATA
0x0f30a28c 0x00000000  //DDRSS_PI_163_DATA
0x0f30a290 0x00007800  //DDRSS_PI_164_DATA
0x0f30a294 0x00780078  //DDRSS_PI_165_DATA
0x0f30a298 0x00141414  //DDRSS_PI_166_DATA
0x0f30a29c 0x00000038  //DDRSS_PI_167_DATA
0x0f30a2a0 0x00000038  //DDRSS_PI_168_DATA
0x0f30a2a4 0x00040038  //DDRSS_PI_169_DATA
0x0f30a2a8 0x04000400  //DDRSS_PI_170_DATA
0x0f30a2ac 0x68040009  //DDRSS_PI_171_DATA
0x0f30a2b0 0x04000918  //DDRSS_PI_172_DATA
0x0f30a2b4 0x00091868  //DDRSS_PI_173_DATA
0x0f30a2b8 0x00186804  //DDRSS_PI_174_DATA
0x0f30a2bc 0x00000118  //DDRSS_PI_175_DATA
0x0f30a2c0 0x00001860  //DDRSS_PI_176_DATA
0x0f30a2c4 0x00000118  //DDRSS_PI_177_DATA
0x0f30a2c8 0x00001860  //DDRSS_PI_178_DATA
0x0f30a2cc 0x00000118  //DDRSS_PI_179_DATA
0x0f30a2d0 0x04001860  //DDRSS_PI_180_DATA
0x0f30a2d4 0x01010404  //DDRSS_PI_181_DATA
0x0f30a2d8 0x00001901  //DDRSS_PI_182_DATA
0x0f30a2dc 0x00190019  //DDRSS_PI_183_DATA
0x0f30a2e0 0x010c010c  //DDRSS_PI_184_DATA
0x0f30a2e4 0x0000010c  //DDRSS_PI_185_DATA
0x0f30a2e8 0x00000000  //DDRSS_PI_186_DATA
0x0f30a2ec 0x03000000  //DDRSS_PI_187_DATA
0x0f30a2f0 0x01010303  //DDRSS_PI_188_DATA
0x0f30a2f4 0x01010101  //DDRSS_PI_189_DATA
0x0f30a2f8 0x00181818  //DDRSS_PI_190_DATA
0x0f30a2fc 0x00000000  //DDRSS_PI_191_DATA
0x0f30a300 0x00000000  //DDRSS_PI_192_DATA
0x0f30a304 0x0b000000  //DDRSS_PI_193_DATA
0x0f30a308 0x0a0a0b0b  //DDRSS_PI_194_DATA
0x0f30a30c 0x0303030a  //DDRSS_PI_195_DATA
0x0f30a310 0x00000000  //DDRSS_PI_196_DATA
0x0f30a314 0x00000000  //DDRSS_PI_197_DATA
0x0f30a318 0x00000000  //DDRSS_PI_198_DATA
0x0f30a31c 0x00000000  //DDRSS_PI_199_DATA
0x0f30a320 0x00000000  //DDRSS_PI_200_DATA
0x0f30a324 0x00000000  //DDRSS_PI_201_DATA
0x0f30a328 0x00000000  //DDRSS_PI_202_DATA
0x0f30a32c 0x00000000  //DDRSS_PI_203_DATA
0x0f30a330 0x00000000  //DDRSS_PI_204_DATA
0x0f30a334 0x00000000  //DDRSS_PI_205_DATA
0x0f30a338 0x00000000  //DDRSS_PI_206_DATA
0x0f30a33c 0x00000000  //DDRSS_PI_207_DATA
0x0f30a340 0x00000000  //DDRSS_PI_208_DATA
0x0f30a344 0x0d090000  //DDRSS_PI_209_DATA
0x0f30a348 0x0d09000d  //DDRSS_PI_210_DATA
0x0f30a34c 0x0d09000d  //DDRSS_PI_211_DATA
0x0f30a350 0x0000000d  //DDRSS_PI_212_DATA
0x0f30a354 0x00000000  //DDRSS_PI_213_DATA
0x0f30a358 0x00000000  //DDRSS_PI_214_DATA
0x0f30a35c 0x00000000  //DDRSS_PI_215_DATA
0x0f30a360 0x00000000  //DDRSS_PI_216_DATA
0x0f30a364 0x16000000  //DDRSS_PI_217_DATA
0x0f30a368 0x001600c8  //DDRSS_PI_218_DATA
0x0f30a36c 0x001600c8  //DDRSS_PI_219_DATA
0x0f30a370 0x010100c8  //DDRSS_PI_220_DATA
0x0f30a374 0x00001b01  //DDRSS_PI_221_DATA
0x0f30a378 0x1f0f0051  //DDRSS_PI_222_DATA
0x0f30a37c 0x03000001  //DDRSS_PI_223_DATA
0x0f30a380 0x001b0a0b  //DDRSS_PI_224_DATA
0x0f30a384 0x1f0f0051  //DDRSS_PI_225_DATA
0x0f30a388 0x03000001  //DDRSS_PI_226_DATA
0x0f30a38c 0x001b0a0b  //DDRSS_PI_227_DATA
0x0f30a390 0x1f0f0051  //DDRSS_PI_228_DATA
0x0f30a394 0x03000001  //DDRSS_PI_229_DATA
0x0f30a398 0x00000a0b  //DDRSS_PI_230_DATA
0x0f30a39c 0x0d0b0700  //DDRSS_PI_231_DATA
0x0f30a3a0 0x000d0605  //DDRSS_PI_232_DATA
0x0f30a3a4 0x0000c570  //DDRSS_PI_233_DATA
0x0f30a3a8 0x0000000d  //DDRSS_PI_234_DATA
0x0f30a3ac 0x180a0800  //DDRSS_PI_235_DATA
0x0f30a3b0 0x0b071c1c  //DDRSS_PI_236_DATA
0x0f30a3b4 0x0d06050d  //DDRSS_PI_237_DATA
0x0f30a3b8 0x0000c570  //DDRSS_PI_238_DATA
0x0f30a3bc 0x0000000d  //DDRSS_PI_239_DATA
0x0f30a3c0 0x180a0800  //DDRSS_PI_240_DATA
0x0f30a3c4 0x0b071c1c  //DDRSS_PI_241_DATA
0x0f30a3c8 0x0d06050d  //DDRSS_PI_242_DATA
0x0f30a3cc 0x0000c570  //DDRSS_PI_243_DATA
0x0f30a3d0 0x0000000d  //DDRSS_PI_244_DATA
0x0f30a3d4 0x180a0800  //DDRSS_PI_245_DATA
0x0f30a3d8 0x00001c1c  //DDRSS_PI_246_DATA
0x0f30a3dc 0x000030c0  //DDRSS_PI_247_DATA
0x0f30a3e0 0x0001e780  //DDRSS_PI_248_DATA
0x0f30a3e4 0x000030c0  //DDRSS_PI_249_DATA
0x0f30a3e8 0x0001e780  //DDRSS_PI_250_DATA
0x0f30a3ec 0x000030c0  //DDRSS_PI_251_DATA
0x0f30a3f0 0x0001e780  //DDRSS_PI_252_DATA
0x0f30a3f4 0x02550255  //DDRSS_PI_253_DATA
0x0f30a3f8 0x03030255  //DDRSS_PI_254_DATA
0x0f30a3fc 0x00025503  //DDRSS_PI_255_DATA
0x0f30a400 0x02550255  //DDRSS_PI_256_DATA
0x0f30a404 0x0c080c08  //DDRSS_PI_257_DATA
0x0f30a408 0x00000c08  //DDRSS_PI_258_DATA
0x0f30a40c 0x000890b8  //DDRSS_PI_259_DATA
0x0f30a410 0x00000000  //DDRSS_PI_260_DATA
0x0f30a414 0x00000000  //DDRSS_PI_261_DATA
0x0f30a418 0x00000000  //DDRSS_PI_262_DATA
0x0f30a41c 0x00000120  //DDRSS_PI_263_DATA
0x0f30a420 0x000890b8  //DDRSS_PI_264_DATA
0x0f30a424 0x00000000  //DDRSS_PI_265_DATA
0x0f30a428 0x00000000  //DDRSS_PI_266_DATA
0x0f30a42c 0x00000000  //DDRSS_PI_267_DATA
0x0f30a430 0x00000120  //DDRSS_PI_268_DATA
0x0f30a434 0x000890b8  //DDRSS_PI_269_DATA
0x0f30a438 0x00000000  //DDRSS_PI_270_DATA
0x0f30a43c 0x00000000  //DDRSS_PI_271_DATA
0x0f30a440 0x00000000  //DDRSS_PI_272_DATA
0x0f30a444 0x02000120  //DDRSS_PI_273_DATA
0x0f30a448 0x00000080  //DDRSS_PI_274_DATA
0x0f30a44c 0x00020000  //DDRSS_PI_275_DATA
0x0f30a450 0x00000080  //DDRSS_PI_276_DATA
0x0f30a454 0x00020000  //DDRSS_PI_277_DATA
0x0f30a458 0x00000080  //DDRSS_PI_278_DATA
0x0f30a45c 0x00000000  //DDRSS_PI_279_DATA
0x0f30a460 0x00000000  //DDRSS_PI_280_DATA
0x0f30a464 0x00040404  //DDRSS_PI_281_DATA
0x0f30a468 0x00000000  //DDRSS_PI_282_DATA
0x0f30a46c 0x02010102  //DDRSS_PI_283_DATA
0x0f30a470 0x67676767  //DDRSS_PI_284_DATA
0x0f30a474 0x00000202  //DDRSS_PI_285_DATA
0x0f30a478 0x00000000  //DDRSS_PI_286_DATA
0x0f30a47c 0x00000000  //DDRSS_PI_287_DATA
0x0f30a480 0x00000000  //DDRSS_PI_288_DATA
0x0f30a484 0x00000000  //DDRSS_PI_289_DATA
0x0f30a488 0x00000000  //DDRSS_PI_290_DATA
0x0f30a48c 0x0d100f00  //DDRSS_PI_291_DATA
0x0f30a490 0x0003020e  //DDRSS_PI_292_DATA
0x0f30a494 0x00000001  //DDRSS_PI_293_DATA
0x0f30a498 0x01000000  //DDRSS_PI_294_DATA
0x0f30a49c 0x00020201  //DDRSS_PI_295_DATA
0x0f30a4a0 0x00000000  //DDRSS_PI_296_DATA
0x0f30a4a4 0x00000414  //DDRSS_PI_297_DATA
0x0f30a4a8 0x00000301  //DDRSS_PI_298_DATA
0x0f30a4ac 0x00000000  //DDRSS_PI_299_DATA
0x0f30a4b0 0x00000000  //DDRSS_PI_300_DATA
0x0f30a4b4 0x00000000  //DDRSS_PI_301_DATA
0x0f30a4b8 0x00000401  //DDRSS_PI_302_DATA
0x0f30a4bc 0x00000493  //DDRSS_PI_303_DATA
0x0f30a4c0 0x00000000  //DDRSS_PI_304_DATA
0x0f30a4c4 0x00000414  //DDRSS_PI_305_DATA
0x0f30a4c8 0x00000301  //DDRSS_PI_306_DATA
0x0f30a4cc 0x00000000  //DDRSS_PI_307_DATA
0x0f30a4d0 0x00000000  //DDRSS_PI_308_DATA
0x0f30a4d4 0x00000000  //DDRSS_PI_309_DATA
0x0f30a4d8 0x00000401  //DDRSS_PI_310_DATA
0x0f30a4dc 0x00000493  //DDRSS_PI_311_DATA
0x0f30a4e0 0x00000000  //DDRSS_PI_312_DATA
0x0f30a4e4 0x00000414  //DDRSS_PI_313_DATA
0x0f30a4e8 0x00000301  //DDRSS_PI_314_DATA
0x0f30a4ec 0x00000000  //DDRSS_PI_315_DATA
0x0f30a4f0 0x00000000  //DDRSS_PI_316_DATA
0x0f30a4f4 0x00000000  //DDRSS_PI_317_DATA
0x0f30a4f8 0x00000401  //DDRSS_PI_318_DATA
0x0f30a4fc 0x00000493  //DDRSS_PI_319_DATA
0x0f30a500 0x00000000  //DDRSS_PI_320_DATA
0x0f30a504 0x00000414  //DDRSS_PI_321_DATA
0x0f30a508 0x00000301  //DDRSS_PI_322_DATA
0x0f30a50c 0x00000000  //DDRSS_PI_323_DATA
0x0f30a510 0x00000000  //DDRSS_PI_324_DATA
0x0f30a514 0x00000000  //DDRSS_PI_325_DATA
0x0f30a518 0x00000401  //DDRSS_PI_326_DATA
0x0f30a51c 0x00000493  //DDRSS_PI_327_DATA
0x0f30a520 0x00000000  //DDRSS_PI_328_DATA
0x0f30a524 0x00000414  //DDRSS_PI_329_DATA
0x0f30a528 0x00000301  //DDRSS_PI_330_DATA
0x0f30a52c 0x00000000  //DDRSS_PI_331_DATA
0x0f30a530 0x00000000  //DDRSS_PI_332_DATA
0x0f30a534 0x00000000  //DDRSS_PI_333_DATA
0x0f30a538 0x00000401  //DDRSS_PI_334_DATA
0x0f30a53c 0x00000493  //DDRSS_PI_335_DATA
0x0f30a540 0x00000000  //DDRSS_PI_336_DATA
0x0f30a544 0x00000414  //DDRSS_PI_337_DATA
0x0f30a548 0x00000301  //DDRSS_PI_338_DATA
0x0f30a54c 0x00000000  //DDRSS_PI_339_DATA
0x0f30a550 0x00000000  //DDRSS_PI_340_DATA
0x0f30a554 0x00000000  //DDRSS_PI_341_DATA
0x0f30a558 0x00000401  //DDRSS_PI_342_DATA
0x0f30a55c 0x00000493  //DDRSS_PI_343_DATA
0x0f30a560 0x00000000  //DDRSS_PI_344_DATA
0x0f30c000 0x04c00000  //DDRSS_PHY_0_DATA_F0
0x0f30c004 0x00000000  //DDRSS_PHY_1_DATA_F0
0x0f30c008 0x00000200  //DDRSS_PHY_2_DATA_F0
0x0f30c00c 0x00000000  //DDRSS_PHY_3_DATA_F0
0x0f30c010 0x00000000  //DDRSS_PHY_4_DATA_F0
0x0f30c014 0x00000000  //DDRSS_PHY_5_DATA_F0
0x0f30c018 0x00000000  //DDRSS_PHY_6_DATA_F0
0x0f30c01c 0x00000000  //DDRSS_PHY_7_DATA_F0
0x0f30c020 0x00000001  //DDRSS_PHY_8_DATA_F0
0x0f30c024 0x00000000  //DDRSS_PHY_9_DATA_F0
0x0f30c028 0x01840000  //DDRSS_PHY_10_DATA_F0
0x0f30c02c 0x010101ff  //DDRSS_PHY_11_DATA_F0
0x0f30c030 0x00010000  //DDRSS_PHY_12_DATA_F0
0x0f30c034 0x00c00004  //DDRSS_PHY_13_DATA_F0
0x0f30c038 0x00cc0008  //DDRSS_PHY_14_DATA_F0
0x0f30c03c 0x00660201  //DDRSS_PHY_15_DATA_F0
0x0f30c040 0x00000000  //DDRSS_PHY_16_DATA_F0
0x0f30c044 0x00000000  //DDRSS_PHY_17_DATA_F0
0x0f30c048 0x00000000  //DDRSS_PHY_18_DATA_F0
0x0f30c04c 0x0000aaaa  //DDRSS_PHY_19_DATA_F0
0x0f30c050 0x00005555  //DDRSS_PHY_20_DATA_F0
0x0f30c054 0x0000b5b5  //DDRSS_PHY_21_DATA_F0
0x0f30c058 0x00004a4a  //DDRSS_PHY_22_DATA_F0
0x0f30c05c 0x00005656  //DDRSS_PHY_23_DATA_F0
0x0f30c060 0x0000a9a9  //DDRSS_PHY_24_DATA_F0
0x0f30c064 0x0000b7b7  //DDRSS_PHY_25_DATA_F0
0x0f30c068 0x00004848  //DDRSS_PHY_26_DATA_F0
0x0f30c06c 0x00000000  //DDRSS_PHY_27_DATA_F0
0x0f30c070 0x00000000  //DDRSS_PHY_28_DATA_F0
0x0f30c074 0x08000000  //DDRSS_PHY_29_DATA_F0
0x0f30c078 0x0f000008  //DDRSS_PHY_30_DATA_F0
0x0f30c07c 0x00000f0f  //DDRSS_PHY_31_DATA_F0
0x0f30c080 0x00e4e400  //DDRSS_PHY_32_DATA_F0
0x0f30c084 0x00070820  //DDRSS_PHY_33_DATA_F0
0x0f30c088 0x000c0020  //DDRSS_PHY_34_DATA_F0
0x0f30c08c 0x00062000  //DDRSS_PHY_35_DATA_F0
0x0f30c090 0x00000000  //DDRSS_PHY_36_DATA_F0
0x0f30c094 0x55555555  //DDRSS_PHY_37_DATA_F0
0x0f30c098 0xaaaaaaaa  //DDRSS_PHY_38_DATA_F0
0x0f30c09c 0x55555555  //DDRSS_PHY_39_DATA_F0
0x0f30c0a0 0xaaaaaaaa  //DDRSS_PHY_40_DATA_F0
0x0f30c0a4 0x00005555  //DDRSS_PHY_41_DATA_F0
0x0f30c0a8 0x01000100  //DDRSS_PHY_42_DATA_F0
0x0f30c0ac 0x00800180  //DDRSS_PHY_43_DATA_F0
0x0f30c0b0 0x00000000  //DDRSS_PHY_44_DATA_F0
0x0f30c0b4 0x00100000  //DDRSS_PHY_45_DATA_F0
0x0f30c0b8 0x00000000  //DDRSS_PHY_46_DATA_F0
0x0f30c0bc 0xc009000e  //DDRSS_PHY_47_DATA_F0
0x0f30c0c0 0x00000000  //DDRSS_PHY_48_DATA_F0
0x0f30c0c4 0x00010600  //DDRSS_PHY_49_DATA_F0
0x0f30c0c8 0x00000000  //DDRSS_PHY_50_DATA_F0
0x0f30c0cc 0x00021cff  //DDRSS_PHY_51_DATA_F0
0x0f30c0d0 0x00000000  //DDRSS_PHY_52_DATA_F0
0x0f30c0d4 0x00000000  //DDRSS_PHY_53_DATA_F0
0x0f30c0d8 0x000000b1  //DDRSS_PHY_54_DATA_F0
0x0f30c0dc 0x01cc01cc  //DDRSS_PHY_55_DATA_F0
0x0f30c0e0 0x00000000  //DDRSS_PHY_56_DATA_F0
0x0f30c0e4 0x0c000000  //DDRSS_PHY_57_DATA_F0
0x0f30c0e8 0x07ff0000  //DDRSS_PHY_58_DATA_F0
0x0f30c0ec 0x00000000  //DDRSS_PHY_59_DATA_F0
0x0f30c0f0 0x00000000  //DDRSS_PHY_60_DATA_F0
0x0f30c0f4 0x00000000  //DDRSS_PHY_61_DATA_F0
0x0f30c0f8 0x00000000  //DDRSS_PHY_62_DATA_F0
0x0f30c0fc 0x00000000  //DDRSS_PHY_63_DATA_F0
0x0f30c100 0x00000000  //DDRSS_PHY_64_DATA_F0
0x0f30c104 0x00000004  //DDRSS_PHY_65_DATA_F0
0x0f30c108 0x00000000  //DDRSS_PHY_66_DATA_F0
0x0f30c10c 0x00000000  //DDRSS_PHY_67_DATA_F0
0x0f30c110 0x00000000  //DDRSS_PHY_68_DATA_F0
0x0f30c114 0x00000000  //DDRSS_PHY_69_DATA_F0
0x0f30c118 0x00000000  //DDRSS_PHY_70_DATA_F0
0x0f30c11c 0x00000000  //DDRSS_PHY_71_DATA_F0
0x0f30c120 0x041f07ff  //DDRSS_PHY_72_DATA_F0
0x0f30c124 0x00000000  //DDRSS_PHY_73_DATA_F0
0x0f30c128 0x01ccb001  //DDRSS_PHY_74_DATA_F0
0x0f30c12c 0x2000ccb0  //DDRSS_PHY_75_DATA_F0
0x0f30c130 0x20000140  //DDRSS_PHY_76_DATA_F0
0x0f30c134 0x07ff0200  //DDRSS_PHY_77_DATA_F0
0x0f30c138 0x0000dd01  //DDRSS_PHY_78_DATA_F0
0x0f30c13c 0x10100303  //DDRSS_PHY_79_DATA_F0
0x0f30c140 0x10101010  //DDRSS_PHY_80_DATA_F0
0x0f30c144 0x10101010  //DDRSS_PHY_81_DATA_F0
0x0f30c148 0x00021010  //DDRSS_PHY_82_DATA_F0
0x0f30c14c 0x00100010  //DDRSS_PHY_83_DATA_F0
0x0f30c150 0x00100010  //DDRSS_PHY_84_DATA_F0
0x0f30c154 0x00100010  //DDRSS_PHY_85_DATA_F0
0x0f30c158 0x00100010  //DDRSS_PHY_86_DATA_F0
0x0f30c15c 0x02020010  //DDRSS_PHY_87_DATA_F0
0x0f30c160 0x51515041  //DDRSS_PHY_88_DATA_F0
0x0f30c164 0x31804000  //DDRSS_PHY_89_DATA_F0
0x0f30c168 0x04800340  //DDRSS_PHY_90_DATA_F0
0x0f30c16c 0x01008080  //DDRSS_PHY_91_DATA_F0
0x0f30c170 0x04050000  //DDRSS_PHY_92_DATA_F0
0x0f30c174 0x00000504  //DDRSS_PHY_93_DATA_F0
0x0f30c178 0x42100010  //DDRSS_PHY_94_DATA_F0
0x0f30c17c 0x010c053e  //DDRSS_PHY_95_DATA_F0
0x0f30c180 0x000f0c14  //DDRSS_PHY_96_DATA_F0
0x0f30c184 0x01000140  //DDRSS_PHY_97_DATA_F0
0x0f30c188 0x007a0120  //DDRSS_PHY_98_DATA_F0
0x0f30c18c 0x00000c00  //DDRSS_PHY_99_DATA_F0
0x0f30c190 0x000001cc  //DDRSS_PHY_100_DATA_F0
0x0f30c194 0x20100200  //DDRSS_PHY_101_DATA_F0
0x0f30c198 0x00000005  //DDRSS_PHY_102_DATA_F0
0x0f30c19c 0x76543210  //DDRSS_PHY_103_DATA_F0
0x0f30c1a0 0x00000008  //DDRSS_PHY_104_DATA_F0
0x0f30c1a4 0x02800280  //DDRSS_PHY_105_DATA_F0
0x0f30c1a8 0x02800280  //DDRSS_PHY_106_DATA_F0
0x0f30c1ac 0x02800280  //DDRSS_PHY_107_DATA_F0
0x0f30c1b0 0x02800280  //DDRSS_PHY_108_DATA_F0
0x0f30c1b4 0x00900280  //DDRSS_PHY_109_DATA_F0
0x0f30c1b8 0x0001cc00  //DDRSS_PHY_110_DATA_F0
0x0f30c1bc 0x00660000  //DDRSS_PHY_111_DATA_F0
0x0f30c1c0 0x01cc0000  //DDRSS_PHY_112_DATA_F0
0x0f30c1c4 0x01920000  //DDRSS_PHY_113_DATA_F0
0x0f30c1c8 0x01cc0000  //DDRSS_PHY_114_DATA_F0
0x0f30c1cc 0x00900000  //DDRSS_PHY_115_DATA_F0
0x0f30c1d0 0x01cc0000  //DDRSS_PHY_116_DATA_F0
0x0f30c1d4 0x01cc0000  //DDRSS_PHY_117_DATA_F0
0x0f30c1d8 0x01cc0000  //DDRSS_PHY_118_DATA_F0
0x0f30c1dc 0x00000000  //DDRSS_PHY_119_DATA_F0
0x0f30c1e0 0x01000000  //DDRSS_PHY_120_DATA_F0
0x0f30c1e4 0x00000000  //DDRSS_PHY_121_DATA_F0
0x0f30c1e8 0x00000000  //DDRSS_PHY_122_DATA_F0
0x0f30c1ec 0x00080200  //DDRSS_PHY_123_DATA_F0
0x0f30c1f0 0x00000000  //DDRSS_PHY_124_DATA_F0
0x0f30c1f4 0x00000000  //DDRSS_PHY_125_DATA_F0
0x0f30c400 0x04c00000  //DDRSS_PHY_256_DATA_F0
0x0f30c404 0x00000000  //DDRSS_PHY_257_DATA_F0
0x0f30c408 0x00000200  //DDRSS_PHY_258_DATA_F0
0x0f30c40c 0x00000000  //DDRSS_PHY_259_DATA_F0
0x0f30c410 0x00000000  //DDRSS_PHY_260_DATA_F0
0x0f30c414 0x00000000  //DDRSS_PHY_261_DATA_F0
0x0f30c418 0x00000000  //DDRSS_PHY_262_DATA_F0
0x0f30c41c 0x00000000  //DDRSS_PHY_263_DATA_F0
0x0f30c420 0x00000001  //DDRSS_PHY_264_DATA_F0
0x0f30c424 0x00000000  //DDRSS_PHY_265_DATA_F0
0x0f30c428 0x01840000  //DDRSS_PHY_266_DATA_F0
0x0f30c42c 0x010101ff  //DDRSS_PHY_267_DATA_F0
0x0f30c430 0x00010000  //DDRSS_PHY_268_DATA_F0
0x0f30c434 0x00c00004  //DDRSS_PHY_269_DATA_F0
0x0f30c438 0x00cc0008  //DDRSS_PHY_270_DATA_F0
0x0f30c43c 0x00660201  //DDRSS_PHY_271_DATA_F0
0x0f30c440 0x00000000  //DDRSS_PHY_272_DATA_F0
0x0f30c444 0x00000000  //DDRSS_PHY_273_DATA_F0
0x0f30c448 0x00000000  //DDRSS_PHY_274_DATA_F0
0x0f30c44c 0x0000aaaa  //DDRSS_PHY_275_DATA_F0
0x0f30c450 0x00005555  //DDRSS_PHY_276_DATA_F0
0x0f30c454 0x0000b5b5  //DDRSS_PHY_277_DATA_F0
0x0f30c458 0x00004a4a  //DDRSS_PHY_278_DATA_F0
0x0f30c45c 0x00005656  //DDRSS_PHY_279_DATA_F0
0x0f30c460 0x0000a9a9  //DDRSS_PHY_280_DATA_F0
0x0f30c464 0x0000b7b7  //DDRSS_PHY_281_DATA_F0
0x0f30c468 0x00004848  //DDRSS_PHY_282_DATA_F0
0x0f30c46c 0x00000000  //DDRSS_PHY_283_DATA_F0
0x0f30c470 0x00000000  //DDRSS_PHY_284_DATA_F0
0x0f30c474 0x08000000  //DDRSS_PHY_285_DATA_F0
0x0f30c478 0x0f000008  //DDRSS_PHY_286_DATA_F0
0x0f30c47c 0x00000f0f  //DDRSS_PHY_287_DATA_F0
0x0f30c480 0x00e4e400  //DDRSS_PHY_288_DATA_F0
0x0f30c484 0x00070820  //DDRSS_PHY_289_DATA_F0
0x0f30c488 0x000c0020  //DDRSS_PHY_290_DATA_F0
0x0f30c48c 0x00062000  //DDRSS_PHY_291_DATA_F0
0x0f30c490 0x00000000  //DDRSS_PHY_292_DATA_F0
0x0f30c494 0x55555555  //DDRSS_PHY_293_DATA_F0
0x0f30c498 0xaaaaaaaa  //DDRSS_PHY_294_DATA_F0
0x0f30c49c 0x55555555  //DDRSS_PHY_295_DATA_F0
0x0f30c4a0 0xaaaaaaaa  //DDRSS_PHY_296_DATA_F0
0x0f30c4a4 0x00005555  //DDRSS_PHY_297_DATA_F0
0x0f30c4a8 0x01000100  //DDRSS_PHY_298_DATA_F0
0x0f30c4ac 0x00800180  //DDRSS_PHY_299_DATA_F0
0x0f30c4b0 0x00000000  //DDRSS_PHY_300_DATA_F0
0x0f30c4b4 0x00100000  //DDRSS_PHY_301_DATA_F0
0x0f30c4b8 0x00000000  //DDRSS_PHY_302_DATA_F0
0x0f30c4bc 0xc009000e  //DDRSS_PHY_303_DATA_F0
0x0f30c4c0 0x00000000  //DDRSS_PHY_304_DATA_F0
0x0f30c4c4 0x00010600  //DDRSS_PHY_305_DATA_F0
0x0f30c4c8 0x00000000  //DDRSS_PHY_306_DATA_F0
0x0f30c4cc 0x00021cff  //DDRSS_PHY_307_DATA_F0
0x0f30c4d0 0x00000000  //DDRSS_PHY_308_DATA_F0
0x0f30c4d4 0x000c0000  //DDRSS_PHY_309_DATA_F0
0x0f30c4d8 0x000000f1  //DDRSS_PHY_310_DATA_F0
0x0f30c4dc 0x01440144  //DDRSS_PHY_311_DATA_F0
0x0f30c4e0 0x00000000  //DDRSS_PHY_312_DATA_F0
0x0f30c4e4 0x0c000000  //DDRSS_PHY_313_DATA_F0
0x0f30c4e8 0x07ff0000  //DDRSS_PHY_314_DATA_F0
0x0f30c4ec 0x00000000  //DDRSS_PHY_315_DATA_F0
0x0f30c4f0 0x00000000  //DDRSS_PHY_316_DATA_F0
0x0f30c4f4 0x00000000  //DDRSS_PHY_317_DATA_F0
0x0f30c4f8 0x00000000  //DDRSS_PHY_318_DATA_F0
0x0f30c4fc 0x00000000  //DDRSS_PHY_319_DATA_F0
0x0f30c500 0x00000000  //DDRSS_PHY_320_DATA_F0
0x0f30c504 0x00000004  //DDRSS_PHY_321_DATA_F0
0x0f30c508 0x00000000  //DDRSS_PHY_322_DATA_F0
0x0f30c50c 0x00000000  //DDRSS_PHY_323_DATA_F0
0x0f30c510 0x00000000  //DDRSS_PHY_324_DATA_F0
0x0f30c514 0x00000000  //DDRSS_PHY_325_DATA_F0
0x0f30c518 0x00000000  //DDRSS_PHY_326_DATA_F0
0x0f30c51c 0x00000000  //DDRSS_PHY_327_DATA_F0
0x0f30c520 0x041f07ff  //DDRSS_PHY_328_DATA_F0
0x0f30c524 0x00000000  //DDRSS_PHY_329_DATA_F0
0x0f30c528 0x01ccb001  //DDRSS_PHY_330_DATA_F0
0x0f30c52c 0x2000ccb0  //DDRSS_PHY_331_DATA_F0
0x0f30c530 0x20000140  //DDRSS_PHY_332_DATA_F0
0x0f30c534 0x07ff0200  //DDRSS_PHY_333_DATA_F0
0x0f30c538 0x0000dd01  //DDRSS_PHY_334_DATA_F0
0x0f30c53c 0x10100303  //DDRSS_PHY_335_DATA_F0
0x0f30c540 0x10101010  //DDRSS_PHY_336_DATA_F0
0x0f30c544 0x10101010  //DDRSS_PHY_337_DATA_F0
0x0f30c548 0x00021010  //DDRSS_PHY_338_DATA_F0
0x0f30c54c 0x00100010  //DDRSS_PHY_339_DATA_F0
0x0f30c550 0x00100010  //DDRSS_PHY_340_DATA_F0
0x0f30c554 0x00100010  //DDRSS_PHY_341_DATA_F0
0x0f30c558 0x00100010  //DDRSS_PHY_342_DATA_F0
0x0f30c55c 0x02020010  //DDRSS_PHY_343_DATA_F0
0x0f30c560 0x51515041  //DDRSS_PHY_344_DATA_F0
0x0f30c564 0x31804000  //DDRSS_PHY_345_DATA_F0
0x0f30c568 0x04800340  //DDRSS_PHY_346_DATA_F0
0x0f30c56c 0x01008080  //DDRSS_PHY_347_DATA_F0
0x0f30c570 0x04050000  //DDRSS_PHY_348_DATA_F0
0x0f30c574 0x00000504  //DDRSS_PHY_349_DATA_F0
0x0f30c578 0x42100010  //DDRSS_PHY_350_DATA_F0
0x0f30c57c 0x010c053e  //DDRSS_PHY_351_DATA_F0
0x0f30c580 0x000f0c14  //DDRSS_PHY_352_DATA_F0
0x0f30c584 0x01000140  //DDRSS_PHY_353_DATA_F0
0x0f30c588 0x007a0120  //DDRSS_PHY_354_DATA_F0
0x0f30c58c 0x00000c00  //DDRSS_PHY_355_DATA_F0
0x0f30c590 0x000001cc  //DDRSS_PHY_356_DATA_F0
0x0f30c594 0x20100200  //DDRSS_PHY_357_DATA_F0
0x0f30c598 0x00000005  //DDRSS_PHY_358_DATA_F0
0x0f30c59c 0x76543210  //DDRSS_PHY_359_DATA_F0
0x0f30c5a0 0x00000008  //DDRSS_PHY_360_DATA_F0
0x0f30c5a4 0x02800280  //DDRSS_PHY_361_DATA_F0
0x0f30c5a8 0x02800280  //DDRSS_PHY_362_DATA_F0
0x0f30c5ac 0x02800280  //DDRSS_PHY_363_DATA_F0
0x0f30c5b0 0x02800280  //DDRSS_PHY_364_DATA_F0
0x0f30c5b4 0x00900280  //DDRSS_PHY_365_DATA_F0
0x0f30c5b8 0x00014400  //DDRSS_PHY_366_DATA_F0
0x0f30c5bc 0x00ae0000  //DDRSS_PHY_367_DATA_F0
0x0f30c5c0 0x01a40000  //DDRSS_PHY_368_DATA_F0
0x0f30c5c4 0x00780000  //DDRSS_PHY_369_DATA_F0
0x0f30c5c8 0x005a0000  //DDRSS_PHY_370_DATA_F0
0x0f30c5cc 0x00000000  //DDRSS_PHY_371_DATA_F0
0x0f30c5d0 0x00000000  //DDRSS_PHY_372_DATA_F0
0x0f30c5d4 0x01c20000  //DDRSS_PHY_373_DATA_F0
0x0f30c5d8 0x01440000  //DDRSS_PHY_374_DATA_F0
0x0f30c5dc 0x00000000  //DDRSS_PHY_375_DATA_F0
0x0f30c5e0 0x01000000  //DDRSS_PHY_376_DATA_F0
0x0f30c5e4 0x00000000  //DDRSS_PHY_377_DATA_F0
0x0f30c5e8 0x00000000  //DDRSS_PHY_378_DATA_F0
0x0f30c5ec 0x00080200  //DDRSS_PHY_379_DATA_F0
0x0f30c5f0 0x00000000  //DDRSS_PHY_380_DATA_F0
0x0f30c5f4 0x00000000  //DDRSS_PHY_381_DATA_F0
0x0f30c800 0x00000100  //DDRSS_PHY_512_DATA_F0
0x0f30c804 0x00001000  //DDRSS_PHY_513_DATA_F0
0x0f30c808 0x00090000  //DDRSS_PHY_514_DATA_F0
0x0f30c80c 0x00000000  //DDRSS_PHY_515_DATA_F0
0x0f30c810 0x00000000  //DDRSS_PHY_516_DATA_F0
0x0f30c814 0x00000100  //DDRSS_PHY_517_DATA_F0
0x0f30c818 0x00000000  //DDRSS_PHY_518_DATA_F0
0x0f30c81c 0x00000000  //DDRSS_PHY_519_DATA_F0
0x0f30c820 0x00000000  //DDRSS_PHY_520_DATA_F0
0x0f30c824 0x00000000  //DDRSS_PHY_521_DATA_F0
0x0f30c828 0x00000000  //DDRSS_PHY_522_DATA_F0
0x0f30c82c 0x00000000  //DDRSS_PHY_523_DATA_F0
0x0f30c830 0x00000000  //DDRSS_PHY_524_DATA_F0
0x0f30c834 0x00dcba98  //DDRSS_PHY_525_DATA_F0
0x0f30c838 0x00000000  //DDRSS_PHY_526_DATA_F0
0x0f30c83c 0x00000000  //DDRSS_PHY_527_DATA_F0
0x0f30c840 0x00000000  //DDRSS_PHY_528_DATA_F0
0x0f30c844 0x00000000  //DDRSS_PHY_529_DATA_F0
0x0f30c848 0x00000000  //DDRSS_PHY_530_DATA_F0
0x0f30c84c 0x00000100  //DDRSS_PHY_531_DATA_F0
0x0f30c850 0x00000000  //DDRSS_PHY_532_DATA_F0
0x0f30c854 0x00000000  //DDRSS_PHY_533_DATA_F0
0x0f30c858 0x00000000  //DDRSS_PHY_534_DATA_F0
0x0f30c85c 0x00000000  //DDRSS_PHY_535_DATA_F0
0x0f30c860 0x00000000  //DDRSS_PHY_536_DATA_F0
0x0f30c864 0x00000000  //DDRSS_PHY_537_DATA_F0
0x0f30c868 0x00000000  //DDRSS_PHY_538_DATA_F0
0x0f30c86c 0x00000000  //DDRSS_PHY_539_DATA_F0
0x0f30c870 0x0a418820  //DDRSS_PHY_540_DATA_F0
0x0f30c874 0x103f0000  //DDRSS_PHY_541_DATA_F0
0x0f30c878 0x000f0100  //DDRSS_PHY_542_DATA_F0
0x0f30c87c 0x0000000f  //DDRSS_PHY_543_DATA_F0
0x0f30c880 0x020002cc  //DDRSS_PHY_544_DATA_F0
0x0f30c884 0x00030000  //DDRSS_PHY_545_DATA_F0
0x0f30c888 0x00000300  //DDRSS_PHY_546_DATA_F0
0x0f30c88c 0x00000300  //DDRSS_PHY_547_DATA_F0
0x0f30c890 0x00000300  //DDRSS_PHY_548_DATA_F0
0x0f30c894 0x00000300  //DDRSS_PHY_549_DATA_F0
0x0f30c898 0x00000300  //DDRSS_PHY_550_DATA_F0
0x0f30c89c 0x42080010  //DDRSS_PHY_551_DATA_F0
0x0f30c8a0 0x0000003e  //DDRSS_PHY_552_DATA_F0
0x0f30c8a4 0x00000000  //DDRSS_PHY_553_DATA_F0
0x0f30c8a8 0x00000000  //DDRSS_PHY_554_DATA_F0
0x0f30cc00 0x00000100  //DDRSS_PHY_768_DATA_F0
0x0f30cc04 0x00001000  //DDRSS_PHY_769_DATA_F0
0x0f30cc08 0x00090000  //DDRSS_PHY_770_DATA_F0
0x0f30cc0c 0x00000000  //DDRSS_PHY_771_DATA_F0
0x0f30cc10 0x00000000  //DDRSS_PHY_772_DATA_F0
0x0f30cc14 0x00000100  //DDRSS_PHY_773_DATA_F0
0x0f30cc18 0x00000000  //DDRSS_PHY_774_DATA_F0
0x0f30cc1c 0x00000000  //DDRSS_PHY_775_DATA_F0
0x0f30cc20 0x00000000  //DDRSS_PHY_776_DATA_F0
0x0f30cc24 0x00000000  //DDRSS_PHY_777_DATA_F0
0x0f30cc28 0x00000000  //DDRSS_PHY_778_DATA_F0
0x0f30cc2c 0x00000000  //DDRSS_PHY_779_DATA_F0
0x0f30cc30 0x00000000  //DDRSS_PHY_780_DATA_F0
0x0f30cc34 0x00dcba98  //DDRSS_PHY_781_DATA_F0
0x0f30cc38 0x00000000  //DDRSS_PHY_782_DATA_F0
0x0f30cc3c 0x00000000  //DDRSS_PHY_783_DATA_F0
0x0f30cc40 0x00000000  //DDRSS_PHY_784_DATA_F0
0x0f30cc44 0x00000000  //DDRSS_PHY_785_DATA_F0
0x0f30cc48 0x00000000  //DDRSS_PHY_786_DATA_F0
0x0f30cc4c 0x00000100  //DDRSS_PHY_787_DATA_F0
0x0f30cc50 0x00000000  //DDRSS_PHY_788_DATA_F0
0x0f30cc54 0x00000000  //DDRSS_PHY_789_DATA_F0
0x0f30cc58 0x00000000  //DDRSS_PHY_790_DATA_F0
0x0f30cc5c 0x00000000  //DDRSS_PHY_791_DATA_F0
0x0f30cc60 0x00000000  //DDRSS_PHY_792_DATA_F0
0x0f30cc64 0x00000000  //DDRSS_PHY_793_DATA_F0
0x0f30cc68 0x00000000  //DDRSS_PHY_794_DATA_F0
0x0f30cc6c 0x00000000  //DDRSS_PHY_795_DATA_F0
0x0f30cc70 0x16a4a0e6  //DDRSS_PHY_796_DATA_F0
0x0f30cc74 0x103f0000  //DDRSS_PHY_797_DATA_F0
0x0f30cc78 0x000f0000  //DDRSS_PHY_798_DATA_F0
0x0f30cc7c 0x0000000f  //DDRSS_PHY_799_DATA_F0
0x0f30cc80 0x020002cc  //DDRSS_PHY_800_DATA_F0
0x0f30cc84 0x00030000  //DDRSS_PHY_801_DATA_F0
0x0f30cc88 0x00000300  //DDRSS_PHY_802_DATA_F0
0x0f30cc8c 0x00000300  //DDRSS_PHY_803_DATA_F0
0x0f30cc90 0x00000300  //DDRSS_PHY_804_DATA_F0
0x0f30cc94 0x00000300  //DDRSS_PHY_805_DATA_F0
0x0f30cc98 0x00000300  //DDRSS_PHY_806_DATA_F0
0x0f30cc9c 0x42080010  //DDRSS_PHY_807_DATA_F0
0x0f30cca0 0x0000003e  //DDRSS_PHY_808_DATA_F0
0x0f30cca4 0x00000000  //DDRSS_PHY_809_DATA_F0
0x0f30cca8 0x00000000  //DDRSS_PHY_810_DATA_F0
0x0f30d000 0x00000100  //DDRSS_PHY_1024_DATA_F0
0x0f30d004 0x00001000  //DDRSS_PHY_1025_DATA_F0
0x0f30d008 0x00090000  //DDRSS_PHY_1026_DATA_F0
0x0f30d00c 0x00000000  //DDRSS_PHY_1027_DATA_F0
0x0f30d010 0x00000000  //DDRSS_PHY_1028_DATA_F0
0x0f30d014 0x00000100  //DDRSS_PHY_1029_DATA_F0
0x0f30d018 0x00000000  //DDRSS_PHY_1030_DATA_F0
0x0f30d01c 0x00000000  //DDRSS_PHY_1031_DATA_F0
0x0f30d020 0x00000000  //DDRSS_PHY_1032_DATA_F0
0x0f30d024 0x00000000  //DDRSS_PHY_1033_DATA_F0
0x0f30d028 0x00000000  //DDRSS_PHY_1034_DATA_F0
0x0f30d02c 0x00000000  //DDRSS_PHY_1035_DATA_F0
0x0f30d030 0x00000000  //DDRSS_PHY_1036_DATA_F0
0x0f30d034 0x00dcba98  //DDRSS_PHY_1037_DATA_F0
0x0f30d038 0x00000000  //DDRSS_PHY_1038_DATA_F0
0x0f30d03c 0x00000000  //DDRSS_PHY_1039_DATA_F0
0x0f30d040 0x00000000  //DDRSS_PHY_1040_DATA_F0
0x0f30d044 0x00000000  //DDRSS_PHY_1041_DATA_F0
0x0f30d048 0x00000000  //DDRSS_PHY_1042_DATA_F0
0x0f30d04c 0x00000100  //DDRSS_PHY_1043_DATA_F0
0x0f30d050 0x00000000  //DDRSS_PHY_1044_DATA_F0
0x0f30d054 0x00000000  //DDRSS_PHY_1045_DATA_F0
0x0f30d058 0x00000000  //DDRSS_PHY_1046_DATA_F0
0x0f30d05c 0x00000000  //DDRSS_PHY_1047_DATA_F0
0x0f30d060 0x00000000  //DDRSS_PHY_1048_DATA_F0
0x0f30d064 0x00000000  //DDRSS_PHY_1049_DATA_F0
0x0f30d068 0x00000000  //DDRSS_PHY_1050_DATA_F0
0x0f30d06c 0x00000000  //DDRSS_PHY_1051_DATA_F0
0x0f30d070 0x2307b9ac  //DDRSS_PHY_1052_DATA_F0
0x0f30d074 0x10030000  //DDRSS_PHY_1053_DATA_F0
0x0f30d078 0x000f0000  //DDRSS_PHY_1054_DATA_F0
0x0f30d07c 0x0000000f  //DDRSS_PHY_1055_DATA_F0
0x0f30d080 0x020002cc  //DDRSS_PHY_1056_DATA_F0
0x0f30d084 0x00030000  //DDRSS_PHY_1057_DATA_F0
0x0f30d088 0x00000300  //DDRSS_PHY_1058_DATA_F0
0x0f30d08c 0x00000300  //DDRSS_PHY_1059_DATA_F0
0x0f30d090 0x00000300  //DDRSS_PHY_1060_DATA_F0
0x0f30d094 0x00000300  //DDRSS_PHY_1061_DATA_F0
0x0f30d098 0x00000300  //DDRSS_PHY_1062_DATA_F0
0x0f30d09c 0x42080010  //DDRSS_PHY_1063_DATA_F0
0x0f30d0a0 0x0000003e  //DDRSS_PHY_1064_DATA_F0
0x0f30d0a4 0x00000000  //DDRSS_PHY_1065_DATA_F0
0x0f30d0a8 0x00000000  //DDRSS_PHY_1066_DATA_F0
0x0f30d400 0x00000000  //DDRSS_PHY_1280_DATA_F0
0x0f30d404 0x00000100  //DDRSS_PHY_1281_DATA_F0
0x0f30d408 0x00000000  //DDRSS_PHY_1282_DATA_F0
0x0f30d40c 0x00000000  //DDRSS_PHY_1283_DATA_F0
0x0f30d410 0x00000000  //DDRSS_PHY_1284_DATA_F0
0x0f30d414 0x00000000  //DDRSS_PHY_1285_DATA_F0
0x0f30d418 0x00050000  //DDRSS_PHY_1286_DATA_F0
0x0f30d41c 0x04000100  //DDRSS_PHY_1287_DATA_F0
0x0f30d420 0x00000055  //DDRSS_PHY_1288_DATA_F0
0x0f30d424 0x00000000  //DDRSS_PHY_1289_DATA_F0
0x0f30d428 0x06800000  //DDRSS_PHY_1290_DATA_F0
0x0f30d42c 0x00000000  //DDRSS_PHY_1291_DATA_F0
0x0f30d430 0x00000000  //DDRSS_PHY_1292_DATA_F0
0x0f30d434 0x01002000  //DDRSS_PHY_1293_DATA_F0
0x0f30d438 0x00004001  //DDRSS_PHY_1294_DATA_F0
0x0f30d43c 0x00020028  //DDRSS_PHY_1295_DATA_F0
0x0f30d440 0x00010100  //DDRSS_PHY_1296_DATA_F0
0x0f30d444 0x00000001  //DDRSS_PHY_1297_DATA_F0
0x0f30d448 0x00000000  //DDRSS_PHY_1298_DATA_F0
0x0f30d44c 0x0f0f0e06  //DDRSS_PHY_1299_DATA_F0
0x0f30d450 0x00010101  //DDRSS_PHY_1300_DATA_F0
0x0f30d454 0x010f0004  //DDRSS_PHY_1301_DATA_F0
0x0f30d458 0x00000000  //DDRSS_PHY_1302_DATA_F0
0x0f30d45c 0x20125770  //DDRSS_PHY_1303_DATA_F0
0x0f30d460 0x00000064  //DDRSS_PHY_1304_DATA_F0
0x0f30d464 0x00000000  //DDRSS_PHY_1305_DATA_F0
0x0f30d468 0x00000000  //DDRSS_PHY_1306_DATA_F0
0x0f30d46c 0x01020103  //DDRSS_PHY_1307_DATA_F0
0x0f30d470 0x03020102  //DDRSS_PHY_1308_DATA_F0
0x0f30d474 0x03030303  //DDRSS_PHY_1309_DATA_F0
0x0f30d478 0x03030303  //DDRSS_PHY_1310_DATA_F0
0x0f30d47c 0x00040000  //DDRSS_PHY_1311_DATA_F0
0x0f30d480 0x00005201  //DDRSS_PHY_1312_DATA_F0
0x0f30d484 0x00000003  //DDRSS_PHY_1313_DATA_F0
0x0f30d488 0x00010000  //DDRSS_PHY_1314_DATA_F0
0x0f30d48c 0x00000000  //DDRSS_PHY_1315_DATA_F0
0x0f30d490 0x00000003  //DDRSS_PHY_1316_DATA_F0
0x0f30d494 0x00010000  //DDRSS_PHY_1317_DATA_F0
0x0f30d498 0x00000000  //DDRSS_PHY_1318_DATA_F0
0x0f30d49c 0x07070001  //DDRSS_PHY_1319_DATA_F0
0x0f30d4a0 0x00005400  //DDRSS_PHY_1320_DATA_F0
0x0f30d4a4 0x000040a2  //DDRSS_PHY_1321_DATA_F0
0x0f30d4a8 0x00020fdc  //DDRSS_PHY_1322_DATA_F0
0x0f30d4ac 0x00000fdc  //DDRSS_PHY_1323_DATA_F0
0x0f30d4b0 0x00000fdc  //DDRSS_PHY_1324_DATA_F0
0x0f30d4b4 0x00000fdc  //DDRSS_PHY_1325_DATA_F0
0x0f30d4b8 0x00000fc1  //DDRSS_PHY_1326_DATA_F0
0x0f30d4bc 0x00000fdc  //DDRSS_PHY_1327_DATA_F0
0x0f30d4c0 0x0000b03f  //DDRSS_PHY_1328_DATA_F0
0x0f30d4c4 0x0000b03f  //DDRSS_PHY_1329_DATA_F0
0x0f30d4c8 0x00000fdc  //DDRSS_PHY_1330_DATA_F0
0x0f30d4cc 0x00000fdc  //DDRSS_PHY_1331_DATA_F0
0x0f30d4d0 0x00000000  //DDRSS_PHY_1332_DATA_F0
0x0f30d4d4 0x00000046  //DDRSS_PHY_1333_DATA_F0
0x0f30d4d8 0x00000400  //DDRSS_PHY_1334_DATA_F0
0x0f30d4dc 0x00000008  //DDRSS_PHY_1335_DATA_F0
0x0f30d4e0 0x00800fdc  //DDRSS_PHY_1336_DATA_F0
0x0f30d4e4 0x0080b03f  //DDRSS_PHY_1337_DATA_F0
0x0f30d4e8 0x0000fdc0  //DDRSS_PHY_1338_DATA_F0
0x0f30d4ec 0x000b03f8  //DDRSS_PHY_1339_DATA_F0
0x0f30d4f0 0x00e0fdcf  //DDRSS_PHY_1340_DATA_F0
0x0f30d4f4 0x03eb03ff  //DDRSS_PHY_1341_DATA_F0
0x0f30d4f8 0x00000000  //DDRSS_PHY_1342_DATA_F0
0x0f30d4fc 0x00000000  //DDRSS_PHY_1343_DATA_F0
0x0f30d500 0xb3000000  //DDRSS_PHY_1344_DATA_F0
0x0f30d504 0x04102006  //DDRSS_PHY_1345_DATA_F0
0x0f30d508 0x00041020  //DDRSS_PHY_1346_DATA_F0
0x0f30d50c 0x01c98c98  //DDRSS_PHY_1347_DATA_F0
0x0f30d510 0x3f400000  //DDRSS_PHY_1348_DATA_F0
0x0f30d514 0x3f3f1f3f  //DDRSS_PHY_1349_DATA_F0
0x0f30d518 0x0000001f  //DDRSS_PHY_1350_DATA_F0
0x0f30d51c 0x00000000  //DDRSS_PHY_1351_DATA_F0
0x0f30d520 0x00000000  //DDRSS_PHY_1352_DATA_F0
0x0f30d524 0x00000000  //DDRSS_PHY_1353_DATA_F0
0x0f30d528 0x00000001  //DDRSS_PHY_1354_DATA_F0
0x0f30d52c 0x00000000  //DDRSS_PHY_1355_DATA_F0
0x0f30d530 0x00000000  //DDRSS_PHY_1356_DATA_F0
0x0f30d534 0x00000000  //DDRSS_PHY_1357_DATA_F0
0x0f30d538 0x00000000  //DDRSS_PHY_1358_DATA_F0
0x0f30d53c 0x76543210  //DDRSS_PHY_1359_DATA_F0
0x0f30d540 0x00000098  //DDRSS_PHY_1360_DATA_F0
0x0f30d544 0x00000000  //DDRSS_PHY_1361_DATA_F0
0x0f30d548 0x00000000  //DDRSS_PHY_1362_DATA_F0
0x0f30d54c 0x00000000  //DDRSS_PHY_1363_DATA_F0
0x0f30d550 0x00040700  //DDRSS_PHY_1364_DATA_F0
0x0f30d554 0x00000000  //DDRSS_PHY_1365_DATA_F0
0x0f30d558 0x00005867  //DDRSS_PHY_1366_DATA_F0
0x0f30d55c 0x00005884  //DDRSS_PHY_1367_DATA_F0
0x0f30d560 0x030f7102  //DDRSS_PHY_1368_DATA_F0
0x0f30d564 0x00000100  //DDRSS_PHY_1369_DATA_F0
0x0f30d568 0x00000000  //DDRSS_PHY_1370_DATA_F0
0x0f30d56c 0x0001f7c2  //DDRSS_PHY_1371_DATA_F0
0x0f30d570 0x00020002  //DDRSS_PHY_1372_DATA_F0
0x0f30d574 0x00000000  //DDRSS_PHY_1373_DATA_F0
0x0f30d578 0x00001142  //DDRSS_PHY_1374_DATA_F0
0x0f30d57c 0x03020400  //DDRSS_PHY_1375_DATA_F0
0x0f30d580 0x00000080  //DDRSS_PHY_1376_DATA_F0
0x0f30d584 0x03900390  //DDRSS_PHY_1377_DATA_F0
0x0f30d588 0x03900390  //DDRSS_PHY_1378_DATA_F0
0x0f30d58c 0x03900390  //DDRSS_PHY_1379_DATA_F0
0x0f30d590 0x03900390  //DDRSS_PHY_1380_DATA_F0
0x0f30d594 0x03900390  //DDRSS_PHY_1381_DATA_F0
0x0f30d598 0x03900390  //DDRSS_PHY_1382_DATA_F0
0x0f30d59c 0x00000300  //DDRSS_PHY_1383_DATA_F0
0x0f30d5a0 0x00000300  //DDRSS_PHY_1384_DATA_F0
0x0f30d5a4 0x00000300  //DDRSS_PHY_1385_DATA_F0
0x0f30d5a8 0x00000300  //DDRSS_PHY_1386_DATA_F0
0x0f30d5ac 0x31823fc7  //DDRSS_PHY_1387_DATA_F0
0x0f30d5b0 0x00000000  //DDRSS_PHY_1388_DATA_F0
0x0f30d5b4 0x0c000d3f  //DDRSS_PHY_1389_DATA_F0
0x0f30d5b8 0x30000d3f  //DDRSS_PHY_1390_DATA_F0
0x0f30d5bc 0x300d3f11  //DDRSS_PHY_1391_DATA_F0
0x0f30d5c0 0x01990000  //DDRSS_PHY_1392_DATA_F0
0x0f30d5c4 0x000d3fcc  //DDRSS_PHY_1393_DATA_F0
0x0f30d5c8 0x00000c11  //DDRSS_PHY_1394_DATA_F0
0x0f30d5cc 0x300d3f11  //DDRSS_PHY_1395_DATA_F0
0x0f30d5d0 0x01990000  //DDRSS_PHY_1396_DATA_F0
0x0f30d5d4 0x300c3f11  //DDRSS_PHY_1397_DATA_F0
0x0f30d5d8 0x01990000  //DDRSS_PHY_1398_DATA_F0
0x0f30d5dc 0x300c3f11  //DDRSS_PHY_1399_DATA_F0
0x0f30d5e0 0x01990000  //DDRSS_PHY_1400_DATA_F0
0x0f30d5e4 0x300d3f11  //DDRSS_PHY_1401_DATA_F0
0x0f30d5e8 0x01990000  //DDRSS_PHY_1402_DATA_F0
0x0f30d5ec 0x300d3f11  //DDRSS_PHY_1403_DATA_F0
0x0f30d5f0 0x01990000  //DDRSS_PHY_1404_DATA_F0
0x0f30d5f4 0x20040004  //DDRSS_PHY_1405_DATA_F0
End of DDR Register Dump

SPL initial stack usage: 13408 bytes

Kind Regards,

JDA.

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

The regdumps are showing that the training isn't working at all, most likely indicating that something is wrong early on. Certainly the CKE/RESET relationship is wrong, but that may be caused by something else, since that is a very fixed part of the hardware sequencing. Please check the basics:

-ensure all DDR voltage rails are at the correct level and stable before RESET and CKE go high:

Processor voltage rails:

VDDS_DDR = VDDS_DDR_C = 1.2V

VDDA_PLL1 = 1.8V

VDD_CORE = 0.75 or 0.85V

Memory voltage rails:

VTT = 0.6V

DDR_VREFCA = 0.6V

DDR_VPP = 2.5V

you can check others, but these are the main ones associated with the DDR.

-probe DDR_CK to see if it is 800MHz

Regards,

James

0 JDA over 1 year ago in reply to JJD

Prodigy 74 points

Hi James,

By following your kind advice, we've fixed some hardware issues and ensured each voltage rails are at correct levels as you reminded, respectively.

You may check their status as below. Meanwhile, the new log content is also attached here.

If it is possible, could you review the new log for us?

Does the log mean our DDR initialization come to ready and work well? Which log message is your key identifier?

In addition, the boot process stops at the following point. Could you provide us further guidance, if you may? (Which stages has our boot process passed? At which stage our boot process currently stuck? Is it possible to do the memory test at current status?)
- [ 12.014182] platform fixed-regulator-sd: deferred probe pending

PS: Thanks for being with us with patience as we improve our AM6442 custom board, recently.

U-Boot SPL 2023.04 (Jun 14 2024 - 07:59:55 +0800)
Resetting on cold boot to workaround ErrataID:i2331
Please resend tiboot3.bin in case of UART/DFU boot
resetting ...

U-Boot SPL 2023.04 (Jun 14 2024 - 07:59:55 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
k3_ddrss_probe(dev=)
k3_ddrss_ofdata_to_priv(dev=)
k3_ddrss memorycontroller@f300000: ddr freq0 not populated, using bypass frequency.
k3_ddrss_power_on(ddrss=)
k3_ddrss memorycontroller@f300000: VTT regulator enabled, volt = 0
k3_lpddr4_probe: PASS
k3_lpddr4_init: PASS
--->>> LPDDR4 Initialization is in progress ... <<<---
k3_lpddr4_start: Post start PASS
Begin DDR Register Dump
0x0f308000 0x10460a01  //DDRSS_CTL_0_DATA
0x0f308004 0x5d1af3c3  //DDRSS_CTL_1_DATA
0x0f308008 0x0171a610  //DDRSS_CTL_2_DATA
0x0f30800c 0x40020a11  //DDRSS_CTL_3_DATA
0x0f308010 0x00052006  //DDRSS_CTL_4_DATA
0x0f308014 0x02050020  //DDRSS_CTL_5_DATA
0x0f308018 0x03070101  //DDRSS_CTL_6_DATA
0x0f30801c 0x000890b8  //DDRSS_CTL_7_DATA
0x0f308020 0x00000000  //DDRSS_CTL_8_DATA
0x0f308024 0x00000000  //DDRSS_CTL_9_DATA
0x0f308028 0x00000000  //DDRSS_CTL_10_DATA
0x0f30802c 0x000890b8  //DDRSS_CTL_11_DATA
0x0f308030 0x00000000  //DDRSS_CTL_12_DATA
0x0f308034 0x00000000  //DDRSS_CTL_13_DATA
0x0f308038 0x00000000  //DDRSS_CTL_14_DATA
0x0f30803c 0x000890b8  //DDRSS_CTL_15_DATA
0x0f308040 0x00000000  //DDRSS_CTL_16_DATA
0x0f308044 0x00000000  //DDRSS_CTL_17_DATA
0x0f308048 0x00000000  //DDRSS_CTL_18_DATA
0x0f30804c 0x01010100  //DDRSS_CTL_19_DATA
0x0f308050 0x01000101  //DDRSS_CTL_20_DATA
0x0f308054 0x01000110  //DDRSS_CTL_21_DATA
0x0f308058 0x02010002  //DDRSS_CTL_22_DATA
0x0f30805c 0x00027100  //DDRSS_CTL_23_DATA
0x0f308060 0x00061a80  //DDRSS_CTL_24_DATA
0x0f308064 0x02550255  //DDRSS_CTL_25_DATA
0x0f308068 0x00000255  //DDRSS_CTL_26_DATA
0x0f30806c 0x00000000  //DDRSS_CTL_27_DATA
0x0f308070 0x00000000  //DDRSS_CTL_28_DATA
0x0f308074 0x00000000  //DDRSS_CTL_29_DATA
0x0f308078 0x00000000  //DDRSS_CTL_30_DATA
0x0f30807c 0x00000000  //DDRSS_CTL_31_DATA
0x0f308080 0x00000000  //DDRSS_CTL_32_DATA
0x0f308084 0x00000000  //DDRSS_CTL_33_DATA
0x0f308088 0x00000000  //DDRSS_CTL_34_DATA
0x0f30808c 0x00000000  //DDRSS_CTL_35_DATA
0x0f308090 0x00000000  //DDRSS_CTL_36_DATA
0x0f308094 0x00000000  //DDRSS_CTL_37_DATA
0x0f308098 0x04000918  //DDRSS_CTL_38_DATA
0x0f30809c 0x1c1c1c1c  //DDRSS_CTL_39_DATA
0x0f3080a0 0x04000918  //DDRSS_CTL_40_DATA
0x0f3080a4 0x1c1c1c1c  //DDRSS_CTL_41_DATA
0x0f3080a8 0x04000918  //DDRSS_CTL_42_DATA
0x0f3080ac 0x1c1c1c1c  //DDRSS_CTL_43_DATA
0x0f3080b0 0x05050404  //DDRSS_CTL_44_DATA
0x0f3080b4 0x00001705  //DDRSS_CTL_45_DATA
0x0f3080b8 0x0602000d  //DDRSS_CTL_46_DATA
0x0f3080bc 0x05001d0b  //DDRSS_CTL_47_DATA
0x0f3080c0 0x00170505  //DDRSS_CTL_48_DATA
0x0f3080c4 0x0602000d  //DDRSS_CTL_49_DATA
0x0f3080c8 0x05001d0b  //DDRSS_CTL_50_DATA
0x0f3080cc 0x00170505  //DDRSS_CTL_51_DATA
0x0f3080d0 0x0602000d  //DDRSS_CTL_52_DATA
0x0f3080d4 0x07001d0b  //DDRSS_CTL_53_DATA
0x0f3080d8 0x00180807  //DDRSS_CTL_54_DATA
0x0f3080dc 0x0400db60  //DDRSS_CTL_55_DATA
0x0f3080e0 0x07070009  //DDRSS_CTL_56_DATA
0x0f3080e4 0x00001808  //DDRSS_CTL_57_DATA
0x0f3080e8 0x0400db60  //DDRSS_CTL_58_DATA
0x0f3080ec 0x07070009  //DDRSS_CTL_59_DATA
0x0f3080f0 0x00001808  //DDRSS_CTL_60_DATA
0x0f3080f4 0x0400db60  //DDRSS_CTL_61_DATA
0x0f3080f8 0x03000009  //DDRSS_CTL_62_DATA
0x0f3080fc 0x0d0d0002  //DDRSS_CTL_63_DATA
0x0f308100 0x0d0d0d0d  //DDRSS_CTL_64_DATA
0x0f308104 0x01010000  //DDRSS_CTL_65_DATA
0x0f308108 0x03191919  //DDRSS_CTL_66_DATA
0x0f30810c 0x0b0b0b0b  //DDRSS_CTL_67_DATA
0x0f308110 0x00000b0b  //DDRSS_CTL_68_DATA
0x0f308114 0x00000101  //DDRSS_CTL_69_DATA
0x0f308118 0x00000000  //DDRSS_CTL_70_DATA
0x0f30811c 0x01000000  //DDRSS_CTL_71_DATA
0x0f308120 0x01180803  //DDRSS_CTL_72_DATA
0x0f308124 0x00001860  //DDRSS_CTL_73_DATA
0x0f308128 0x00000118  //DDRSS_CTL_74_DATA
0x0f30812c 0x00001860  //DDRSS_CTL_75_DATA
0x0f308130 0x00000118  //DDRSS_CTL_76_DATA
0x0f308134 0x00001860  //DDRSS_CTL_77_DATA
0x0f308138 0x00000005  //DDRSS_CTL_78_DATA
0x0f30813c 0x00000000  //DDRSS_CTL_79_DATA
0x0f308140 0x00000000  //DDRSS_CTL_80_DATA
0x0f308144 0x00000000  //DDRSS_CTL_81_DATA
0x0f308148 0x00000000  //DDRSS_CTL_82_DATA
0x0f30814c 0x00000000  //DDRSS_CTL_83_DATA
0x0f308150 0x00000000  //DDRSS_CTL_84_DATA
0x0f308154 0x00000000  //DDRSS_CTL_85_DATA
0x0f308158 0x00000000  //DDRSS_CTL_86_DATA
0x0f30815c 0x00090009  //DDRSS_CTL_87_DATA
0x0f308160 0x00000009  //DDRSS_CTL_88_DATA
0x0f308164 0x00000000  //DDRSS_CTL_89_DATA
0x0f308168 0x00000000  //DDRSS_CTL_90_DATA
0x0f30816c 0x00000000  //DDRSS_CTL_91_DATA
0x0f308170 0x00000000  //DDRSS_CTL_92_DATA
0x0f308174 0x00000000  //DDRSS_CTL_93_DATA
0x0f308178 0x00010001  //DDRSS_CTL_94_DATA
0x0f30817c 0x00025501  //DDRSS_CTL_95_DATA
0x0f308180 0x02550120  //DDRSS_CTL_96_DATA
0x0f308184 0x02550120  //DDRSS_CTL_97_DATA
0x0f308188 0x01200120  //DDRSS_CTL_98_DATA
0x0f30818c 0x01200120  //DDRSS_CTL_99_DATA
0x0f308190 0x00000000  //DDRSS_CTL_100_DATA
0x0f308194 0x00000000  //DDRSS_CTL_101_DATA
0x0f308198 0x00000000  //DDRSS_CTL_102_DATA
0x0f30819c 0x00000000  //DDRSS_CTL_103_DATA
0x0f3081a0 0x00000000  //DDRSS_CTL_104_DATA
0x0f3081a4 0x00000000  //DDRSS_CTL_105_DATA
0x0f3081a8 0x03010000  //DDRSS_CTL_106_DATA
0x0f3081ac 0x00010000  //DDRSS_CTL_107_DATA
0x0f3081b0 0x00000000  //DDRSS_CTL_108_DATA
0x0f3081b4 0x01000000  //DDRSS_CTL_109_DATA
0x0f3081b8 0x80104002  //DDRSS_CTL_110_DATA
0x0f3081bc 0x00040003  //DDRSS_CTL_111_DATA
0x0f3081c0 0x00040005  //DDRSS_CTL_112_DATA
0x0f3081c4 0x00030000  //DDRSS_CTL_113_DATA
0x0f3081c8 0x00050004  //DDRSS_CTL_114_DATA
0x0f3081cc 0x00000004  //DDRSS_CTL_115_DATA
0x0f3081d0 0x00040003  //DDRSS_CTL_116_DATA
0x0f3081d4 0x00040005  //DDRSS_CTL_117_DATA
0x0f3081d8 0x00000000  //DDRSS_CTL_118_DATA
0x0f3081dc 0x00061800  //DDRSS_CTL_119_DATA
0x0f3081e0 0x00061800  //DDRSS_CTL_120_DATA
0x0f3081e4 0x00061800  //DDRSS_CTL_121_DATA
0x0f3081e8 0x00061800  //DDRSS_CTL_122_DATA
0x0f3081ec 0x00061800  //DDRSS_CTL_123_DATA
0x0f3081f0 0x00000000  //DDRSS_CTL_124_DATA
0x0f3081f4 0x0000aaa0  //DDRSS_CTL_125_DATA
0x0f3081f8 0x00061800  //DDRSS_CTL_126_DATA
0x0f3081fc 0x00061800  //DDRSS_CTL_127_DATA
0x0f308200 0x00061800  //DDRSS_CTL_128_DATA
0x0f308204 0x00061800  //DDRSS_CTL_129_DATA
0x0f308208 0x00061800  //DDRSS_CTL_130_DATA
0x0f30820c 0x00000000  //DDRSS_CTL_131_DATA
0x0f308210 0x0000aaa0  //DDRSS_CTL_132_DATA
0x0f308214 0x00061800  //DDRSS_CTL_133_DATA
0x0f308218 0x00061800  //DDRSS_CTL_134_DATA
0x0f30821c 0x00061800  //DDRSS_CTL_135_DATA
0x0f308220 0x00061800  //DDRSS_CTL_136_DATA
0x0f308224 0x00061800  //DDRSS_CTL_137_DATA
0x0f308228 0x00000000  //DDRSS_CTL_138_DATA
0x0f30822c 0x0000aaa0  //DDRSS_CTL_139_DATA
0x0f308230 0x00000000  //DDRSS_CTL_140_DATA
0x0f308234 0x00000000  //DDRSS_CTL_141_DATA
0x0f308238 0x00000000  //DDRSS_CTL_142_DATA
0x0f30823c 0x00000000  //DDRSS_CTL_143_DATA
0x0f308240 0x00000000  //DDRSS_CTL_144_DATA
0x0f308244 0x00000000  //DDRSS_CTL_145_DATA
0x0f308248 0x00000000  //DDRSS_CTL_146_DATA
0x0f30824c 0x00000000  //DDRSS_CTL_147_DATA
0x0f308250 0x00000000  //DDRSS_CTL_148_DATA
0x0f308254 0x00000000  //DDRSS_CTL_149_DATA
0x0f308258 0x00000000  //DDRSS_CTL_150_DATA
0x0f30825c 0x00000000  //DDRSS_CTL_151_DATA
0x0f308260 0x00000000  //DDRSS_CTL_152_DATA
0x0f308264 0x00000000  //DDRSS_CTL_153_DATA
0x0f308268 0x00000000  //DDRSS_CTL_154_DATA
0x0f30826c 0x00000000  //DDRSS_CTL_155_DATA
0x0f308270 0x080c0000  //DDRSS_CTL_156_DATA
0x0f308274 0x080c080c  //DDRSS_CTL_157_DATA
0x0f308278 0x00000000  //DDRSS_CTL_158_DATA
0x0f30827c 0x07010a09  //DDRSS_CTL_159_DATA
0x0f308280 0x000e0a09  //DDRSS_CTL_160_DATA
0x0f308284 0x010a0900  //DDRSS_CTL_161_DATA
0x0f308288 0x0e0a0907  //DDRSS_CTL_162_DATA
0x0f30828c 0x0a090000  //DDRSS_CTL_163_DATA
0x0f308290 0x0a090701  //DDRSS_CTL_164_DATA
0x0f308294 0x0000080e  //DDRSS_CTL_165_DATA
0x0f308298 0x00040003  //DDRSS_CTL_166_DATA
0x0f30829c 0x00004007  //DDRSS_CTL_167_DATA
0x0f3082a0 0x00000000  //DDRSS_CTL_168_DATA
0x0f3082a4 0x00000000  //DDRSS_CTL_169_DATA
0x0f3082a8 0x00000000  //DDRSS_CTL_170_DATA
0x0f3082ac 0x00000000  //DDRSS_CTL_171_DATA
0x0f3082b0 0x00000000  //DDRSS_CTL_172_DATA
0x0f3082b4 0x00000000  //DDRSS_CTL_173_DATA
0x0f3082b8 0x01000000  //DDRSS_CTL_174_DATA
0x0f3082bc 0x00000000  //DDRSS_CTL_175_DATA
0x0f3082c0 0x00001500  //DDRSS_CTL_176_DATA
0x0f3082c4 0x0000100e  //DDRSS_CTL_177_DATA
0x0f3082c8 0x00000000  //DDRSS_CTL_178_DATA
0x0f3082cc 0x00000000  //DDRSS_CTL_179_DATA
0x0f3082d0 0x00000001  //DDRSS_CTL_180_DATA
0x0f3082d4 0x00000002  //DDRSS_CTL_181_DATA
0x0f3082d8 0x00000c00  //DDRSS_CTL_182_DATA
0x0f3082dc 0x00001000  //DDRSS_CTL_183_DATA
0x0f3082e0 0x00000c00  //DDRSS_CTL_184_DATA
0x0f3082e4 0x00001000  //DDRSS_CTL_185_DATA
0x0f3082e8 0x00000c00  //DDRSS_CTL_186_DATA
0x0f3082ec 0x00001000  //DDRSS_CTL_187_DATA
0x0f3082f0 0x00000000  //DDRSS_CTL_188_DATA
0x0f3082f4 0x00000000  //DDRSS_CTL_189_DATA
0x0f3082f8 0x00000000  //DDRSS_CTL_190_DATA
0x0f3082fc 0x00000000  //DDRSS_CTL_191_DATA
0x0f308300 0x00000000  //DDRSS_CTL_192_DATA
0x0f308304 0x00000000  //DDRSS_CTL_193_DATA
0x0f308308 0x00000000  //DDRSS_CTL_194_DATA
0x0f30830c 0x00000000  //DDRSS_CTL_195_DATA
0x0f308310 0x00000000  //DDRSS_CTL_196_DATA
0x0f308314 0x00000000  //DDRSS_CTL_197_DATA
0x0f308318 0x00000000  //DDRSS_CTL_198_DATA
0x0f30831c 0x00000000  //DDRSS_CTL_199_DATA
0x0f308320 0x00000000  //DDRSS_CTL_200_DATA
0x0f308324 0x00000000  //DDRSS_CTL_201_DATA
0x0f308328 0x00000000  //DDRSS_CTL_202_DATA
0x0f30832c 0x00000000  //DDRSS_CTL_203_DATA
0x0f308330 0x00041400  //DDRSS_CTL_204_DATA
0x0f308334 0x00000301  //DDRSS_CTL_205_DATA
0x0f308338 0x00000000  //DDRSS_CTL_206_DATA
0x0f30833c 0x00000414  //DDRSS_CTL_207_DATA
0x0f308340 0x00000301  //DDRSS_CTL_208_DATA
0x0f308344 0x00000000  //DDRSS_CTL_209_DATA
0x0f308348 0x00000414  //DDRSS_CTL_210_DATA
0x0f30834c 0x00000301  //DDRSS_CTL_211_DATA
0x0f308350 0x00000000  //DDRSS_CTL_212_DATA
0x0f308354 0x00000414  //DDRSS_CTL_213_DATA
0x0f308358 0x00000301  //DDRSS_CTL_214_DATA
0x0f30835c 0x00000000  //DDRSS_CTL_215_DATA
0x0f308360 0x00000414  //DDRSS_CTL_216_DATA
0x0f308364 0x00000301  //DDRSS_CTL_217_DATA
0x0f308368 0x00000000  //DDRSS_CTL_218_DATA
0x0f30836c 0x00000414  //DDRSS_CTL_219_DATA
0x0f308370 0x00000301  //DDRSS_CTL_220_DATA
0x0f308374 0x00000000  //DDRSS_CTL_221_DATA
0x0f308378 0x00000000  //DDRSS_CTL_222_DATA
0x0f30837c 0x00000000  //DDRSS_CTL_223_DATA
0x0f308380 0x00000000  //DDRSS_CTL_224_DATA
0x0f308384 0x00000000  //DDRSS_CTL_225_DATA
0x0f308388 0x00000000  //DDRSS_CTL_226_DATA
0x0f30838c 0x00000000  //DDRSS_CTL_227_DATA
0x0f308390 0x00000000  //DDRSS_CTL_228_DATA
0x0f308394 0x00000000  //DDRSS_CTL_229_DATA
0x0f308398 0x00000000  //DDRSS_CTL_230_DATA
0x0f30839c 0x00000000  //DDRSS_CTL_231_DATA
0x0f3083a0 0x00000000  //DDRSS_CTL_232_DATA
0x0f3083a4 0x00000000  //DDRSS_CTL_233_DATA
0x0f3083a8 0x00000000  //DDRSS_CTL_234_DATA
0x0f3083ac 0x00000000  //DDRSS_CTL_235_DATA
0x0f3083b0 0x00000401  //DDRSS_CTL_236_DATA
0x0f3083b4 0x00000401  //DDRSS_CTL_237_DATA
0x0f3083b8 0x00000401  //DDRSS_CTL_238_DATA
0x0f3083bc 0x00000401  //DDRSS_CTL_239_DATA
0x0f3083c0 0x00000401  //DDRSS_CTL_240_DATA
0x0f3083c4 0x00000401  //DDRSS_CTL_241_DATA
0x0f3083c8 0x00000493  //DDRSS_CTL_242_DATA
0x0f3083cc 0x00000493  //DDRSS_CTL_243_DATA
0x0f3083d0 0x00000493  //DDRSS_CTL_244_DATA
0x0f3083d4 0x00000493  //DDRSS_CTL_245_DATA
0x0f3083d8 0x00000493  //DDRSS_CTL_246_DATA
0x0f3083dc 0x00000493  //DDRSS_CTL_247_DATA
0x0f3083e0 0x00000000  //DDRSS_CTL_248_DATA
0x0f3083e4 0x00000000  //DDRSS_CTL_249_DATA
0x0f3083e8 0x00000000  //DDRSS_CTL_250_DATA
0x0f3083ec 0x00000000  //DDRSS_CTL_251_DATA
0x0f3083f0 0x00000000  //DDRSS_CTL_252_DATA
0x0f3083f4 0x00000000  //DDRSS_CTL_253_DATA
0x0f3083f8 0x00000000  //DDRSS_CTL_254_DATA
0x0f3083fc 0x00000000  //DDRSS_CTL_255_DATA
0x0f308400 0x00000000  //DDRSS_CTL_256_DATA
0x0f308404 0x00000000  //DDRSS_CTL_257_DATA
0x0f308408 0x00000000  //DDRSS_CTL_258_DATA
0x0f30840c 0x00000000  //DDRSS_CTL_259_DATA
0x0f308410 0x00000000  //DDRSS_CTL_260_DATA
0x0f308414 0x00000000  //DDRSS_CTL_261_DATA
0x0f308418 0x00000000  //DDRSS_CTL_262_DATA
0x0f30841c 0x00000000  //DDRSS_CTL_263_DATA
0x0f308420 0x00000000  //DDRSS_CTL_264_DATA
0x0f308424 0x00000000  //DDRSS_CTL_265_DATA
0x0f308428 0x00000000  //DDRSS_CTL_266_DATA
0x0f30842c 0x00000000  //DDRSS_CTL_267_DATA
0x0f308430 0x00000000  //DDRSS_CTL_268_DATA
0x0f308434 0x00000000  //DDRSS_CTL_269_DATA
0x0f308438 0x00000000  //DDRSS_CTL_270_DATA
0x0f30843c 0x00000000  //DDRSS_CTL_271_DATA
0x0f308440 0x00000000  //DDRSS_CTL_272_DATA
0x0f308444 0x00000000  //DDRSS_CTL_273_DATA
0x0f308448 0x00000000  //DDRSS_CTL_274_DATA
0x0f30844c 0x00000000  //DDRSS_CTL_275_DATA
0x0f308450 0x00000000  //DDRSS_CTL_276_DATA
0x0f308454 0x00010000  //DDRSS_CTL_277_DATA
0x0f308458 0x00000000  //DDRSS_CTL_278_DATA
0x0f30845c 0x00000100  //DDRSS_CTL_279_DATA
0x0f308460 0x00000000  //DDRSS_CTL_280_DATA
0x0f308464 0x00000101  //DDRSS_CTL_281_DATA
0x0f308468 0x00000000  //DDRSS_CTL_282_DATA
0x0f30846c 0x00000000  //DDRSS_CTL_283_DATA
0x0f308470 0x00000000  //DDRSS_CTL_284_DATA
0x0f308474 0x00000000  //DDRSS_CTL_285_DATA
0x0f308478 0x00000000  //DDRSS_CTL_286_DATA
0x0f30847c 0x00000000  //DDRSS_CTL_287_DATA
0x0f308480 0x00000000  //DDRSS_CTL_288_DATA
0x0f308484 0x00000000  //DDRSS_CTL_289_DATA
0x0f308488 0x0c181511  //DDRSS_CTL_290_DATA
0x0f30848c 0x00000304  //DDRSS_CTL_291_DATA
0x0f308490 0x00000000  //DDRSS_CTL_292_DATA
0x0f308494 0x00000000  //DDRSS_CTL_293_DATA
0x0f308498 0x00000000  //DDRSS_CTL_294_DATA
0x0f30849c 0x00000000  //DDRSS_CTL_295_DATA
0x0f3084a0 0x00000000  //DDRSS_CTL_296_DATA
0x0f3084a4 0x00000000  //DDRSS_CTL_297_DATA
0x0f3084a8 0x00000000  //DDRSS_CTL_298_DATA
0x0f3084ac 0x00000000  //DDRSS_CTL_299_DATA
0x0f3084b0 0x00000000  //DDRSS_CTL_300_DATA
0x0f3084b4 0x00000000  //DDRSS_CTL_301_DATA
0x0f3084b8 0x00000000  //DDRSS_CTL_302_DATA
0x0f3084bc 0x00000000  //DDRSS_CTL_303_DATA
0x0f3084c0 0x00000000  //DDRSS_CTL_304_DATA
0x0f3084c4 0x00040000  //DDRSS_CTL_305_DATA
0x0f3084c8 0x00800200  //DDRSS_CTL_306_DATA
0x0f3084cc 0x00000000  //DDRSS_CTL_307_DATA
0x0f3084d0 0x02000400  //DDRSS_CTL_308_DATA
0x0f3084d4 0x00000080  //DDRSS_CTL_309_DATA
0x0f3084d8 0x00040000  //DDRSS_CTL_310_DATA
0x0f3084dc 0x00800200  //DDRSS_CTL_311_DATA
0x0f3084e0 0x00000000  //DDRSS_CTL_312_DATA
0x0f3084e4 0x00000000  //DDRSS_CTL_313_DATA
0x0f3084e8 0x00000000  //DDRSS_CTL_314_DATA
0x0f3084ec 0x00000100  //DDRSS_CTL_315_DATA
0x0f3084f0 0x00000000  //DDRSS_CTL_316_DATA
0x0f3084f4 0x00000101  //DDRSS_CTL_317_DATA
0x0f3084f8 0x3fff0000  //DDRSS_CTL_318_DATA
0x0f3084fc 0x000fff00  //DDRSS_CTL_319_DATA
0x0f308500 0xffffffff  //DDRSS_CTL_320_DATA
0x0f308504 0x00ffff00  //DDRSS_CTL_321_DATA
0x0f308508 0x0a000000  //DDRSS_CTL_322_DATA
0x0f30850c 0x0001ffff  //DDRSS_CTL_323_DATA
0x0f308510 0x01010101  //DDRSS_CTL_324_DATA
0x0f308514 0x01010101  //DDRSS_CTL_325_DATA
0x0f308518 0x00000118  //DDRSS_CTL_326_DATA
0x0f30851c 0x01000c01  //DDRSS_CTL_327_DATA
0x0f308520 0x00000001  //DDRSS_CTL_328_DATA
0x0f308524 0x00000000  //DDRSS_CTL_329_DATA
0x0f308528 0x00000000  //DDRSS_CTL_330_DATA
0x0f30852c 0x01000000  //DDRSS_CTL_331_DATA
0x0f308530 0x00000000  //DDRSS_CTL_332_DATA
0x0f308534 0x00010000  //DDRSS_CTL_333_DATA
0x0f308538 0x00000000  //DDRSS_CTL_334_DATA
0x0f30853c 0x00000000  //DDRSS_CTL_335_DATA
0x0f308540 0x00000000  //DDRSS_CTL_336_DATA
0x0f308544 0x00000000  //DDRSS_CTL_337_DATA
0x0f308548 0x00000000  //DDRSS_CTL_338_DATA
0x0f30854c 0x00000000  //DDRSS_CTL_339_DATA
0x0f308550 0x00000000  //DDRSS_CTL_340_DATA
0x0f308554 0x00000000  //DDRSS_CTL_341_DATA
0x0f308558 0x00000000  //DDRSS_CTL_342_DATA
0x0f30855c 0x00000000  //DDRSS_CTL_343_DATA
0x0f308560 0x00000000  //DDRSS_CTL_344_DATA
0x0f308564 0x00000000  //DDRSS_CTL_345_DATA
0x0f308568 0x00000000  //DDRSS_CTL_346_DATA
0x0f30856c 0x00000000  //DDRSS_CTL_347_DATA
0x0f308570 0x00000000  //DDRSS_CTL_348_DATA
0x0f308574 0x00000000  //DDRSS_CTL_349_DATA
0x0f308578 0x00000000  //DDRSS_CTL_350_DATA
0x0f30857c 0x00000000  //DDRSS_CTL_351_DATA
0x0f308580 0x00000000  //DDRSS_CTL_352_DATA
0x0f308584 0x00000000  //DDRSS_CTL_353_DATA
0x0f308588 0x00000000  //DDRSS_CTL_354_DATA
0x0f30858c 0x00000000  //DDRSS_CTL_355_DATA
0x0f308590 0x00000000  //DDRSS_CTL_356_DATA
0x0f308594 0x00000000  //DDRSS_CTL_357_DATA
0x0f308598 0x00000000  //DDRSS_CTL_358_DATA
0x0f30859c 0x00000000  //DDRSS_CTL_359_DATA
0x0f3085a0 0x00000000  //DDRSS_CTL_360_DATA
0x0f3085a4 0x00000000  //DDRSS_CTL_361_DATA
0x0f3085a8 0x00000000  //DDRSS_CTL_362_DATA
0x0f3085ac 0x00000000  //DDRSS_CTL_363_DATA
0x0f3085b0 0x00000000  //DDRSS_CTL_364_DATA
0x0f3085b4 0x00000000  //DDRSS_CTL_365_DATA
0x0f3085b8 0x00000000  //DDRSS_CTL_366_DATA
0x0f3085bc 0x00000000  //DDRSS_CTL_367_DATA
0x0f3085c0 0x00000000  //DDRSS_CTL_368_DATA
0x0f3085c4 0x00000000  //DDRSS_CTL_369_DATA
0x0f3085c8 0x0c000000  //DDRSS_CTL_370_DATA
0x0f3085cc 0x060c0606  //DDRSS_CTL_371_DATA
0x0f3085d0 0x06060c06  //DDRSS_CTL_372_DATA
0x0f3085d4 0x00010101  //DDRSS_CTL_373_DATA
0x0f3085d8 0x02000000  //DDRSS_CTL_374_DATA
0x0f3085dc 0x03020101  //DDRSS_CTL_375_DATA
0x0f3085e0 0x00000303  //DDRSS_CTL_376_DATA
0x0f3085e4 0x02020200  //DDRSS_CTL_377_DATA
0x0f3085e8 0x02020202  //DDRSS_CTL_378_DATA
0x0f3085ec 0x02020202  //DDRSS_CTL_379_DATA
0x0f3085f0 0x02020202  //DDRSS_CTL_380_DATA
0x0f3085f4 0x00000000  //DDRSS_CTL_381_DATA
0x0f3085f8 0x00000000  //DDRSS_CTL_382_DATA
0x0f3085fc 0x04000100  //DDRSS_CTL_383_DATA
0x0f308600 0x1e000304  //DDRSS_CTL_384_DATA
0x0f308604 0x000030c0  //DDRSS_CTL_385_DATA
0x0f308608 0x00000200  //DDRSS_CTL_386_DATA
0x0f30860c 0x00000200  //DDRSS_CTL_387_DATA
0x0f308610 0x00000200  //DDRSS_CTL_388_DATA
0x0f308614 0x00000200  //DDRSS_CTL_389_DATA
0x0f308618 0x0000db60  //DDRSS_CTL_390_DATA
0x0f30861c 0x0001e780  //DDRSS_CTL_391_DATA
0x0f308620 0x0a0b0302  //DDRSS_CTL_392_DATA
0x0f308624 0x001e090a  //DDRSS_CTL_393_DATA
0x0f308628 0x000030c0  //DDRSS_CTL_394_DATA
0x0f30862c 0x00000200  //DDRSS_CTL_395_DATA
0x0f308630 0x00000200  //DDRSS_CTL_396_DATA
0x0f308634 0x00000200  //DDRSS_CTL_397_DATA
0x0f308638 0x00000200  //DDRSS_CTL_398_DATA
0x0f30863c 0x0000db60  //DDRSS_CTL_399_DATA
0x0f308640 0x0001e780  //DDRSS_CTL_400_DATA
0x0f308644 0x0a0b0302  //DDRSS_CTL_401_DATA
0x0f308648 0x001e090a  //DDRSS_CTL_402_DATA
0x0f30864c 0x000030c0  //DDRSS_CTL_403_DATA
0x0f308650 0x00000200  //DDRSS_CTL_404_DATA
0x0f308654 0x00000200  //DDRSS_CTL_405_DATA
0x0f308658 0x00000200  //DDRSS_CTL_406_DATA
0x0f30865c 0x00000200  //DDRSS_CTL_407_DATA
0x0f308660 0x0000db60  //DDRSS_CTL_408_DATA
0x0f308664 0x0001e780  //DDRSS_CTL_409_DATA
0x0f308668 0x0a0b0302  //DDRSS_CTL_410_DATA
0x0f30866c 0x0000090a  //DDRSS_CTL_411_DATA
0x0f308670 0x00000000  //DDRSS_CTL_412_DATA
0x0f308674 0x0302000a  //DDRSS_CTL_413_DATA
0x0f308678 0x01000500  //DDRSS_CTL_414_DATA
0x0f30867c 0x01010001  //DDRSS_CTL_415_DATA
0x0f308680 0x00010001  //DDRSS_CTL_416_DATA
0x0f308684 0x01010001  //DDRSS_CTL_417_DATA
0x0f308688 0x02010000  //DDRSS_CTL_418_DATA
0x0f30868c 0x00000200  //DDRSS_CTL_419_DATA
0x0f308690 0x02000201  //DDRSS_CTL_420_DATA
0x0f308694 0x00000000  //DDRSS_CTL_421_DATA
0x0f308698 0x00202020  //DDRSS_CTL_422_DATA
0x0f30a000 0x00000a01  //DDRSS_PI_0_DATA
0x0f30a004 0xae8d79e2  //DDRSS_PI_1_DATA
0x0f30a008 0x0714b570  //DDRSS_PI_2_DATA
0x0f30a00c 0x01011387  //DDRSS_PI_3_DATA
0x0f30a010 0x00000001  //DDRSS_PI_4_DATA
0x0f30a014 0x00010064  //DDRSS_PI_5_DATA
0x0f30a018 0x00000000  //DDRSS_PI_6_DATA
0x0f30a01c 0x00000000  //DDRSS_PI_7_DATA
0x0f30a020 0x00000000  //DDRSS_PI_8_DATA
0x0f30a024 0x00000000  //DDRSS_PI_9_DATA
0x0f30a028 0x00000000  //DDRSS_PI_10_DATA
0x0f30a02c 0x00000000  //DDRSS_PI_11_DATA
0x0f30a030 0x00000000  //DDRSS_PI_12_DATA
0x0f30a034 0x00010001  //DDRSS_PI_13_DATA
0x0f30a038 0x00000000  //DDRSS_PI_14_DATA
0x0f30a03c 0x00010001  //DDRSS_PI_15_DATA
0x0f30a040 0x00000005  //DDRSS_PI_16_DATA
0x0f30a044 0x00010000  //DDRSS_PI_17_DATA
0x0f30a048 0x00000000  //DDRSS_PI_18_DATA
0x0f30a04c 0x00000000  //DDRSS_PI_19_DATA
0x0f30a050 0x00000000  //DDRSS_PI_20_DATA
0x0f30a054 0x00000000  //DDRSS_PI_21_DATA
0x0f30a058 0x00000000  //DDRSS_PI_22_DATA
0x0f30a05c 0x00000000  //DDRSS_PI_23_DATA
0x0f30a060 0x280d0001  //DDRSS_PI_24_DATA
0x0f30a064 0x00000000  //DDRSS_PI_25_DATA
0x0f30a068 0x00010000  //DDRSS_PI_26_DATA
0x0f30a06c 0x00003200  //DDRSS_PI_27_DATA
0x0f30a070 0x00000000  //DDRSS_PI_28_DATA
0x0f30a074 0x00000000  //DDRSS_PI_29_DATA
0x0f30a078 0x00060602  //DDRSS_PI_30_DATA
0x0f30a07c 0x00000000  //DDRSS_PI_31_DATA
0x0f30a080 0x00000000  //DDRSS_PI_32_DATA
0x0f30a084 0x00000000  //DDRSS_PI_33_DATA
0x0f30a088 0x00000001  //DDRSS_PI_34_DATA
0x0f30a08c 0x00000055  //DDRSS_PI_35_DATA
0x0f30a090 0x000000aa  //DDRSS_PI_36_DATA
0x0f30a094 0x000000ad  //DDRSS_PI_37_DATA
0x0f30a098 0x00000052  //DDRSS_PI_38_DATA
0x0f30a09c 0x0000006a  //DDRSS_PI_39_DATA
0x0f30a0a0 0x00000095  //DDRSS_PI_40_DATA
0x0f30a0a4 0x00000095  //DDRSS_PI_41_DATA
0x0f30a0a8 0x000000ad  //DDRSS_PI_42_DATA
0x0f30a0ac 0x00000000  //DDRSS_PI_43_DATA
0x0f30a0b0 0x00000000  //DDRSS_PI_44_DATA
0x0f30a0b4 0x00010100  //DDRSS_PI_45_DATA
0x0f30a0b8 0x00000014  //DDRSS_PI_46_DATA
0x0f30a0bc 0x000007d0  //DDRSS_PI_47_DATA
0x0f30a0c0 0x00000300  //DDRSS_PI_48_DATA
0x0f30a0c4 0x00000000  //DDRSS_PI_49_DATA
0x0f30a0c8 0x00000000  //DDRSS_PI_50_DATA
0x0f30a0cc 0x01000000  //DDRSS_PI_51_DATA
0x0f30a0d0 0x00010101  //DDRSS_PI_52_DATA
0x0f30a0d4 0x0100090a  //DDRSS_PI_53_DATA
0x0f30a0d8 0x00000000  //DDRSS_PI_54_DATA
0x0f30a0dc 0x00010000  //DDRSS_PI_55_DATA
0x0f30a0e0 0x00000000  //DDRSS_PI_56_DATA
0x0f30a0e4 0x00000000  //DDRSS_PI_57_DATA
0x0f30a0e8 0x00000000  //DDRSS_PI_58_DATA
0x0f30a0ec 0x00000000  //DDRSS_PI_59_DATA
0x0f30a0f0 0x00001400  //DDRSS_PI_60_DATA
0x0f30a0f4 0x00000000  //DDRSS_PI_61_DATA
0x0f30a0f8 0x01000000  //DDRSS_PI_62_DATA
0x0f30a0fc 0x00000404  //DDRSS_PI_63_DATA
0x0f30a100 0x00000001  //DDRSS_PI_64_DATA
0x0f30a104 0x0001010e  //DDRSS_PI_65_DATA
0x0f30a108 0x02040100  //DDRSS_PI_66_DATA
0x0f30a10c 0x00010000  //DDRSS_PI_67_DATA
0x0f30a110 0x00000034  //DDRSS_PI_68_DATA
0x0f30a114 0x00000000  //DDRSS_PI_69_DATA
0x0f30a118 0x00000000  //DDRSS_PI_70_DATA
0x0f30a11c 0x00000000  //DDRSS_PI_71_DATA
0x0f30a120 0x00000000  //DDRSS_PI_72_DATA
0x0f30a124 0x00000000  //DDRSS_PI_73_DATA
0x0f30a128 0x00000000  //DDRSS_PI_74_DATA
0x0f30a12c 0x00000005  //DDRSS_PI_75_DATA
0x0f30a130 0x01000000  //DDRSS_PI_76_DATA
0x0f30a134 0x04010000  //DDRSS_PI_77_DATA
0x0f30a138 0x00020000  //DDRSS_PI_78_DATA
0x0f30a13c 0x00010002  //DDRSS_PI_79_DATA
0x0f30a140 0x00000001  //DDRSS_PI_80_DATA
0x0f30a144 0x00020001  //DDRSS_PI_81_DATA
0x0f30a148 0x00020002  //DDRSS_PI_82_DATA
0x0f30a14c 0x29c02000  //DDRSS_PI_83_DATA
0x0f30a150 0x00000000  //DDRSS_PI_84_DATA
0x0f30a154 0x00000000  //DDRSS_PI_85_DATA
0x0f30a158 0x00000000  //DDRSS_PI_86_DATA
0x0f30a15c 0x00000000  //DDRSS_PI_87_DATA
0x0f30a160 0x00000000  //DDRSS_PI_88_DATA
0x0f30a164 0x00000000  //DDRSS_PI_89_DATA
0x0f30a168 0x00000000  //DDRSS_PI_90_DATA
0x0f30a16c 0x00000300  //DDRSS_PI_91_DATA
0x0f30a170 0x0a090b0c  //DDRSS_PI_92_DATA
0x0f30a174 0x04060708  //DDRSS_PI_93_DATA
0x0f30a178 0x01000005  //DDRSS_PI_94_DATA
0x0f30a17c 0x00000800  //DDRSS_PI_95_DATA
0x0f30a180 0x00000000  //DDRSS_PI_96_DATA
0x0f30a184 0x00010008  //DDRSS_PI_97_DATA
0x0f30a188 0x00000000  //DDRSS_PI_98_DATA
0x0f30a18c 0x0000aa00  //DDRSS_PI_99_DATA
0x0f30a190 0x00000000  //DDRSS_PI_100_DATA
0x0f30a194 0x00010000  //DDRSS_PI_101_DATA
0x0f30a198 0x00000000  //DDRSS_PI_102_DATA
0x0f30a19c 0x00000000  //DDRSS_PI_103_DATA
0x0f30a1a0 0x00000000  //DDRSS_PI_104_DATA
0x0f30a1a4 0x00000000  //DDRSS_PI_105_DATA
0x0f30a1a8 0x00000000  //DDRSS_PI_106_DATA
0x0f30a1ac 0x00000000  //DDRSS_PI_107_DATA
0x0f30a1b0 0x00000000  //DDRSS_PI_108_DATA
0x0f30a1b4 0x00000000  //DDRSS_PI_109_DATA
0x0f30a1b8 0x00000000  //DDRSS_PI_110_DATA
0x0f30a1bc 0x00000000  //DDRSS_PI_111_DATA
0x0f30a1c0 0x00000000  //DDRSS_PI_112_DATA
0x0f30a1c4 0x00000000  //DDRSS_PI_113_DATA
0x0f30a1c8 0x00000000  //DDRSS_PI_114_DATA
0x0f30a1cc 0x00000000  //DDRSS_PI_115_DATA
0x0f30a1d0 0x00000000  //DDRSS_PI_116_DATA
0x0f30a1d4 0x00000000  //DDRSS_PI_117_DATA
0x0f30a1d8 0x00000000  //DDRSS_PI_118_DATA
0x0f30a1dc 0x00000000  //DDRSS_PI_119_DATA
0x0f30a1e0 0x00000000  //DDRSS_PI_120_DATA
0x0f30a1e4 0x00000000  //DDRSS_PI_121_DATA
0x0f30a1e8 0x00000000  //DDRSS_PI_122_DATA
0x0f30a1ec 0x00000000  //DDRSS_PI_123_DATA
0x0f30a1f0 0x00000008  //DDRSS_PI_124_DATA
0x0f30a1f4 0x00000000  //DDRSS_PI_125_DATA
0x0f30a1f8 0x00000000  //DDRSS_PI_126_DATA
0x0f30a1fc 0x00000000  //DDRSS_PI_127_DATA
0x0f30a200 0x00000000  //DDRSS_PI_128_DATA
0x0f30a204 0x00000000  //DDRSS_PI_129_DATA
0x0f30a208 0x00000000  //DDRSS_PI_130_DATA
0x0f30a20c 0x00000000  //DDRSS_PI_131_DATA
0x0f30a210 0x00000000  //DDRSS_PI_132_DATA
0x0f30a214 0x00010100  //DDRSS_PI_133_DATA
0x0f30a218 0x00000000  //DDRSS_PI_134_DATA
0x0f30a21c 0x00000000  //DDRSS_PI_135_DATA
0x0f30a220 0x00027100  //DDRSS_PI_136_DATA
0x0f30a224 0x00061a80  //DDRSS_PI_137_DATA
0x0f30a228 0x00000100  //DDRSS_PI_138_DATA
0x0f30a22c 0x00000000  //DDRSS_PI_139_DATA
0x0f30a230 0x00000000  //DDRSS_PI_140_DATA
0x0f30a234 0x00000000  //DDRSS_PI_141_DATA
0x0f30a238 0x00000000  //DDRSS_PI_142_DATA
0x0f30a23c 0x00000000  //DDRSS_PI_143_DATA
0x0f30a240 0x01000000  //DDRSS_PI_144_DATA
0x0f30a244 0xc1010003  //DDRSS_PI_145_DATA
0x0f30a248 0x02000101  //DDRSS_PI_146_DATA
0x0f30a24c 0x01030101  //DDRSS_PI_147_DATA
0x0f30a250 0x00010400  //DDRSS_PI_148_DATA
0x0f30a254 0x06000105  //DDRSS_PI_149_DATA
0x0f30a258 0x01070001  //DDRSS_PI_150_DATA
0x0f30a25c 0x00000000  //DDRSS_PI_151_DATA
0x0f30a260 0x00000000  //DDRSS_PI_152_DATA
0x0f30a264 0x00000001  //DDRSS_PI_153_DATA
0x0f30a268 0x00010000  //DDRSS_PI_154_DATA
0x0f30a26c 0x00000000  //DDRSS_PI_155_DATA
0x0f30a270 0x00000000  //DDRSS_PI_156_DATA
0x0f30a274 0x00000000  //DDRSS_PI_157_DATA
0x0f30a278 0x00000000  //DDRSS_PI_158_DATA
0x0f30a27c 0x00010000  //DDRSS_PI_159_DATA
0x0f30a280 0x00000004  //DDRSS_PI_160_DATA
0x0f30a284 0x00000000  //DDRSS_PI_161_DATA
0x0f30a288 0x00000000  //DDRSS_PI_162_DATA
0x0f30a28c 0x00000000  //DDRSS_PI_163_DATA
0x0f30a290 0x00007800  //DDRSS_PI_164_DATA
0x0f30a294 0x00780078  //DDRSS_PI_165_DATA
0x0f30a298 0x00141414  //DDRSS_PI_166_DATA
0x0f30a29c 0x00000038  //DDRSS_PI_167_DATA
0x0f30a2a0 0x00000038  //DDRSS_PI_168_DATA
0x0f30a2a4 0x00040038  //DDRSS_PI_169_DATA
0x0f30a2a8 0x04000400  //DDRSS_PI_170_DATA
0x0f30a2ac 0x68040009  //DDRSS_PI_171_DATA
0x0f30a2b0 0x04000918  //DDRSS_PI_172_DATA
0x0f30a2b4 0x00091868  //DDRSS_PI_173_DATA
0x0f30a2b8 0x00186804  //DDRSS_PI_174_DATA
0x0f30a2bc 0x00000118  //DDRSS_PI_175_DATA
0x0f30a2c0 0x00001860  //DDRSS_PI_176_DATA
0x0f30a2c4 0x00000118  //DDRSS_PI_177_DATA
0x0f30a2c8 0x00001860  //DDRSS_PI_178_DATA
0x0f30a2cc 0x00000118  //DDRSS_PI_179_DATA
0x0f30a2d0 0x04001860  //DDRSS_PI_180_DATA
0x0f30a2d4 0x01010404  //DDRSS_PI_181_DATA
0x0f30a2d8 0x00001901  //DDRSS_PI_182_DATA
0x0f30a2dc 0x00190019  //DDRSS_PI_183_DATA
0x0f30a2e0 0x010c010c  //DDRSS_PI_184_DATA
0x0f30a2e4 0x0000010c  //DDRSS_PI_185_DATA
0x0f30a2e8 0x00000000  //DDRSS_PI_186_DATA
0x0f30a2ec 0x03000000  //DDRSS_PI_187_DATA
0x0f30a2f0 0x01010303  //DDRSS_PI_188_DATA
0x0f30a2f4 0x01010101  //DDRSS_PI_189_DATA
0x0f30a2f8 0x00181818  //DDRSS_PI_190_DATA
0x0f30a2fc 0x00000000  //DDRSS_PI_191_DATA
0x0f30a300 0x00000000  //DDRSS_PI_192_DATA
0x0f30a304 0x0b000000  //DDRSS_PI_193_DATA
0x0f30a308 0x0a0a0b0b  //DDRSS_PI_194_DATA
0x0f30a30c 0x0303030a  //DDRSS_PI_195_DATA
0x0f30a310 0x00000000  //DDRSS_PI_196_DATA
0x0f30a314 0x00000000  //DDRSS_PI_197_DATA
0x0f30a318 0x00000000  //DDRSS_PI_198_DATA
0x0f30a31c 0x00000000  //DDRSS_PI_199_DATA
0x0f30a320 0x00000000  //DDRSS_PI_200_DATA
0x0f30a324 0x00000000  //DDRSS_PI_201_DATA
0x0f30a328 0x00000000  //DDRSS_PI_202_DATA
0x0f30a32c 0x00000000  //DDRSS_PI_203_DATA
0x0f30a330 0x00000000  //DDRSS_PI_204_DATA
0x0f30a334 0x00000000  //DDRSS_PI_205_DATA
0x0f30a338 0x00000000  //DDRSS_PI_206_DATA
0x0f30a33c 0x00000000  //DDRSS_PI_207_DATA
0x0f30a340 0x00000000  //DDRSS_PI_208_DATA
0x0f30a344 0x0d090000  //DDRSS_PI_209_DATA
0x0f30a348 0x0d09000d  //DDRSS_PI_210_DATA
0x0f30a34c 0x0d09000d  //DDRSS_PI_211_DATA
0x0f30a350 0x0000000d  //DDRSS_PI_212_DATA
0x0f30a354 0x00000000  //DDRSS_PI_213_DATA
0x0f30a358 0x00000000  //DDRSS_PI_214_DATA
0x0f30a35c 0x00000000  //DDRSS_PI_215_DATA
0x0f30a360 0x00000000  //DDRSS_PI_216_DATA
0x0f30a364 0x16000000  //DDRSS_PI_217_DATA
0x0f30a368 0x001600c8  //DDRSS_PI_218_DATA
0x0f30a36c 0x001600c8  //DDRSS_PI_219_DATA
0x0f30a370 0x010100c8  //DDRSS_PI_220_DATA
0x0f30a374 0x00001b01  //DDRSS_PI_221_DATA
0x0f30a378 0x1f0f0051  //DDRSS_PI_222_DATA
0x0f30a37c 0x03000001  //DDRSS_PI_223_DATA
0x0f30a380 0x001b0a0b  //DDRSS_PI_224_DATA
0x0f30a384 0x1f0f0051  //DDRSS_PI_225_DATA
0x0f30a388 0x03000001  //DDRSS_PI_226_DATA
0x0f30a38c 0x001b0a0b  //DDRSS_PI_227_DATA
0x0f30a390 0x1f0f0051  //DDRSS_PI_228_DATA
0x0f30a394 0x03000001  //DDRSS_PI_229_DATA
0x0f30a398 0x00000a0b  //DDRSS_PI_230_DATA
0x0f30a39c 0x0d0b0700  //DDRSS_PI_231_DATA
0x0f30a3a0 0x000d0605  //DDRSS_PI_232_DATA
0x0f30a3a4 0x0000c570  //DDRSS_PI_233_DATA
0x0f30a3a8 0x0000000d  //DDRSS_PI_234_DATA
0x0f30a3ac 0x180a0800  //DDRSS_PI_235_DATA
0x0f30a3b0 0x0b071c1c  //DDRSS_PI_236_DATA
0x0f30a3b4 0x0d06050d  //DDRSS_PI_237_DATA
0x0f30a3b8 0x0000c570  //DDRSS_PI_238_DATA
0x0f30a3bc 0x0000000d  //DDRSS_PI_239_DATA
0x0f30a3c0 0x180a0800  //DDRSS_PI_240_DATA
0x0f30a3c4 0x0b071c1c  //DDRSS_PI_241_DATA
0x0f30a3c8 0x0d06050d  //DDRSS_PI_242_DATA
0x0f30a3cc 0x0000c570  //DDRSS_PI_243_DATA
0x0f30a3d0 0x0000000d  //DDRSS_PI_244_DATA
0x0f30a3d4 0x180a0800  //DDRSS_PI_245_DATA
0x0f30a3d8 0x00001c1c  //DDRSS_PI_246_DATA
0x0f30a3dc 0x000030c0  //DDRSS_PI_247_DATA
0x0f30a3e0 0x0001e780  //DDRSS_PI_248_DATA
0x0f30a3e4 0x000030c0  //DDRSS_PI_249_DATA
0x0f30a3e8 0x0001e780  //DDRSS_PI_250_DATA
0x0f30a3ec 0x000030c0  //DDRSS_PI_251_DATA
0x0f30a3f0 0x0001e780  //DDRSS_PI_252_DATA
0x0f30a3f4 0x02550255  //DDRSS_PI_253_DATA
0x0f30a3f8 0x03030255  //DDRSS_PI_254_DATA
0x0f30a3fc 0x00025503  //DDRSS_PI_255_DATA
0x0f30a400 0x02550255  //DDRSS_PI_256_DATA
0x0f30a404 0x0c080c08  //DDRSS_PI_257_DATA
0x0f30a408 0x00000c08  //DDRSS_PI_258_DATA
0x0f30a40c 0x000890b8  //DDRSS_PI_259_DATA
0x0f30a410 0x00000000  //DDRSS_PI_260_DATA
0x0f30a414 0x00000000  //DDRSS_PI_261_DATA
0x0f30a418 0x00000000  //DDRSS_PI_262_DATA
0x0f30a41c 0x00000120  //DDRSS_PI_263_DATA
0x0f30a420 0x000890b8  //DDRSS_PI_264_DATA
0x0f30a424 0x00000000  //DDRSS_PI_265_DATA
0x0f30a428 0x00000000  //DDRSS_PI_266_DATA
0x0f30a42c 0x00000000  //DDRSS_PI_267_DATA
0x0f30a430 0x00000120  //DDRSS_PI_268_DATA
0x0f30a434 0x000890b8  //DDRSS_PI_269_DATA
0x0f30a438 0x00000000  //DDRSS_PI_270_DATA
0x0f30a43c 0x00000000  //DDRSS_PI_271_DATA
0x0f30a440 0x00000000  //DDRSS_PI_272_DATA
0x0f30a444 0x02000120  //DDRSS_PI_273_DATA
0x0f30a448 0x00000080  //DDRSS_PI_274_DATA
0x0f30a44c 0x00020000  //DDRSS_PI_275_DATA
0x0f30a450 0x00000080  //DDRSS_PI_276_DATA
0x0f30a454 0x00020000  //DDRSS_PI_277_DATA
0x0f30a458 0x00000080  //DDRSS_PI_278_DATA
0x0f30a45c 0x00000000  //DDRSS_PI_279_DATA
0x0f30a460 0x00000000  //DDRSS_PI_280_DATA
0x0f30a464 0x00040404  //DDRSS_PI_281_DATA
0x0f30a468 0x00000000  //DDRSS_PI_282_DATA
0x0f30a46c 0x02010102  //DDRSS_PI_283_DATA
0x0f30a470 0x67676767  //DDRSS_PI_284_DATA
0x0f30a474 0x00000202  //DDRSS_PI_285_DATA
0x0f30a478 0x00000000  //DDRSS_PI_286_DATA
0x0f30a47c 0x00000000  //DDRSS_PI_287_DATA
0x0f30a480 0x00000000  //DDRSS_PI_288_DATA
0x0f30a484 0x00000000  //DDRSS_PI_289_DATA
0x0f30a488 0x00000000  //DDRSS_PI_290_DATA
0x0f30a48c 0x0d100f00  //DDRSS_PI_291_DATA
0x0f30a490 0x0003020e  //DDRSS_PI_292_DATA
0x0f30a494 0x00000001  //DDRSS_PI_293_DATA
0x0f30a498 0x01000000  //DDRSS_PI_294_DATA
0x0f30a49c 0x00020201  //DDRSS_PI_295_DATA
0x0f30a4a0 0x00000000  //DDRSS_PI_296_DATA
0x0f30a4a4 0x00000414  //DDRSS_PI_297_DATA
0x0f30a4a8 0x00000301  //DDRSS_PI_298_DATA
0x0f30a4ac 0x00000000  //DDRSS_PI_299_DATA
0x0f30a4b0 0x00000000  //DDRSS_PI_300_DATA
0x0f30a4b4 0x00000000  //DDRSS_PI_301_DATA
0x0f30a4b8 0x00000401  //DDRSS_PI_302_DATA
0x0f30a4bc 0x00000493  //DDRSS_PI_303_DATA
0x0f30a4c0 0x00000000  //DDRSS_PI_304_DATA
0x0f30a4c4 0x00000414  //DDRSS_PI_305_DATA
0x0f30a4c8 0x00000301  //DDRSS_PI_306_DATA
0x0f30a4cc 0x00000000  //DDRSS_PI_307_DATA
0x0f30a4d0 0x00000000  //DDRSS_PI_308_DATA
0x0f30a4d4 0x00000000  //DDRSS_PI_309_DATA
0x0f30a4d8 0x00000401  //DDRSS_PI_310_DATA
0x0f30a4dc 0x00000493  //DDRSS_PI_311_DATA
0x0f30a4e0 0x00000000  //DDRSS_PI_312_DATA
0x0f30a4e4 0x00000414  //DDRSS_PI_313_DATA
0x0f30a4e8 0x00000301  //DDRSS_PI_314_DATA
0x0f30a4ec 0x00000000  //DDRSS_PI_315_DATA
0x0f30a4f0 0x00000000  //DDRSS_PI_316_DATA
0x0f30a4f4 0x00000000  //DDRSS_PI_317_DATA
0x0f30a4f8 0x00000401  //DDRSS_PI_318_DATA
0x0f30a4fc 0x00000493  //DDRSS_PI_319_DATA
0x0f30a500 0x00000000  //DDRSS_PI_320_DATA
0x0f30a504 0x00000414  //DDRSS_PI_321_DATA
0x0f30a508 0x00000301  //DDRSS_PI_322_DATA
0x0f30a50c 0x00000000  //DDRSS_PI_323_DATA
0x0f30a510 0x00000000  //DDRSS_PI_324_DATA
0x0f30a514 0x00000000  //DDRSS_PI_325_DATA
0x0f30a518 0x00000401  //DDRSS_PI_326_DATA
0x0f30a51c 0x00000493  //DDRSS_PI_327_DATA
0x0f30a520 0x00000000  //DDRSS_PI_328_DATA
0x0f30a524 0x00000414  //DDRSS_PI_329_DATA
0x0f30a528 0x00000301  //DDRSS_PI_330_DATA
0x0f30a52c 0x00000000  //DDRSS_PI_331_DATA
0x0f30a530 0x00000000  //DDRSS_PI_332_DATA
0x0f30a534 0x00000000  //DDRSS_PI_333_DATA
0x0f30a538 0x00000401  //DDRSS_PI_334_DATA
0x0f30a53c 0x00000493  //DDRSS_PI_335_DATA
0x0f30a540 0x00000000  //DDRSS_PI_336_DATA
0x0f30a544 0x00000414  //DDRSS_PI_337_DATA
0x0f30a548 0x00000301  //DDRSS_PI_338_DATA
0x0f30a54c 0x00000000  //DDRSS_PI_339_DATA
0x0f30a550 0x00000000  //DDRSS_PI_340_DATA
0x0f30a554 0x00000000  //DDRSS_PI_341_DATA
0x0f30a558 0x00000401  //DDRSS_PI_342_DATA
0x0f30a55c 0x00000493  //DDRSS_PI_343_DATA
0x0f30a560 0x00000000  //DDRSS_PI_344_DATA
0x0f30c000 0x04c00000  //DDRSS_PHY_0_DATA_F0
0x0f30c004 0x00000000  //DDRSS_PHY_1_DATA_F0
0x0f30c008 0x00000200  //DDRSS_PHY_2_DATA_F0
0x0f30c00c 0x00000000  //DDRSS_PHY_3_DATA_F0
0x0f30c010 0x00000000  //DDRSS_PHY_4_DATA_F0
0x0f30c014 0x00000000  //DDRSS_PHY_5_DATA_F0
0x0f30c018 0x00000000  //DDRSS_PHY_6_DATA_F0
0x0f30c01c 0x00000000  //DDRSS_PHY_7_DATA_F0
0x0f30c020 0x00000001  //DDRSS_PHY_8_DATA_F0
0x0f30c024 0x00000000  //DDRSS_PHY_9_DATA_F0
0x0f30c028 0x016c0000  //DDRSS_PHY_10_DATA_F0
0x0f30c02c 0x010101ff  //DDRSS_PHY_11_DATA_F0
0x0f30c030 0x00010000  //DDRSS_PHY_12_DATA_F0
0x0f30c034 0x00c03c04  //DDRSS_PHY_13_DATA_F0
0x0f30c038 0x00cc0008  //DDRSS_PHY_14_DATA_F0
0x0f30c03c 0x00660201  //DDRSS_PHY_15_DATA_F0
0x0f30c040 0x00000000  //DDRSS_PHY_16_DATA_F0
0x0f30c044 0x00000000  //DDRSS_PHY_17_DATA_F0
0x0f30c048 0x00000000  //DDRSS_PHY_18_DATA_F0
0x0f30c04c 0x0000aaaa  //DDRSS_PHY_19_DATA_F0
0x0f30c050 0x00005555  //DDRSS_PHY_20_DATA_F0
0x0f30c054 0x0000b5b5  //DDRSS_PHY_21_DATA_F0
0x0f30c058 0x00004a4a  //DDRSS_PHY_22_DATA_F0
0x0f30c05c 0x00005656  //DDRSS_PHY_23_DATA_F0
0x0f30c060 0x0000a9a9  //DDRSS_PHY_24_DATA_F0
0x0f30c064 0x0000b7b7  //DDRSS_PHY_25_DATA_F0
0x0f30c068 0x00004848  //DDRSS_PHY_26_DATA_F0
0x0f30c06c 0x00000000  //DDRSS_PHY_27_DATA_F0
0x0f30c070 0x00000000  //DDRSS_PHY_28_DATA_F0
0x0f30c074 0x08000000  //DDRSS_PHY_29_DATA_F0
0x0f30c078 0x0f000008  //DDRSS_PHY_30_DATA_F0
0x0f30c07c 0x00000f0f  //DDRSS_PHY_31_DATA_F0
0x0f30c080 0x00e4e400  //DDRSS_PHY_32_DATA_F0
0x0f30c084 0x00070820  //DDRSS_PHY_33_DATA_F0
0x0f30c088 0x000c0020  //DDRSS_PHY_34_DATA_F0
0x0f30c08c 0x00062000  //DDRSS_PHY_35_DATA_F0
0x0f30c090 0x00000000  //DDRSS_PHY_36_DATA_F0
0x0f30c094 0x55555555  //DDRSS_PHY_37_DATA_F0
0x0f30c098 0xaaaaaaaa  //DDRSS_PHY_38_DATA_F0
0x0f30c09c 0x55555555  //DDRSS_PHY_39_DATA_F0
0x0f30c0a0 0xaaaaaaaa  //DDRSS_PHY_40_DATA_F0
0x0f30c0a4 0x00005555  //DDRSS_PHY_41_DATA_F0
0x0f30c0a8 0x01000100  //DDRSS_PHY_42_DATA_F0
0x0f30c0ac 0x00800180  //DDRSS_PHY_43_DATA_F0
0x0f30c0b0 0x00000000  //DDRSS_PHY_44_DATA_F0
0x0f30c0b4 0x00100000  //DDRSS_PHY_45_DATA_F0
0x0f30c0b8 0x00000000  //DDRSS_PHY_46_DATA_F0
0x0f30c0bc 0x1909000d  //DDRSS_PHY_47_DATA_F0
0x0f30c0c0 0x0000000f  //DDRSS_PHY_48_DATA_F0
0x0f30c0c4 0x00010100  //DDRSS_PHY_49_DATA_F0
0x0f30c0c8 0x00540048  //DDRSS_PHY_50_DATA_F0
0x0f30c0cc 0x00000fff  //DDRSS_PHY_51_DATA_F0
0x0f30c0d0 0x00000000  //DDRSS_PHY_52_DATA_F0
0x0f30c0d4 0x02b802ac  //DDRSS_PHY_53_DATA_F0
0x0f30c0d8 0x00000030  //DDRSS_PHY_54_DATA_F0
0x0f30c0dc 0x012c0048  //DDRSS_PHY_55_DATA_F0
0x0f30c0e0 0x00000000  //DDRSS_PHY_56_DATA_F0
0x0f30c0e4 0x0c000000  //DDRSS_PHY_57_DATA_F0
0x0f30c0e8 0x07ff0000  //DDRSS_PHY_58_DATA_F0
0x0f30c0ec 0x00000000  //DDRSS_PHY_59_DATA_F0
0x0f30c0f0 0x00000000  //DDRSS_PHY_60_DATA_F0
0x0f30c0f4 0x00000000  //DDRSS_PHY_61_DATA_F0
0x0f30c0f8 0x00000000  //DDRSS_PHY_62_DATA_F0
0x0f30c0fc 0x00000000  //DDRSS_PHY_63_DATA_F0
0x0f30c100 0x00000000  //DDRSS_PHY_64_DATA_F0
0x0f30c104 0x00000004  //DDRSS_PHY_65_DATA_F0
0x0f30c108 0x00000000  //DDRSS_PHY_66_DATA_F0
0x0f30c10c 0x00000000  //DDRSS_PHY_67_DATA_F0
0x0f30c110 0x00000000  //DDRSS_PHY_68_DATA_F0
0x0f30c114 0x00000000  //DDRSS_PHY_69_DATA_F0
0x0f30c118 0x00000000  //DDRSS_PHY_70_DATA_F0
0x0f30c11c 0x00000000  //DDRSS_PHY_71_DATA_F0
0x0f30c120 0x041f07ff  //DDRSS_PHY_72_DATA_F0
0x0f30c124 0x00000000  //DDRSS_PHY_73_DATA_F0
0x0f30c128 0x01ccb001  //DDRSS_PHY_74_DATA_F0
0x0f30c12c 0x2000ccb0  //DDRSS_PHY_75_DATA_F0
0x0f30c130 0x20000140  //DDRSS_PHY_76_DATA_F0
0x0f30c134 0x07ff0200  //DDRSS_PHY_77_DATA_F0
0x0f30c138 0x0000dd01  //DDRSS_PHY_78_DATA_F0
0x0f30c13c 0x10100303  //DDRSS_PHY_79_DATA_F0
0x0f30c140 0x10101010  //DDRSS_PHY_80_DATA_F0
0x0f30c144 0x10101010  //DDRSS_PHY_81_DATA_F0
0x0f30c148 0x00021010  //DDRSS_PHY_82_DATA_F0
0x0f30c14c 0x00100010  //DDRSS_PHY_83_DATA_F0
0x0f30c150 0x00100010  //DDRSS_PHY_84_DATA_F0
0x0f30c154 0x00100010  //DDRSS_PHY_85_DATA_F0
0x0f30c158 0x00100010  //DDRSS_PHY_86_DATA_F0
0x0f30c15c 0x02020010  //DDRSS_PHY_87_DATA_F0
0x0f30c160 0x51515041  //DDRSS_PHY_88_DATA_F0
0x0f30c164 0x31804000  //DDRSS_PHY_89_DATA_F0
0x0f30c168 0x04bc0340  //DDRSS_PHY_90_DATA_F0
0x0f30c16c 0x01008080  //DDRSS_PHY_91_DATA_F0
0x0f30c170 0x04050000  //DDRSS_PHY_92_DATA_F0
0x0f30c174 0x00000504  //DDRSS_PHY_93_DATA_F0
0x0f30c178 0x42100010  //DDRSS_PHY_94_DATA_F0
0x0f30c17c 0x010c053e  //DDRSS_PHY_95_DATA_F0
0x0f30c180 0x000f0c14  //DDRSS_PHY_96_DATA_F0
0x0f30c184 0x01000140  //DDRSS_PHY_97_DATA_F0
0x0f30c188 0x007a0120  //DDRSS_PHY_98_DATA_F0
0x0f30c18c 0x00000c00  //DDRSS_PHY_99_DATA_F0
0x0f30c190 0x000001cc  //DDRSS_PHY_100_DATA_F0
0x0f30c194 0x20100200  //DDRSS_PHY_101_DATA_F0
0x0f30c198 0x00000005  //DDRSS_PHY_102_DATA_F0
0x0f30c19c 0x76543210  //DDRSS_PHY_103_DATA_F0
0x0f30c1a0 0x00000008  //DDRSS_PHY_104_DATA_F0
0x0f30c1a4 0x02800280  //DDRSS_PHY_105_DATA_F0
0x0f30c1a8 0x02800280  //DDRSS_PHY_106_DATA_F0
0x0f30c1ac 0x02800280  //DDRSS_PHY_107_DATA_F0
0x0f30c1b0 0x02800280  //DDRSS_PHY_108_DATA_F0
0x0f30c1b4 0x004e0280  //DDRSS_PHY_109_DATA_F0
0x0f30c1b8 0x0000ba00  //DDRSS_PHY_110_DATA_F0
0x0f30c1bc 0x00ba00ae  //DDRSS_PHY_111_DATA_F0
0x0f30c1c0 0x00ae00ae  //DDRSS_PHY_112_DATA_F0
0x0f30c1c4 0x00ba00a2  //DDRSS_PHY_113_DATA_F0
0x0f30c1c8 0x00ba00ae  //DDRSS_PHY_114_DATA_F0
0x0f30c1cc 0x00ae00ae  //DDRSS_PHY_115_DATA_F0
0x0f30c1d0 0x00ae00a2  //DDRSS_PHY_116_DATA_F0
0x0f30c1d4 0x00ae00a2  //DDRSS_PHY_117_DATA_F0
0x0f30c1d8 0x00ba00a2  //DDRSS_PHY_118_DATA_F0
0x0f30c1dc 0x01b200ae  //DDRSS_PHY_119_DATA_F0
0x0f30c1e0 0x01000000  //DDRSS_PHY_120_DATA_F0
0x0f30c1e4 0x00000000  //DDRSS_PHY_121_DATA_F0
0x0f30c1e8 0x00000000  //DDRSS_PHY_122_DATA_F0
0x0f30c1ec 0x00080200  //DDRSS_PHY_123_DATA_F0
0x0f30c1f0 0x00000000  //DDRSS_PHY_124_DATA_F0
0x0f30c1f4 0x00000000  //DDRSS_PHY_125_DATA_F0
0x0f30c400 0x04c00000  //DDRSS_PHY_256_DATA_F0
0x0f30c404 0x00000000  //DDRSS_PHY_257_DATA_F0
0x0f30c408 0x00000200  //DDRSS_PHY_258_DATA_F0
0x0f30c40c 0x00000000  //DDRSS_PHY_259_DATA_F0
0x0f30c410 0x00000000  //DDRSS_PHY_260_DATA_F0
0x0f30c414 0x00000000  //DDRSS_PHY_261_DATA_F0
0x0f30c418 0x00000000  //DDRSS_PHY_262_DATA_F0
0x0f30c41c 0x00000000  //DDRSS_PHY_263_DATA_F0
0x0f30c420 0x00000001  //DDRSS_PHY_264_DATA_F0
0x0f30c424 0x00000000  //DDRSS_PHY_265_DATA_F0
0x0f30c428 0x016c0000  //DDRSS_PHY_266_DATA_F0
0x0f30c42c 0x010101ff  //DDRSS_PHY_267_DATA_F0
0x0f30c430 0x00010000  //DDRSS_PHY_268_DATA_F0
0x0f30c434 0x00c03c04  //DDRSS_PHY_269_DATA_F0
0x0f30c438 0x00cc0008  //DDRSS_PHY_270_DATA_F0
0x0f30c43c 0x00660201  //DDRSS_PHY_271_DATA_F0
0x0f30c440 0x00000000  //DDRSS_PHY_272_DATA_F0
0x0f30c444 0x00000000  //DDRSS_PHY_273_DATA_F0
0x0f30c448 0x00000000  //DDRSS_PHY_274_DATA_F0
0x0f30c44c 0x0000aaaa  //DDRSS_PHY_275_DATA_F0
0x0f30c450 0x00005555  //DDRSS_PHY_276_DATA_F0
0x0f30c454 0x0000b5b5  //DDRSS_PHY_277_DATA_F0
0x0f30c458 0x00004a4a  //DDRSS_PHY_278_DATA_F0
0x0f30c45c 0x00005656  //DDRSS_PHY_279_DATA_F0
0x0f30c460 0x0000a9a9  //DDRSS_PHY_280_DATA_F0
0x0f30c464 0x0000b7b7  //DDRSS_PHY_281_DATA_F0
0x0f30c468 0x00004848  //DDRSS_PHY_282_DATA_F0
0x0f30c46c 0x00000000  //DDRSS_PHY_283_DATA_F0
0x0f30c470 0x00000000  //DDRSS_PHY_284_DATA_F0
0x0f30c474 0x08000000  //DDRSS_PHY_285_DATA_F0
0x0f30c478 0x0f000008  //DDRSS_PHY_286_DATA_F0
0x0f30c47c 0x00000f0f  //DDRSS_PHY_287_DATA_F0
0x0f30c480 0x00e4e400  //DDRSS_PHY_288_DATA_F0
0x0f30c484 0x00070820  //DDRSS_PHY_289_DATA_F0
0x0f30c488 0x000c0020  //DDRSS_PHY_290_DATA_F0
0x0f30c48c 0x00062000  //DDRSS_PHY_291_DATA_F0
0x0f30c490 0x00000000  //DDRSS_PHY_292_DATA_F0
0x0f30c494 0x55555555  //DDRSS_PHY_293_DATA_F0
0x0f30c498 0xaaaaaaaa  //DDRSS_PHY_294_DATA_F0
0x0f30c49c 0x55555555  //DDRSS_PHY_295_DATA_F0
0x0f30c4a0 0xaaaaaaaa  //DDRSS_PHY_296_DATA_F0
0x0f30c4a4 0x00005555  //DDRSS_PHY_297_DATA_F0
0x0f30c4a8 0x01000100  //DDRSS_PHY_298_DATA_F0
0x0f30c4ac 0x00800180  //DDRSS_PHY_299_DATA_F0
0x0f30c4b0 0x00000000  //DDRSS_PHY_300_DATA_F0
0x0f30c4b4 0x00100000  //DDRSS_PHY_301_DATA_F0
0x0f30c4b8 0x00000000  //DDRSS_PHY_302_DATA_F0
0x0f30c4bc 0x0c09000d  //DDRSS_PHY_303_DATA_F0
0x0f30c4c0 0x0000000c  //DDRSS_PHY_304_DATA_F0
0x0f30c4c4 0x00010300  //DDRSS_PHY_305_DATA_F0
0x0f30c4c8 0x00900078  //DDRSS_PHY_306_DATA_F0
0x0f30c4cc 0x00000fff  //DDRSS_PHY_307_DATA_F0
0x0f30c4d0 0x00000000  //DDRSS_PHY_308_DATA_F0
0x0f30c4d4 0x02f402e8  //DDRSS_PHY_309_DATA_F0
0x0f30c4d8 0x00000030  //DDRSS_PHY_310_DATA_F0
0x0f30c4dc 0x01200048  //DDRSS_PHY_311_DATA_F0
0x0f30c4e0 0x00000000  //DDRSS_PHY_312_DATA_F0
0x0f30c4e4 0x0c000000  //DDRSS_PHY_313_DATA_F0
0x0f30c4e8 0x07ff0000  //DDRSS_PHY_314_DATA_F0
0x0f30c4ec 0x00000000  //DDRSS_PHY_315_DATA_F0
0x0f30c4f0 0x00000000  //DDRSS_PHY_316_DATA_F0
0x0f30c4f4 0x00000000  //DDRSS_PHY_317_DATA_F0
0x0f30c4f8 0x00000000  //DDRSS_PHY_318_DATA_F0
0x0f30c4fc 0x00000000  //DDRSS_PHY_319_DATA_F0
0x0f30c500 0x00000000  //DDRSS_PHY_320_DATA_F0
0x0f30c504 0x00000004  //DDRSS_PHY_321_DATA_F0
0x0f30c508 0x00000000  //DDRSS_PHY_322_DATA_F0
0x0f30c50c 0x00000000  //DDRSS_PHY_323_DATA_F0
0x0f30c510 0x00000000  //DDRSS_PHY_324_DATA_F0
0x0f30c514 0x00000000  //DDRSS_PHY_325_DATA_F0
0x0f30c518 0x00000000  //DDRSS_PHY_326_DATA_F0
0x0f30c51c 0x00000000  //DDRSS_PHY_327_DATA_F0
0x0f30c520 0x041f07ff  //DDRSS_PHY_328_DATA_F0
0x0f30c524 0x00000000  //DDRSS_PHY_329_DATA_F0
0x0f30c528 0x01ccb001  //DDRSS_PHY_330_DATA_F0
0x0f30c52c 0x2000ccb0  //DDRSS_PHY_331_DATA_F0
0x0f30c530 0x20000140  //DDRSS_PHY_332_DATA_F0
0x0f30c534 0x07ff0200  //DDRSS_PHY_333_DATA_F0
0x0f30c538 0x0000dd01  //DDRSS_PHY_334_DATA_F0
0x0f30c53c 0x10100303  //DDRSS_PHY_335_DATA_F0
0x0f30c540 0x10101010  //DDRSS_PHY_336_DATA_F0
0x0f30c544 0x10101010  //DDRSS_PHY_337_DATA_F0
0x0f30c548 0x00021010  //DDRSS_PHY_338_DATA_F0
0x0f30c54c 0x00100010  //DDRSS_PHY_339_DATA_F0
0x0f30c550 0x00100010  //DDRSS_PHY_340_DATA_F0
0x0f30c554 0x00100010  //DDRSS_PHY_341_DATA_F0
0x0f30c558 0x00100010  //DDRSS_PHY_342_DATA_F0
0x0f30c55c 0x02020010  //DDRSS_PHY_343_DATA_F0
0x0f30c560 0x51515041  //DDRSS_PHY_344_DATA_F0
0x0f30c564 0x31804000  //DDRSS_PHY_345_DATA_F0
0x0f30c568 0x04bc0340  //DDRSS_PHY_346_DATA_F0
0x0f30c56c 0x01008080  //DDRSS_PHY_347_DATA_F0
0x0f30c570 0x04050000  //DDRSS_PHY_348_DATA_F0
0x0f30c574 0x00000504  //DDRSS_PHY_349_DATA_F0
0x0f30c578 0x42100010  //DDRSS_PHY_350_DATA_F0
0x0f30c57c 0x010c053e  //DDRSS_PHY_351_DATA_F0
0x0f30c580 0x000f0c14  //DDRSS_PHY_352_DATA_F0
0x0f30c584 0x01000140  //DDRSS_PHY_353_DATA_F0
0x0f30c588 0x007a0120  //DDRSS_PHY_354_DATA_F0
0x0f30c58c 0x00000c00  //DDRSS_PHY_355_DATA_F0
0x0f30c590 0x000001cc  //DDRSS_PHY_356_DATA_F0
0x0f30c594 0x20100200  //DDRSS_PHY_357_DATA_F0
0x0f30c598 0x00000005  //DDRSS_PHY_358_DATA_F0
0x0f30c59c 0x76543210  //DDRSS_PHY_359_DATA_F0
0x0f30c5a0 0x00000008  //DDRSS_PHY_360_DATA_F0
0x0f30c5a4 0x02800280  //DDRSS_PHY_361_DATA_F0
0x0f30c5a8 0x02800280  //DDRSS_PHY_362_DATA_F0
0x0f30c5ac 0x02800280  //DDRSS_PHY_363_DATA_F0
0x0f30c5b0 0x02800280  //DDRSS_PHY_364_DATA_F0
0x0f30c5b4 0x00840280  //DDRSS_PHY_365_DATA_F0
0x0f30c5b8 0x0000b400  //DDRSS_PHY_366_DATA_F0
0x0f30c5bc 0x00a800b4  //DDRSS_PHY_367_DATA_F0
0x0f30c5c0 0x00a800ae  //DDRSS_PHY_368_DATA_F0
0x0f30c5c4 0x00b400a8  //DDRSS_PHY_369_DATA_F0
0x0f30c5c8 0x00b400b4  //DDRSS_PHY_370_DATA_F0
0x0f30c5cc 0x00b400b4  //DDRSS_PHY_371_DATA_F0
0x0f30c5d0 0x00a800b4  //DDRSS_PHY_372_DATA_F0
0x0f30c5d4 0x00ae00a8  //DDRSS_PHY_373_DATA_F0
0x0f30c5d8 0x00b400b4  //DDRSS_PHY_374_DATA_F0
0x0f30c5dc 0x01ee00b4  //DDRSS_PHY_375_DATA_F0
0x0f30c5e0 0x01000000  //DDRSS_PHY_376_DATA_F0
0x0f30c5e4 0x00000000  //DDRSS_PHY_377_DATA_F0
0x0f30c5e8 0x00000000  //DDRSS_PHY_378_DATA_F0
0x0f30c5ec 0x00080200  //DDRSS_PHY_379_DATA_F0
0x0f30c5f0 0x00000000  //DDRSS_PHY_380_DATA_F0
0x0f30c5f4 0x00000000  //DDRSS_PHY_381_DATA_F0
0x0f30c800 0x00000100  //DDRSS_PHY_512_DATA_F0
0x0f30c804 0x00001000  //DDRSS_PHY_513_DATA_F0
0x0f30c808 0x00090000  //DDRSS_PHY_514_DATA_F0
0x0f30c80c 0x00000000  //DDRSS_PHY_515_DATA_F0
0x0f30c810 0x00000000  //DDRSS_PHY_516_DATA_F0
0x0f30c814 0x00000100  //DDRSS_PHY_517_DATA_F0
0x0f30c818 0x00000000  //DDRSS_PHY_518_DATA_F0
0x0f30c81c 0x00000000  //DDRSS_PHY_519_DATA_F0
0x0f30c820 0x00000000  //DDRSS_PHY_520_DATA_F0
0x0f30c824 0x00000000  //DDRSS_PHY_521_DATA_F0
0x0f30c828 0x00000000  //DDRSS_PHY_522_DATA_F0
0x0f30c82c 0x00000000  //DDRSS_PHY_523_DATA_F0
0x0f30c830 0x00000000  //DDRSS_PHY_524_DATA_F0
0x0f30c834 0x00dcba98  //DDRSS_PHY_525_DATA_F0
0x0f30c838 0x00000000  //DDRSS_PHY_526_DATA_F0
0x0f30c83c 0x00000000  //DDRSS_PHY_527_DATA_F0
0x0f30c840 0x00000000  //DDRSS_PHY_528_DATA_F0
0x0f30c844 0x00000000  //DDRSS_PHY_529_DATA_F0
0x0f30c848 0x00000000  //DDRSS_PHY_530_DATA_F0
0x0f30c84c 0x00000100  //DDRSS_PHY_531_DATA_F0
0x0f30c850 0x00000000  //DDRSS_PHY_532_DATA_F0
0x0f30c854 0x00000000  //DDRSS_PHY_533_DATA_F0
0x0f30c858 0x00000000  //DDRSS_PHY_534_DATA_F0
0x0f30c85c 0x00000000  //DDRSS_PHY_535_DATA_F0
0x0f30c860 0x00000000  //DDRSS_PHY_536_DATA_F0
0x0f30c864 0x00000000  //DDRSS_PHY_537_DATA_F0
0x0f30c868 0x00000000  //DDRSS_PHY_538_DATA_F0
0x0f30c86c 0x00000000  //DDRSS_PHY_539_DATA_F0
0x0f30c870 0x0a418820  //DDRSS_PHY_540_DATA_F0
0x0f30c874 0x103f0000  //DDRSS_PHY_541_DATA_F0
0x0f30c878 0x000f0100  //DDRSS_PHY_542_DATA_F0
0x0f30c87c 0x0000000f  //DDRSS_PHY_543_DATA_F0
0x0f30c880 0x020002cc  //DDRSS_PHY_544_DATA_F0
0x0f30c884 0x00030000  //DDRSS_PHY_545_DATA_F0
0x0f30c888 0x00000300  //DDRSS_PHY_546_DATA_F0
0x0f30c88c 0x00000300  //DDRSS_PHY_547_DATA_F0
0x0f30c890 0x00000300  //DDRSS_PHY_548_DATA_F0
0x0f30c894 0x00000300  //DDRSS_PHY_549_DATA_F0
0x0f30c898 0x00000300  //DDRSS_PHY_550_DATA_F0
0x0f30c89c 0x42080010  //DDRSS_PHY_551_DATA_F0
0x0f30c8a0 0x0000003e  //DDRSS_PHY_552_DATA_F0
0x0f30c8a4 0x00000000  //DDRSS_PHY_553_DATA_F0
0x0f30c8a8 0x00000000  //DDRSS_PHY_554_DATA_F0
0x0f30cc00 0x00000100  //DDRSS_PHY_768_DATA_F0
0x0f30cc04 0x00001000  //DDRSS_PHY_769_DATA_F0
0x0f30cc08 0x00090000  //DDRSS_PHY_770_DATA_F0
0x0f30cc0c 0x00000000  //DDRSS_PHY_771_DATA_F0
0x0f30cc10 0x00000000  //DDRSS_PHY_772_DATA_F0
0x0f30cc14 0x00000100  //DDRSS_PHY_773_DATA_F0
0x0f30cc18 0x00000000  //DDRSS_PHY_774_DATA_F0
0x0f30cc1c 0x00000000  //DDRSS_PHY_775_DATA_F0
0x0f30cc20 0x00000000  //DDRSS_PHY_776_DATA_F0
0x0f30cc24 0x00000000  //DDRSS_PHY_777_DATA_F0
0x0f30cc28 0x00000000  //DDRSS_PHY_778_DATA_F0
0x0f30cc2c 0x00000000  //DDRSS_PHY_779_DATA_F0
0x0f30cc30 0x00000000  //DDRSS_PHY_780_DATA_F0
0x0f30cc34 0x00dcba98  //DDRSS_PHY_781_DATA_F0
0x0f30cc38 0x00000000  //DDRSS_PHY_782_DATA_F0
0x0f30cc3c 0x00000000  //DDRSS_PHY_783_DATA_F0
0x0f30cc40 0x00000000  //DDRSS_PHY_784_DATA_F0
0x0f30cc44 0x00000000  //DDRSS_PHY_785_DATA_F0
0x0f30cc48 0x00000000  //DDRSS_PHY_786_DATA_F0
0x0f30cc4c 0x00000100  //DDRSS_PHY_787_DATA_F0
0x0f30cc50 0x00000000  //DDRSS_PHY_788_DATA_F0
0x0f30cc54 0x00000000  //DDRSS_PHY_789_DATA_F0
0x0f30cc58 0x00000000  //DDRSS_PHY_790_DATA_F0
0x0f30cc5c 0x00000000  //DDRSS_PHY_791_DATA_F0
0x0f30cc60 0x00000000  //DDRSS_PHY_792_DATA_F0
0x0f30cc64 0x00000000  //DDRSS_PHY_793_DATA_F0
0x0f30cc68 0x00000000  //DDRSS_PHY_794_DATA_F0
0x0f30cc6c 0x00000000  //DDRSS_PHY_795_DATA_F0
0x0f30cc70 0x16a4a0e6  //DDRSS_PHY_796_DATA_F0
0x0f30cc74 0x103f0000  //DDRSS_PHY_797_DATA_F0
0x0f30cc78 0x000f0000  //DDRSS_PHY_798_DATA_F0
0x0f30cc7c 0x0000000f  //DDRSS_PHY_799_DATA_F0
0x0f30cc80 0x020002cc  //DDRSS_PHY_800_DATA_F0
0x0f30cc84 0x00030000  //DDRSS_PHY_801_DATA_F0
0x0f30cc88 0x00000300  //DDRSS_PHY_802_DATA_F0
0x0f30cc8c 0x00000300  //DDRSS_PHY_803_DATA_F0
0x0f30cc90 0x00000300  //DDRSS_PHY_804_DATA_F0
0x0f30cc94 0x00000300  //DDRSS_PHY_805_DATA_F0
0x0f30cc98 0x00000300  //DDRSS_PHY_806_DATA_F0
0x0f30cc9c 0x42080010  //DDRSS_PHY_807_DATA_F0
0x0f30cca0 0x0000003e  //DDRSS_PHY_808_DATA_F0
0x0f30cca4 0x00000000  //DDRSS_PHY_809_DATA_F0
0x0f30cca8 0x00000000  //DDRSS_PHY_810_DATA_F0
0x0f30d000 0x00000100  //DDRSS_PHY_1024_DATA_F0
0x0f30d004 0x00001000  //DDRSS_PHY_1025_DATA_F0
0x0f30d008 0x00090000  //DDRSS_PHY_1026_DATA_F0
0x0f30d00c 0x00000000  //DDRSS_PHY_1027_DATA_F0
0x0f30d010 0x00000000  //DDRSS_PHY_1028_DATA_F0
0x0f30d014 0x00000100  //DDRSS_PHY_1029_DATA_F0
0x0f30d018 0x00000000  //DDRSS_PHY_1030_DATA_F0
0x0f30d01c 0x00000000  //DDRSS_PHY_1031_DATA_F0
0x0f30d020 0x00000000  //DDRSS_PHY_1032_DATA_F0
0x0f30d024 0x00000000  //DDRSS_PHY_1033_DATA_F0
0x0f30d028 0x00000000  //DDRSS_PHY_1034_DATA_F0
0x0f30d02c 0x00000000  //DDRSS_PHY_1035_DATA_F0
0x0f30d030 0x00000000  //DDRSS_PHY_1036_DATA_F0
0x0f30d034 0x00dcba98  //DDRSS_PHY_1037_DATA_F0
0x0f30d038 0x00000000  //DDRSS_PHY_1038_DATA_F0
0x0f30d03c 0x00000000  //DDRSS_PHY_1039_DATA_F0
0x0f30d040 0x00000000  //DDRSS_PHY_1040_DATA_F0
0x0f30d044 0x00000000  //DDRSS_PHY_1041_DATA_F0
0x0f30d048 0x00000000  //DDRSS_PHY_1042_DATA_F0
0x0f30d04c 0x00000100  //DDRSS_PHY_1043_DATA_F0
0x0f30d050 0x00000000  //DDRSS_PHY_1044_DATA_F0
0x0f30d054 0x00000000  //DDRSS_PHY_1045_DATA_F0
0x0f30d058 0x00000000  //DDRSS_PHY_1046_DATA_F0
0x0f30d05c 0x00000000  //DDRSS_PHY_1047_DATA_F0
0x0f30d060 0x00000000  //DDRSS_PHY_1048_DATA_F0
0x0f30d064 0x00000000  //DDRSS_PHY_1049_DATA_F0
0x0f30d068 0x00000000  //DDRSS_PHY_1050_DATA_F0
0x0f30d06c 0x00000000  //DDRSS_PHY_1051_DATA_F0
0x0f30d070 0x2307b9ac  //DDRSS_PHY_1052_DATA_F0
0x0f30d074 0x10030000  //DDRSS_PHY_1053_DATA_F0
0x0f30d078 0x000f0000  //DDRSS_PHY_1054_DATA_F0
0x0f30d07c 0x0000000f  //DDRSS_PHY_1055_DATA_F0
0x0f30d080 0x020002cc  //DDRSS_PHY_1056_DATA_F0
0x0f30d084 0x00030000  //DDRSS_PHY_1057_DATA_F0
0x0f30d088 0x00000300  //DDRSS_PHY_1058_DATA_F0
0x0f30d08c 0x00000300  //DDRSS_PHY_1059_DATA_F0
0x0f30d090 0x00000300  //DDRSS_PHY_1060_DATA_F0
0x0f30d094 0x00000300  //DDRSS_PHY_1061_DATA_F0
0x0f30d098 0x00000300  //DDRSS_PHY_1062_DATA_F0
0x0f30d09c 0x42080010  //DDRSS_PHY_1063_DATA_F0
0x0f30d0a0 0x0000003e  //DDRSS_PHY_1064_DATA_F0
0x0f30d0a4 0x00000000  //DDRSS_PHY_1065_DATA_F0
0x0f30d0a8 0x00000000  //DDRSS_PHY_1066_DATA_F0
0x0f30d400 0x00000000  //DDRSS_PHY_1280_DATA_F0
0x0f30d404 0x00000100  //DDRSS_PHY_1281_DATA_F0
0x0f30d408 0x00000000  //DDRSS_PHY_1282_DATA_F0
0x0f30d40c 0x00000000  //DDRSS_PHY_1283_DATA_F0
0x0f30d410 0x00000000  //DDRSS_PHY_1284_DATA_F0
0x0f30d414 0x00000000  //DDRSS_PHY_1285_DATA_F0
0x0f30d418 0x00050000  //DDRSS_PHY_1286_DATA_F0
0x0f30d41c 0x04000100  //DDRSS_PHY_1287_DATA_F0
0x0f30d420 0x00000055  //DDRSS_PHY_1288_DATA_F0
0x0f30d424 0x00000000  //DDRSS_PHY_1289_DATA_F0
0x0f30d428 0x06800000  //DDRSS_PHY_1290_DATA_F0
0x0f30d42c 0x00000000  //DDRSS_PHY_1291_DATA_F0
0x0f30d430 0x00000000  //DDRSS_PHY_1292_DATA_F0
0x0f30d434 0x01002000  //DDRSS_PHY_1293_DATA_F0
0x0f30d438 0x00004001  //DDRSS_PHY_1294_DATA_F0
0x0f30d43c 0x00020028  //DDRSS_PHY_1295_DATA_F0
0x0f30d440 0x00010100  //DDRSS_PHY_1296_DATA_F0
0x0f30d444 0x00000001  //DDRSS_PHY_1297_DATA_F0
0x0f30d448 0x00000000  //DDRSS_PHY_1298_DATA_F0
0x0f30d44c 0x0f0f0e06  //DDRSS_PHY_1299_DATA_F0
0x0f30d450 0x00010101  //DDRSS_PHY_1300_DATA_F0
0x0f30d454 0x010f0004  //DDRSS_PHY_1301_DATA_F0
0x0f30d458 0x00000000  //DDRSS_PHY_1302_DATA_F0
0x0f30d45c 0x20125770  //DDRSS_PHY_1303_DATA_F0
0x0f30d460 0x00000064  //DDRSS_PHY_1304_DATA_F0
0x0f30d464 0x00000000  //DDRSS_PHY_1305_DATA_F0
0x0f30d468 0x00000000  //DDRSS_PHY_1306_DATA_F0
0x0f30d46c 0x01020103  //DDRSS_PHY_1307_DATA_F0
0x0f30d470 0x03020102  //DDRSS_PHY_1308_DATA_F0
0x0f30d474 0x03030303  //DDRSS_PHY_1309_DATA_F0
0x0f30d478 0x03030303  //DDRSS_PHY_1310_DATA_F0
0x0f30d47c 0x00040000  //DDRSS_PHY_1311_DATA_F0
0x0f30d480 0x00005201  //DDRSS_PHY_1312_DATA_F0
0x0f30d484 0x00000003  //DDRSS_PHY_1313_DATA_F0
0x0f30d488 0x00010000  //DDRSS_PHY_1314_DATA_F0
0x0f30d48c 0x00000000  //DDRSS_PHY_1315_DATA_F0
0x0f30d490 0x00000003  //DDRSS_PHY_1316_DATA_F0
0x0f30d494 0x00010000  //DDRSS_PHY_1317_DATA_F0
0x0f30d498 0x00000000  //DDRSS_PHY_1318_DATA_F0
0x0f30d49c 0x07070001  //DDRSS_PHY_1319_DATA_F0
0x0f30d4a0 0x00005400  //DDRSS_PHY_1320_DATA_F0
0x0f30d4a4 0x000040a2  //DDRSS_PHY_1321_DATA_F0
0x0f30d4a8 0x00037912  //DDRSS_PHY_1322_DATA_F0
0x0f30d4ac 0x00017912  //DDRSS_PHY_1323_DATA_F0
0x0f30d4b0 0x00017912  //DDRSS_PHY_1324_DATA_F0
0x0f30d4b4 0x00017912  //DDRSS_PHY_1325_DATA_F0
0x0f30d4b8 0x00017912  //DDRSS_PHY_1326_DATA_F0
0x0f30d4bc 0x00017912  //DDRSS_PHY_1327_DATA_F0
0x0f30d4c0 0x000179e1  //DDRSS_PHY_1328_DATA_F0
0x0f30d4c4 0x000179e1  //DDRSS_PHY_1329_DATA_F0
0x0f30d4c8 0x00017912  //DDRSS_PHY_1330_DATA_F0
0x0f30d4cc 0x00017912  //DDRSS_PHY_1331_DATA_F0
0x0f30d4d0 0x00000000  //DDRSS_PHY_1332_DATA_F0
0x0f30d4d4 0x00000046  //DDRSS_PHY_1333_DATA_F0
0x0f30d4d8 0x00000400  //DDRSS_PHY_1334_DATA_F0
0x0f30d4dc 0x00000008  //DDRSS_PHY_1335_DATA_F0
0x0f30d4e0 0x00817912  //DDRSS_PHY_1336_DATA_F0
0x0f30d4e4 0x008179e1  //DDRSS_PHY_1337_DATA_F0
0x0f30d4e8 0x00179120  //DDRSS_PHY_1338_DATA_F0
0x0f30d4ec 0x00179e18  //DDRSS_PHY_1339_DATA_F0
0x0f30d4f0 0x00f7912f  //DDRSS_PHY_1340_DATA_F0
0x0f30d4f4 0x03f79e1f  //DDRSS_PHY_1341_DATA_F0
0x0f30d4f8 0x00000000  //DDRSS_PHY_1342_DATA_F0
0x0f30d4fc 0x00000000  //DDRSS_PHY_1343_DATA_F0
0x0f30d500 0xb3000000  //DDRSS_PHY_1344_DATA_F0
0x0f30d504 0x04102006  //DDRSS_PHY_1345_DATA_F0
0x0f30d508 0x00041020  //DDRSS_PHY_1346_DATA_F0
0x0f30d50c 0x01c98c98  //DDRSS_PHY_1347_DATA_F0
0x0f30d510 0x3f400000  //DDRSS_PHY_1348_DATA_F0
0x0f30d514 0x3f3f1f3f  //DDRSS_PHY_1349_DATA_F0
0x0f30d518 0x0000001f  //DDRSS_PHY_1350_DATA_F0
0x0f30d51c 0x00000000  //DDRSS_PHY_1351_DATA_F0
0x0f30d520 0x00000000  //DDRSS_PHY_1352_DATA_F0
0x0f30d524 0x00000000  //DDRSS_PHY_1353_DATA_F0
0x0f30d528 0x00000001  //DDRSS_PHY_1354_DATA_F0
0x0f30d52c 0x00000000  //DDRSS_PHY_1355_DATA_F0
0x0f30d530 0x00000000  //DDRSS_PHY_1356_DATA_F0
0x0f30d534 0x00000000  //DDRSS_PHY_1357_DATA_F0
0x0f30d538 0x00000000  //DDRSS_PHY_1358_DATA_F0
0x0f30d53c 0x76543210  //DDRSS_PHY_1359_DATA_F0
0x0f30d540 0x00000098  //DDRSS_PHY_1360_DATA_F0
0x0f30d544 0x00000000  //DDRSS_PHY_1361_DATA_F0
0x0f30d548 0x00000000  //DDRSS_PHY_1362_DATA_F0
0x0f30d54c 0x00000000  //DDRSS_PHY_1363_DATA_F0
0x0f30d550 0x00040700  //DDRSS_PHY_1364_DATA_F0
0x0f30d554 0x00000000  //DDRSS_PHY_1365_DATA_F0
0x0f30d558 0x00000000  //DDRSS_PHY_1366_DATA_F0
0x0f30d55c 0x00000000  //DDRSS_PHY_1367_DATA_F0
0x0f30d560 0x030f7102  //DDRSS_PHY_1368_DATA_F0
0x0f30d564 0x00000100  //DDRSS_PHY_1369_DATA_F0
0x0f30d568 0x00000000  //DDRSS_PHY_1370_DATA_F0
0x0f30d56c 0x0001f7c2  //DDRSS_PHY_1371_DATA_F0
0x0f30d570 0x00020002  //DDRSS_PHY_1372_DATA_F0
0x0f30d574 0x00000000  //DDRSS_PHY_1373_DATA_F0
0x0f30d578 0x00001142  //DDRSS_PHY_1374_DATA_F0
0x0f30d57c 0x03020400  //DDRSS_PHY_1375_DATA_F0
0x0f30d580 0x00000080  //DDRSS_PHY_1376_DATA_F0
0x0f30d584 0x03900390  //DDRSS_PHY_1377_DATA_F0
0x0f30d588 0x03900390  //DDRSS_PHY_1378_DATA_F0
0x0f30d58c 0x03900390  //DDRSS_PHY_1379_DATA_F0
0x0f30d590 0x03900390  //DDRSS_PHY_1380_DATA_F0
0x0f30d594 0x03900390  //DDRSS_PHY_1381_DATA_F0
0x0f30d598 0x03900390  //DDRSS_PHY_1382_DATA_F0
0x0f30d59c 0x00000300  //DDRSS_PHY_1383_DATA_F0
0x0f30d5a0 0x00000300  //DDRSS_PHY_1384_DATA_F0
0x0f30d5a4 0x00000300  //DDRSS_PHY_1385_DATA_F0
0x0f30d5a8 0x00000300  //DDRSS_PHY_1386_DATA_F0
0x0f30d5ac 0x31823fc7  //DDRSS_PHY_1387_DATA_F0
0x0f30d5b0 0x00000000  //DDRSS_PHY_1388_DATA_F0
0x0f30d5b4 0x0c000d3f  //DDRSS_PHY_1389_DATA_F0
0x0f30d5b8 0x30000d3f  //DDRSS_PHY_1390_DATA_F0
0x0f30d5bc 0x300d3f11  //DDRSS_PHY_1391_DATA_F0
0x0f30d5c0 0x01990000  //DDRSS_PHY_1392_DATA_F0
0x0f30d5c4 0x000d3fcc  //DDRSS_PHY_1393_DATA_F0
0x0f30d5c8 0x00000c11  //DDRSS_PHY_1394_DATA_F0
0x0f30d5cc 0x300d3f11  //DDRSS_PHY_1395_DATA_F0
0x0f30d5d0 0x01990000  //DDRSS_PHY_1396_DATA_F0
0x0f30d5d4 0x300c3f11  //DDRSS_PHY_1397_DATA_F0
0x0f30d5d8 0x01990000  //DDRSS_PHY_1398_DATA_F0
0x0f30d5dc 0x300c3f11  //DDRSS_PHY_1399_DATA_F0
0x0f30d5e0 0x01990000  //DDRSS_PHY_1400_DATA_F0
0x0f30d5e4 0x300d3f11  //DDRSS_PHY_1401_DATA_F0
0x0f30d5e8 0x01990000  //DDRSS_PHY_1402_DATA_F0
0x0f30d5ec 0x300d3f11  //DDRSS_PHY_1403_DATA_F0
0x0f30d5f0 0x01990000  //DDRSS_PHY_1404_DATA_F0
0x0f30d5f4 0x20040004  //DDRSS_PHY_1405_DATA_F0
End of DDR Register Dump

SPL initial stack usage: 13408 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed
Loading Environment from MMC... *** Warning - No MMC card found, using default environment

Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024
I/TC: 
I/TC: OP-TEE version: 4.1.0-51-g012cdca49 (gcc version 11.4.0 (GCC)) #1 Tue Jan 30 10:48:03 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2023.04 (Jun 14 2024 - 08:00:02 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
Trying to boot from MMC2
Authentication passed
Authentication passed


U-Boot 2023.04 (Jun 14 2024 - 08:00:02 +0800)

SoC:   AM64X SR2.0 HS-FS
Model: Texas Instruments AM642 EVM
DRAM:  2 GiB
Core:  91 devices, 32 uclasses, devicetree: separate
NAND:  0 MiB
MMC:   mmc@fa10000: 0, mmc@fa00000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Net:   Could not get PHY for icssg1-eth: addr 15
prueth icssg1-eth: phy_connect() failed
prueth icssg1-eth: phy_init failed
Could not get PHY for ethernet@8000000port@1: addr 0
am65_cpsw_nuss_port ethernet@8000000port@1: phy_connect() failed
No ethernet found.

Hit any key to stop autoboot:  2  1  0 
switch to partitions #0, OK
mmc1 is current device
SD/MMC found on device 1
Failed to load 'boot.scr'
574 bytes read in 29 ms (18.6 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc1 ...
WARNING: Could not determine device tree to use
## Error: "main_cpsw0_qsgmii_phyinit" not defined
19376640 bytes read in 808 ms (22.9 MiB/s)
Failed to load '/boot/dtb/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
No FDT memory address configured. Please configure
the FDT address via "fdt addr <address>" command.
Aborting!
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
Card did not respond to voltage select! : -110
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Failed to load '/'
Card did not respond to voltage select! : -110
No EFI system partition
No EFI system partition
Failed to persist EFI variables
Could not get PHY for ethernet@8000000port@1: addr 0
am65_cpsw_nuss_port ethernet@8000000ethernet@8000000port@1: phy_connect() failed
BootOrder not defined
EFI boot manager: Cannot load any image
Found EFI removable media binary efi/boot/bootaa64.efi
733184 bytes read in 93 ms (7.5 MiB/s)
Booting /efi\boot\bootaa64.efi
Welcome to GRUB!

error: no such device: ((hd0,msdos1)/efi/boot)/EFI/BOOT/grub.cfg.
error: serial port `com0' isn't found.
GNU GRUB  version 2.06

lqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqkxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxmqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqj     Use the  and  keys to select which entry is highlighted.                      
      Press enter to boot the selected OS, `e' to edit the commands before booting or 
      `c' for a command-line.                                                          *boot                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       The highlighted entry will be executed automatically in 3s.                                The highlighted entry will be executed automatically in 2s.                                The highlighted entry will be executed automatically in 1s.                                The highlighted entry will be executed automatically in 0s.                               Booting `boot'

EFI stub: Booting Linux Kernel...
EFI stub: EFI_RNG_PROTOCOL unavailable
EFI stub: Using DTB from configuration table
EFI stub: Exiting boot services...
I/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
I/TC: Reserved shared memory is enabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 6.1.80-ti-g2e423244f8c0 (oe-user@oe-host) (aarch64-oe-linux-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 SMP PREEMPT Wed Mar 20 14:43:33 UTC 2024
[    0.000000] Machine model: Texas Instruments AM642 EVM
[    0.000000] efi: EFI v2.100 by Das U-Boot
[    0.000000] efi: RTPROP=0xfce79040 SMBIOS=0xfce78000 MEMRESERVE=0xddfc7040 
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
[    0.000000]   node   0: [mem 0x000000009e800000-0x00000000a3ffffff]
[    0.000000]   node   0: [mem 0x00000000a4000000-0x00000000a4ffffff]
[    0.000000]   node   0: [mem 0x00000000a5000000-0x00000000a57fffff]
[    0.000000]   node   0: [mem 0x00000000a5800000-0x00000000fce77fff]
[    0.000000]   node   0: [mem 0x00000000fce78000-0x00000000fce79fff]
[    0.000000]   node   0: [mem 0x00000000fce7a000-0x00000000fce7afff]
[    0.000000]   node   0: [mem 0x00000000fce7b000-0x00000000fce80fff]
[    0.000000]   node   0: [mem 0x00000000fce81000-0x00000000ffebffff]
[    0.000000]   node   0: [mem 0x00000000ffec0000-0x00000000ffecffff]
[    0.000000]   node   0: [mem 0x00000000ffed0000-0x00000000ffffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000] cma: Reserved 32 MiB at 0x00000000fae00000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.4
[    0.000000] percpu: Embedded 20 pages/cpu s41064 r8192 d32664 u81920
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: kernel page table isolation forced ON by KASLR
[    0.000000] CPU features: detected: Kernel page table isolation (KPTI)
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] alternatives: applying boot alternatives
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 516096
[    0.000000] Kernel command line: BOOT_IMAGE=/Image root=PARTUUID=6dd013bc-02 rootwait rootfstype=ext4
[    0.000000] Unknown kernel command line parameters "BOOT_IMAGE=/Image", will be passed to user space.
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 1906056K/2097152K available (11712K kernel code, 1258K rwdata, 3812K rodata, 1984K init, 438K bss, 158328K reserved, 32768K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu: 	RCU event tracing is enabled.
[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.000000] 	Trampoline variant of Tasks RCU enabled.
[    0.000000] 	Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: gic_handle_irq
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001840000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80800000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x0000000080030000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080040000
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000001] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.000446] Console: colour dummy device 80x25
[    0.001247] printk: console [tty0] enabled
[    0.001309] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[    0.001338] pid_max: default: 32768 minimum: 301
[    0.001408] LSM: Security Framework initializing
[    0.001570] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.001609] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.003541] cblist_init_generic: Setting adjustable number of callback queues.
[    0.003590] cblist_init_generic: Setting shift to 1 and lim to 1.
[    0.003685] cblist_init_generic: Setting adjustable number of callback queues.
[    0.003703] cblist_init_generic: Setting shift to 1 and lim to 1.
[    0.003955] rcu: Hierarchical SRCU implementation.
[    0.003972] rcu: 	Max phase no-delay instances is 1000.
[    0.004293] Platform MSI: msi-controller@1820000 domain created
[    0.004647] PCI/MSI: /bus@f4000/interrupt-controller@1800000/msi-controller@1820000 domain created
[    0.005092] Remapping and enabling EFI services.
[    0.005488] smp: Bringing up secondary CPUs ...
[    0.014504] Detected VIPT I-cache on CPU1
[    0.014640] GICv3: CPU1: found redistributor 1 region 0:0x0000000001860000
[    0.014661] GICv3: CPU1: using allocated LPI pending table @0x0000000080050000
[    0.014722] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.014898] smp: Brought up 1 node, 2 CPUs
[    0.015110] SMP: Total of 2 processors activated.
[    0.015130] CPU features: detected: 32-bit EL0 Support
[    0.015147] CPU features: detected: CRC32 instructions
[    0.015231] CPU: All CPU(s) started at EL2
[    0.015243] alternatives: applying system-wide alternatives
[    0.017269] devtmpfs: initialized
[    0.027569] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.027634] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    0.029280] pinctrl core: initialized pinctrl subsystem
[    0.029994] SMBIOS 3.0 present.
[    0.030038] DMI: Unknown Unknown Product/Unknown Product, BIOS 2023.04 04/01/2023
[    0.030778] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.031996] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0.032220] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.032383] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.032505] audit: initializing netlink subsys (disabled)
[    0.032771] audit: type=2000 audit(0.032:1): state=initialized audit_enabled=0 res=1
[    0.033334] thermal_sys: Registered thermal governor 'step_wise'
[    0.033342] thermal_sys: Registered thermal governor 'power_allocator'
[    0.033418] cpuidle: using governor menu
[    0.033641] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.033732] ASID allocator initialised with 32768 entries
[    0.047473] KASLR enabled
[    0.055572] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[    0.055620] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[    0.055636] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[    0.055650] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[    0.055665] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[    0.055679] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[    0.055694] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[    0.055707] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[    0.057626] k3-chipinfo 43000014.chipid: Family:AM64X rev:SR2.0 JTAGID[0x1bb3802f] Detected
[    0.059604] iommu: Default domain type: Translated 
[    0.059651] iommu: DMA domain TLB invalidation policy: strict mode 
[    0.060019] SCSI subsystem initialized
[    0.060553] usbcore: registered new interface driver usbfs
[    0.060613] usbcore: registered new interface driver hub
[    0.060659] usbcore: registered new device driver usb
[    0.061196] pps_core: LinuxPPS API ver. 1 registered
[    0.061211] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.061240] PTP clock support registered
[    0.061400] EDAC MC: Ver: 3.0.0
[    0.062309] Registered efivars operations
[    0.062783] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fc9100
[    0.063075] omap-mailbox 29040000.mailbox: omap mailbox rev 0x66fc9100
[    0.063281] omap-mailbox 29060000.mailbox: omap mailbox rev 0x66fc9100
[    0.063887] FPGA manager framework
[    0.064019] Advanced Linux Sound Architecture Driver Initialized.
[    0.065398] clocksource: Switched to clocksource arch_sys_counter
[    0.065685] VFS: Disk quotas dquot_6.6.0
[    0.065747] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.072982] NET: Registered PF_INET protocol family
[    0.073542] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.075833] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    0.075906] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.075936] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.076084] TCP bind hash table entries: 16384 (order: 7, 524288 bytes, linear)
[    0.076634] TCP: Hash tables configured (established 16384 bind 16384)
[    0.076870] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.076964] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.077231] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.077907] RPC: Registered named UNIX socket transport module.
[    0.077949] RPC: Registered udp transport module.
[    0.077961] RPC: Registered tcp transport module.
[    0.077973] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.077995] NET: Registered PF_XDP protocol family
[    0.078022] PCI: CLS 0 bytes, default 64
[    0.078820] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
[    0.080623] Initialise system trusted keyrings
[    0.080974] workingset: timestamp_bits=46 max_order=19 bucket_order=0
[    0.086295] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.087082] NFS: Registering the id_resolver key type
[    0.087156] Key type id_resolver registered
[    0.087169] Key type id_legacy registered
[    0.087244] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    0.087262] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    0.130038] Key type asymmetric registered
[    0.130077] Asymmetric key parser 'x509' registered
[    0.130162] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
[    0.130415] io scheduler mq-deadline registered
[    0.130436] io scheduler kyber registered
[    0.134256] pinctrl-single 4084000.pinctrl: 33 pins, size 132
[    0.134870] pinctrl-single f4000.pinctrl: 180 pins, size 720
[    0.136791] pinctrl-single a40000.pinctrl: 512 pins, size 2048
[    0.144190] Serial: 8250/16550 driver, 12 ports, IRQ sharing enabled
[    0.155193] loop: module loaded
[    0.156487] megasas: 07.719.03.00-rc1
[    0.160282] tun: Universal TUN/TAP device driver, 1.6
[    0.161268] VFIO - User Level meta-driver version: 0.3
[    0.162345] usbcore: registered new interface driver usb-storage
[    0.163026] i2c_dev: i2c /dev entries driver
[    0.164158] sdhci: Secure Digital Host Controller Interface driver
[    0.164190] sdhci: Copyright(c) Pierre Ossman
[    0.164422] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.165203] ledtrig-cpu: registered to indicate activity on CPUs
[    0.165720] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    0.166050] omap_timer 2400000.timer: error -ENXIO: IRQ index 0 not found
[    0.166295] usbcore: registered new interface driver usbhid
[    0.166313] usbhid: USB HID core driver
[    0.167436] optee: probing for conduit method.
[    0.167490] optee: revision 4.1 (012cdca4)
[    0.184141] optee: dynamic shared memory is enabled
[    0.184640] optee: initialized driver
[    0.187054] Initializing XFRM netlink socket
[    0.187130] NET: Registered PF_PACKET protocol family
[    0.187225] Key type dns_resolver registered
[    0.187737] registered taskstats version 1
[    0.187785] Loading compiled-in X.509 certificates
[    0.199701] ti-sci 44043000.system-controller: ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
[    0.246933] pca953x 0-0038: supply vcc not found, using dummy regulator
[    0.247124] pca953x 0-0038: using no AI
[    0.269453] pca953x 0-0038: failed writing register
[    0.269689] pca953x: probe of 0-0038 failed with error -121
[    0.269845] omap_i2c 20000000.i2c: bus 0 rev0.12 at 400 kHz
[    0.271660] pca953x 1-0022: supply vcc not found, using dummy regulator
[    0.271849] pca953x 1-0022: using AI
[    0.293463] pca953x 1-0022: failed writing register
[    0.293717] pca953x: probe of 1-0022 failed with error -121
[    0.294331] omap_i2c 20010000.i2c: bus 1 rev0.12 at 400 kHz
[    0.294765] ti-sci-intr 4210000.interrupt-controller: Interrupt Router 5 domain created
[    0.295008] ti-sci-intr bus@f4000:interrupt-controller@a00000: Interrupt Router 3 domain created
[    0.295385] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
[    0.298706] ti-udma 485c0100.dma-controller: Number of rings: 68
[    0.300082] ti-udma 485c0100.dma-controller: Channels: 24 (bchan: 12, tchan: 6, rchan: 6)
[    0.301975] ti-udma 485c0000.dma-controller: Number of rings: 288
[    0.310887] ti-udma 485c0000.dma-controller: Channels: 44 (tchan: 29, rchan: 15)
[    0.314516] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 305, base_baud = 3000000) is a 8250
[    1.745794] printk: console [ttyS2] enabled
[    1.753923] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[    1.762609] pinctrl-single f4000.pinctrl: pin PIN127 already requested by 8000000.ethernet; cannot claim for 8000000.ethernet:mdio@f00
[    1.774797] pinctrl-single f4000.pinctrl: pin-127 (8000000.ethernet:mdio@f00) status -22
[    1.782897] pinctrl-single f4000.pinctrl: could not request pin 127 (PIN127) from group mdio1-pins-default  on device pinctrl-single
[    1.794813] davinci_mdio 8000000.ethernet:mdio@f00: Error applying setting, reverse things back
[    1.803536] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA00903, cpsw version 0x6BA80903 Ports: 3 quirks:00000006
[    1.816436] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.4
[    1.823584] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512
[    1.830529] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[    1.841365] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 16
[    1.851568] am65-cpts 39000000.cpts: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[    1.861662] mmc0: CQHCI version 5.10
[    1.877863] debugfs: Directory 'pd:114' with parent 'pm_genpd' already present!
[    1.895931] ALSA device list:
[    1.899022]   No soundcards found.
[    1.909414] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    1.917210] Waiting for root device PARTUUID=6dd013bc-02...
[   11.998550] platform mdio-mux-1: deferred probe pending
[   12.003852] platform leds: deferred probe pending
[   12.008600] platform mux-controller: deferred probe pending
[   12.014182] platform fixed-regulator-sd: deferred probe pending

Kind Regards,

JDA.

0 JJD over 1 year ago in reply to JDA

TI__Guru* 86600 points

HI JDA,

yes, the log looks much better now, looks like training is completing successfully and the boot is proceeding. There is not really an indicator of successful DDR training, but the fact that the boot continues past this line:

SPL initial stack usage: 13408 bytes

Indicates that the DDR is working. You will probably need to perform memory stress tests across temperature to further test the robustness of the DDR configuration.

You can now revert the patch as you don't need the debug messages and the DDR regdump anymore.

It looks like now the boot is failing to read the device tree file, or there is something wrong with the DTB. I will have to pass the thread off to another colleague to help with that.

Regards,

James

0 Bin Liu over 1 year ago in reply to JDA

TI__Guru**** 168421 points

Hi JDA,

[    1.909414] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    1.917210] Waiting for root device PARTUUID=6dd013bc-02...
[   11.998550] platform mdio-mux-1: deferred probe pending
[   12.003852] platform leds: deferred probe pending
[   12.008600] platform mux-controller: deferred probe pending
[   12.014182] platform fixed-regulator-sd: deferred probe pending

It appears your board boots from SD card, but the end of the kernel boot log shows the SD card is not detected (mmc1 on fa000000.mmc). And the issue seems to be in the SD card I/O voltage switching. (The U-Boot boot log already shows voltage switching failed.)

Please check your kernel device tree "fixed-regulator-sd" node and its related settings, likely the switch is controlled by a GPIO. Please review all this information and ensure it matches your board design.

0 JDA over 1 year ago in reply to Bin Liu

Prodigy 74 points

Hi Bin,

Because the SD Card circuit of our customized board only supports the 3.3V power supply and does not yet support the 1.8V power circuit, yet.

Could this be the reason for the boot failure when switching from 3.3V to 1.8V, thus causing the SD Card incapable of being read?

If so, how can I set the device tree to fix the SD Card (mmc1) voltage at 3.3V only and prevent it from switching to 1.8V mode?

Please assist me with this, if you may.

PS: Thanks for your kind guidance.

Here is my current fixed-regulator-sd node description of kernel device tree, which comes from the original file of k3-am642-evm.dts.

	vdd_mmc1: fixed-regulator-sd {
		/* TPS2051BD */
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
		gpio = <&exp1 6 GPIO_ACTIVE_HIGH>;
	};

Kind Regards,

JDA.

0 Bin Liu over 1 year ago in reply to JDA

TI__Guru**** 168421 points

Hi JDA,

To prevent SD card to switch to 1.8v, please add the following property to the &MMC1 node in your board device tree.

no-1-8-v;

0 JDA over 1 year ago in reply to Bin Liu

Prodigy 74 points

Hi Bin,

By following your guidance, here we've added "no-1-8-v;" to the k3-am642-evm.dts file of the following location.

But the situation is still the same, is there anything we are missing? Please guide us if you may.

DTS file:
/opt/ti-processor-sdk-linux-am64xx-evm-09.02.01.09/board-support/u-boot-build/a53/source/arch/arm/dts/k3-am642-evm.dts

Reference:
software-dl.ti.com/.../MMC-SD.html

&sdhci1 {
	/* SD/MMC */
	vmmc-supply = <&vdd_mmc1>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	disable-wp;
	no-1-8-v; /* disabling all the UHS modes, added by JDA */
};

Kind Regards,

JDA.

0 Bin Liu over 1 year ago in reply to JDA

TI__Guru**** 168421 points

Hi JDA,

JDA said:
DTS file:
/opt/ti-processor-sdk-linux-am64xx-evm-09.02.01.09/board-support/u-boot-build/a53/source/arch/arm/dts/k3-am642-evm.dts

I was asking to add "no-1-8-v;" to kernel board device tree, not U-Boot.

BTY, kernel provides two board dts for the two AM64x EVM: k3-am642-evm.dts and k3-am642-sk.dts. Please ensure you modify the one used for your board.

Processors

Processors forum

AM6442: DDR4 initialization failure with two-device (2 x 8-bit) DDR configuration of a custom board