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AM3358: Bare metal programming: change the system clock?

user6544278
Prodigy 220 points
Part Number: AM3358


Tool/software:

Hi,

this question refers to direct register/bare metal programming of the AM3358:

There are several subsystems which depend on the system clock (named as SYSCLKOUT at different positions in the manual). It seems, by some default, this system clock is at 100 MHz by default.

My question: where is this system clock configured? Is there a possibility to have lower/higher system clocks?

If yes: what registers are responsible for that general SYSCLKOUT/system clock or its dividers?

Kind regards

Michael

  • 0
    TI__Mastermind 28695 points

    The AM3358 has several PLLs. There is a section in the TRM describing each of their operation and configuration. 

    MPU_PLL -  TRM chapter 8.1.6.9
    DDR_PLL - TRM chapter 8.1.6.11
    CORE_PLL - TRM chapter 8.1.6.7
    PER_PLL - TRM chapter 8.1.6.8
    Display PLL - TRM chapter 8.1.6.10

    Be aware, changing the CORE or PER PLLs to non-std frequencies may negatively impact operation of peripherals that require specific frequencies. 

    There is also a clock tree tool which you can use to explore the clock connectivity. it is available for download here : https://www.ti.com/tool/CLOCKTREETOOL

    --Paul 

  • 0 in reply to PaulM
    Prodigy 220 points

    OK, then let me be more specific:

    Section "15.2 Enhanced PWM (ePWM) Module" is talking about a "SYSCLK" / "SYSCLKOUT" which is the base clock for the EHRPWM module. Within the EHRPWM-registers a divider for that clock can be configured - but the base "SYSCLK" seems to be fixed and comes from somewhere else.

    So what is this "SYSCLK"? This name is used only in scope of the EHRPWM module. Is it the core-clock?

    Thanks!

  • +1 in reply to user6544278
    TI__Mastermind 28695 points

    The sysclk of the ePWM module is driven by the PWMSS_ocp_clk of the PWMSS

    The 100MHz PWMSS_ocp_clk is sourced from CORE_CLKOUTM4 / 2 (DPLL_CORE) - Table 15-3 in the TRM 

    Below is a capture from the clock tree tool.   The DPLL_CORE is circled in blue and the three PMWSS modules are highlighted in Yellow. 

    --Paul