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SK-AM62P-LP: CLOCK OUPUT

Part Number: SK-AM62P-LP
Other Parts Discussed in Thread: AM62P, SYSCONFIG

Tool/software:

Hi TI Experts,

Does the AM62P support output 25MHz clock?

According the AM62P Datasheet, I can see that there are severies of clock output PINs of AM62P, but most of them can only be used for test or debug(as follow);

And, only the CLKOUT PIN can output 50MHz RMII CLOCK(as follow);

Only the WKUP_CLKOUT PIN can output 32.768KHz CLOCK(as follow);

So, when we need 25MHz clock output from AM62P to other device(for the Ethernet PHY clock in RGMII Mode or the reference clock for working of SerDes);

Can the AM62P support that?

Regards,

Hang

  • You should consider using the WKUP_CLKOUT0 pin since AM62x configures the pin by default to source the HSOSC0 output (25MHz) as soon as MCU_PORz is released.

    Note: You must validate the performance of this clock output meets your system requirements in your actual system implementation. We do not define the performance of clock outputs because there are many system specific dependencies that can impact clock performance.

    Regards,
    Paul

  • Hi Expert,

    Thanks your reply;

    Does it means that when we need RMII clock, we can use the AM62P CLKOUT0 PIN, and when we need other frequency clock(like 32.768KHz/25MHz), we can use the WKUP_CLKOUT0 PIN?

    And, Can WKUP_CLKOUT0 PIN support outputing 16MHz/27MHz/13.5MHz or other frequency clock?

    Regards,

    Hang

  • I just realized you are asking question about the AM62Px EVM. For some reason I thought you were asking about the AM62x device when sending my previous reply. 

    The AM62Px device configures the WKUP_CLKOUT0 pin to drive a low logic state when released from reset. You would need to change the clock source via CLKOUT_CTRL.wkup_clkout_sel[2:0]. You should use the clock tree tool function in the SYSCONFIG tool to determine the clock frequencies that can be selected for this pin.

    Note: There is no glitch protection on this clock output when switching from one source to another, so you need to consider the potential effect of short clock pulses on the device you have connected to this pin. Some devices will not tolerate a short clock pulse. In most cases, the attached device will allow clock glitches while it is being held in reset. If so, you could use a GPIO with an appropriate external pull to hold the attached device in reset until the appropriate clock source has been selected and the clock is stable. Once the clock is stable, the GPIO can be driven to release the attached device from reset.

    I'm not sure how this pin is used on the EVM. My replies above only address the operation of the AM62Px device. 

    The CLKOUT0 pin can source a 50MHz or 25MHz clock. You should be able to see this configuration option in the clock tree tool. 

    Regards,
    Paul