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Enable cacheability of external memory addresses

Di Lu
Prodigy 70 points

Hello everyone,

I want to enable the cacheability of the external memory area from 0x80000000 to 0x80FFFFFF. In TMS320C66x DSP Cache user guide, it saids that it needs to set the register CACHE_MAR128/MAR128 to 1 by function CACHE_enableCaching(). But I cannot find these registers in csl. In the following example, there is an example which use a register CACHE_CE00. And I cannot find this register too. So any suggestion about which register should I use? Thank you!

  • 0
    Genius 3770 points

    Hi,

    If you want to use CACHE_enableCaching(Uint8 mar) to enable cacheability of an area, you just need to designate the 'mar' which is just a number(for example 128) not a register for the API. It's API's responsibility to translate the MAR number to actual register address. The CACHE_MAR128 and CACHE_CE00 in document just stand for the MAR number as well.

    So make sure you have included <Csl_cache.h>  which locate in <PDK_ROOT/ packages/ti/csl>.

    Allen