Tool/software:
Using SDK 09_02_00_05, I created a new tispl.bin using the method outlined here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1334006/sk-am68-can-falcon-mode-be-enabled-on-sk-am68-j721s2-tda4vx
However it is not booting. The last print after setting CONFIG_LOGLEVEL=8:
U-Boot SPL 2023.04-00006-g96c6cb64-dirty (Jun 18 2024 - 09:42:46 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.6--w2023.01-j722s (Kool Koa')
k3_ddrss memory-controller@f300000: ddr freq0 not populated, using bypass frequency.
k3_ddrss memory-controller@f300000: vtt-supply not found.
SPL initial stack usage: 17064 bytes
Trying to boot from SPI
SPL: spl_image=0lx88fffee8
single-pinctrl pinctrl@f4000: configuring pins for ospi0-default-pins
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00010000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00010000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
single-pinctrl pinctrl@f4000: reg/val 88fffd94a/0x00050000
cadence_spi spi@fc40000: spi_find_chip_select: plat=43c43be4, cs=0
jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet.
jedec_spi_nor flash@0: from 0x00080000, len d
jedec_spi_nor flash@0: from 0x00080000, len d
jedec_spi_nor flash@0: from 0x00080564, len d
This implies we at least reach the function "spi_nor_parse_sfdp"
I've also tried changing the memory locations like below with the same result here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1205638/faq-am625-how-to-boot-from-r5-u-boot-spl-directly-into-the-linux-kernel-skipping-a53-spl-and-a53-u-boot-falcon-mode
These memory locations move the CONFIG_SPL_STACK_R_ADDR and CONFIG_SPL_LOAD_FIT_ADDRESS around. These changes don't fix the issue though.
It is able communicate with the OSPI NOR because I'm able to flash and boot from the NOR normally, just not with the custom tispl.bin
I've also verified the tispl.bin image is fully written to the NOR starting at address 0x080000.