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PROCESSOR-SDK-AM62X: M4 MCU_MCAN0 utilize 2 interrupts

Part Number: PROCESSOR-SDK-AM62X
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi TI Experts, 

Am62x EVM | MCU+ SDK 8.06 | focusing on M4 Core development.

I would like to double check my understanding regarding how to utilize 2 interrupt lines for M4 MCU_MCAN0.

As far as I understand, M4 Interrupt number 59 and 60 can be used by MCAN0, but seems there is no example code nor any settings supported in Sysconfig. 

My test program works, but since there is no guide written about this (at least I have not seen anything yet) I would like to confirm if below implementation is fine. I have split the ISR for send and receive function

1. Is below code implementation correct for using 2 interrupt lines for MCU MCAN 0?

2. is it advisable to use 2 interrupt lines for MCU MCAN0? or are there any caution points to consider? 

3. MCAN_INTR_LINE_NUM_0 seems to refer to Interrupt # 59 and NUM_1 to Interrupt # 60. But I have not seen this written anywhere yet... is this LINE to Interrupt# mapping correct? 

Thank you!

Sample code for utilizing 2 interrupt lines: